LG等离子V7屏电源功率因数校正(PFC)电路工作原理与维修(下)

(5)差动输入电压范围较大,大到可以等于电源电压;(6)输出端电位可灵活方便地选用。KIA339P集成电路采用C-14型封装,类似于增益不可调的运算放大器。每个比较器有两个输入端和一个输出端。两个输入端一个称为同相输入端,用"+"表     

具有分开调节直流放大系数以补偿失调电压的精密交流放大器

本文叙述了一种方法,用它可以把运算放大器的交直流放大系数彼此分开调节。它籍助于一附加差动放大器使运算放大器输出的交直流电压成份分开,其直流部分被反向反馈至输入端。用此法可以使随动电压保持在很低水平。交流电压积分器和电子补偿电流互感器是这种线路应用的例子。     

5G技术在智能电网中的实践和验证

5G技术以其大带宽、低时延、广连接技术优势,可以广泛地应用于电网行业全流程的生产和运营管理中。通过对5G切片、边缘计算等技术在差动保护等典型应用场景的实践和应用,验证了5G端到端的网络切片对电网业务隔离和保护的有效性,满足差动保护、配电网三遥对5G授时精度、端到端时延的指标要求。因此,5G网络可为配电网提供高可靠的无线通信服务,具有广阔的商业前景。     

光电耦合线性隔离电路

在各类测量、控制系统,特别是计算机控制系统中,经常需要在两个电气上互相隔离的电路之间线性地传输模拟信号。在这种情况下,通常应用调制式数据放大器。本文介绍一种使用半导体光耦合器件的隔离电路,它具有良好的线性度,并且在绝缘性能、可靠性、成本、体积和重量上为调制式数据放大器所不及。常用的半导体光耦合器是一个四端元件,其输出端(光敏管)工作在反向偏置态(图1)。当在输入端(发光二极管)通入正向电     

一种采用光隔离技术的电力载波机实时监控系统

电力设备和以计算机为中心的监测系统之间的隔离和抗干扰，是维护二者均能可靠工作的保证。由于光隔离技术的频带宽、电磁干扰小，文章介绍了其在电力载波机实时监控系统中的一些应用，主要包括电压类信号、开关信号和中频信号的变送。文中设计的变送器是一个光耦合差动放大器，它除了具有低漂移和高共模抑制比等优点外，输入与输出之间还是电隔离的。经过近两年的实际运行证明，这种光隔离监控系统性能良好。     

基于载波原理的隔离放大器的设计

隔离放大器是一种输入电路和输出电路之间电气隔离的放大器,一般采用变压器或光耦合传递信号,它主要应用在工业控制、信号测量、医学和核工业等领域。对变压器耦合隔离放大器的工作原理、使用和调试方法等方面进行了研究,研制的隔离放大器模块初样经测试,基本满足初始设计要求。与其他同类放大器比较,具有结构简单、成本低的优点。     

超高速ADC的应用误差分析

全并行超高速ＡＤＣ的转换误差主要来源于前置放大器的输出电阻、前置放大器与ＡＤＣ输入端之间的隔离电阻及ＡＤＣ的输入电容。按照采样频率正确选择以上参数对提高ＡＤＣ的转换精度有着重要意义。文中导出了有关公式并做了实验验证。     

同相供电设备有功功率差动保护

由于隔离变压器的副边额定电流很大,且难以选择电流互感器,因此隔离变压器很难设置灵敏的电流差动保护。为了给隔离变压器、隔离变压器与潮流控制器之间的连接电缆提供灵敏的保护,并给潮流控制器提供灵敏的远后备保护,文中从理论上分析了同相供电设备的基波输入有功功率与输出有功功率相等这一特性,并基于这一特性提出了同相供电设备有功功率差动保护方案,进而对有功功率差动保护在隔离变压器空载投入、潮流控制器启动、正常运行、外部故障、内部故障等各种工况下的动作行为进行了分析。文中还对同相供电设备有功功率差动保护的整定原则作了讨论,并给出了整定实例。实验室测试和工程现场运行测试结果表明了有功功率差动保护的正确性。     

锂电池组单体电压精确检测方法

提出了一种基于高压模拟开关和差动运算放大器的串联锂电池组单体电压检测方法,该方法由高压模拟开关、差动运算放大器、绝对值处电路及AD采样电路组成。提供了15串锂电池组电压检测电路,高压模拟开关采用MAX14752,差动运算放大器采用INA148UA。最后给出了15串锂电池组电压检测系统的实验结果,并进行分析。结果表明,该方法具有高精度、对锂电池组影响小、体积小等优点,为电池组的精确均衡及SOC估算提供基础,用于电动车及锂电池储能系统等领域。     

新型线圈电阻误差分选仪

叙述了集成电路式误差分选仪的电桥传感器、差动放大器和数据放大器的结构、理论分析及制备工艺，并概述了工作原理。     

基于PVI与运放的IGBT串联均压电路研究

介绍了一种采用PVI和运算放大器控制高压绝缘栅双极晶体管(IGBT)串联均压的方法.简述了基于光压隔离器(PVI)的串联IGBT隔离驱动电路和基于PMOSFET的均压串联反馈电路,详述了采用运算放大器反馈控制实现高压IGBT串联均压的方法.最后,将PMOSFET均压和运算放大器反馈控制均压电路分别运用到高压恒流源中,通过对实验数据的分析比较,运用运算放大器反馈控制均压误差小于0.6%,优于PMOSFET均压效果.     

激光差动多普勒的信号处理电路设计

随着微机电系统(MEMS)技术的迅速发展,对器件运动性能检测的需求日益迫切.采用激光差动多普勒测量技术能准确可靠地对MEMS器件进行动态特性测试.本文介绍了激光差动多普勒系统的信号处理电路的设计,主要包括放大电路、相敏检波电路和滤波电路.放大电路能将40 MHz频率信号放大100倍,相敏检波电路滤除了高频信号,分离出多普勒频移信号,滤波电路进一步滤除相敏检波电路输出信号中的载波信号和高频噪声.本电路设计最终实现了从光路系统输出的高频信号中提取多普勒信号.     

A novel single-capacitor single-operational-amplifier sinusoidaloscillator

The well known operational amplifier based Schmitt-trigger square wave generator is shown to behave as a sinusoidal oscillator at relatively high frequencies. This is attributed to the widely ignored frequency-dependence characteristic of the differential gain of the operational amplifier. Experimental results are in excellent agreement with theoretical predictions     

0.5‐V bulk‐driven differential amplifier

A new 0.5‐V fully differential amplifier is proposed in this article. The structure incorporates a differential bulk‐driven voltage follower with conventional gate‐driven amplification stages. The bulk‐driven voltage follower presents differential gain equal to unity while suppressing the input common‐mode voltage. The amplifier operates at a supply voltage of less than 0.5 V, performing input transconductance almost equal to a gate transconductance and relatively high voltage gain without the need for gain boosting. The circuit was designed and simulated using a standard 0.18‐µm CMOS n‐well process. The low‐frequency gain of the amplifier was 56 dB, the unity gain bandwidth was approximately 3.2 MHz, the spot noise was 100 nV/√Hz at 100 kHz and the current consumption was 90 μΑ. Copyright © 2012 John Wiley & Sons, Ltd.     

Low‐Noise Fully Differential Amplifiers Using JFET‐CMOS Integration Technology for Smart Sensors

In this paper, CMOS‐based low‐noise amplifiers with JFET‐CMOS technology for high‐resolution sensor interface circuits are presented. A differential difference amplifier (DDA) configuration is employed to realize differential signal amplification with very high input impedance, which is required for the front‐end circuit in many sensor applications. Low‐noise JFET devices are used as input pair of the input differential stages or source‐grounded output load devices, which are dominant in the total noise floor of DDA circuits. A fully differential amplifier circuit with pure CMOS DDA and three types of JFET‐CMOS DDAs were fabricated and their noise performances were compared. The results show that the total noise floor of the JFET‐CMOS amplifier was much lower compared to that of the pure CMOS configuration. The noise‐reduction effect of JFET replacement depends on the circuit configuration. The noise reduction effect by JFET device was maximum of about − 18 dB at 2.5 Hz. JFET‐CMOS technology is very effective in improving the signal‐to‐noise ratio (SNR) of a sensor interface circuit with CMOS‐based sensing systems. © 2008 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.     

Smart pixel optoelectronic receiver based on a charge sensitiveamplifier design

The application of charge sensitive amplifier techniques to the design of receivers within smart pixel optoelectronic systems is presented. An example optical input amplifier is given which should provide high sensitivity (±0.3 μA differential), low power consumption (0.6 mW) and small area usage (50 μm×20 μm) for operation at a conventional CMOS bit rate of 100 Mb/s. The minimum (simulated) optical switching energy is 6 fJ     

Noise performance of operational amplifier circuits

A method for calculating the total noise voltage at the output of inverting and noninverting amplifiers modeled using one- and two-pole differential gain expressions for the operational amplifier is developed. This method is adapted to deal with the case of a low-pass filter stage constructed using an operational amplifier modeled by a one-pole differential gain expression. The results obtained are presented in tabular form for convenient analysis and provide a basis for producing amplifier designs with improved noise performance     

测量高压差分探头1 MHz共模抑制比窄带放大器的研制

为了完整测量高压差分探头共模抑制比性能,需测量其50Hz~1MHz频率处的共模抑制比值。由于标准信号源的输出电平能力随着输出频率的升高而不断减小,1MHz时仅为20V左右,经过差分探头的衰减及共模抑制作用,使差分探头1MHz时共模输出信号电平极小,无法利用示波器进行测量。故研制了一台中心频率为1MHz的窄带放大器,该窄带放大器由低噪声高带宽放大单元和谐振选频单元组成,试验结果表明了其在输入电平50μV~1mV范围内的增益线性度优于±0.5dB,适用于差分探头1MHz频率处共模抑制比的测量。