A coplanar CMOS power switch

A 300 V power switch in a high-voltage CMOS technology compatible with a low-voltage MOS/bipolar technology is presented. This circuit can switch positive and negative 150 V pulses with rise and fall times of 100 ns for a 200 pF capacitive load. The switch has a low-voltage input control (/spl plusmn/15 V). Using earth-symmetrical non-overlapping high-voltage pulses as dynamic supply voltages, it is possible to reduce the power dissipation during the switching time considerably in comparison with the power dissipation of power switches, which use static (i.e., constant) supply voltages under the same conditions.     

Integrated electronic subscriber line interface circuit with ringing on chip

A new high-voltage, dielectrically isolated, complementary bipolar technology has been used to integrate high-voltage functions of a subscriber line interface circuit (SLIC). This circuit, in conjunction with a complementary low-voltage junction isolated bipolar integrated circuit, implements most of the line interface functions required for digital telephone switches. Partitioning of the junctions is based on technology requirements, and the two chips are encapsulated in 28-pin package.     

Simple passive lossless snubber for high-power multilevel inverters

A passive lossless snubber circuit for multilevel inverters is proposed in this paper. The topology is simple and requires no extra control circuit. In order to reduce the high-voltage stress on power switches with this snubber circuit, an improved snubber circuit is presented by adding separate low-power direct current voltage sources into the original one. The operating principles and design considerations are described in detail in this paper. A prototype of a three-phase three-level diode-clamped inverter with the improved passive lossless snubber is built and tested. The simulation and experimental results indicate that not only can it realize the soft switching operation of the three-level inverter with low-voltage stress but also the topology and the control are simple.     

一种采用单信号控制的新型高压高低侧功率器件

Novel high-voltage, high-side and low-side power devices, whose control circuits are referred to as the tub, are proposed and investigated to reduce chip area and improve the reliability of high-voltage integrated circuits. By using the tub circuit to control a branch circuit consisting of a PMOS and a resistor, a pulse signal is generated to control the low-side n-LDMOS after being processed by a low-voltage circuit. Thus, the high-voltage level-shifting circuit is not needed any more, and the parasitic effect of the conventional level-shifting circuit is eliminated. Moreover, the specific on-resistance of the proposed low-side device is reduced by more than 14.3% compared with the conventional one. In the meantime, integrated low-voltage power supplies for the low-voltage circuit and the tub circuit are also proposed. Simulations are performed with MEDICI and SPICE, and the results show that the expectant functions are achieved well.     

A new Schmitt trigger circuit in a 0.13-/spl mu/m 1/2.5-V CMOS process to receive 3.3-V input signals

A new Schmitt trigger circuit, which is implemented by low-voltage devices to receive the high-voltage input signals without gate-oxide reliability problem, is proposed. The new proposed circuit, which can be operated in a 3.3-V signal environment without suffering high-voltage gate-oxide overstress, has been fabricated in a 0.13-/spl mu/m 1/2.5-V 1P8M CMOS process. The experimental results have confirmed that the measured transition threshold voltages of the new proposed Schmitt trigger circuit are about 1 and 2.5 V, respectively. The new proposed Schmitt trigger circuit is suitable for mixed-voltage input-output interfaces to receive input signals and reject input noise.     

A novel active feedback flyback with only 100-mV inductive overshoot for a standard low-voltage CMOS inductive load driver, in a single-chip controller for 73 relays in a POTS/ADSL splitter application

This paper presents an inductive load driver. The circuit is realized in a standard low-voltage CMOS process: as the coil freewheels when the driver is switched off, the circuit clamps the output voltage at 100 mV above the power supply. Hence, no high-voltage technology or high-voltage tolerant circuit is required. 73 drivers are integrated in an ASIC, controlling 73 relays for a test access function on a POTS/ADSL splitter filter board. The driver also performs output voltage slope control and has an elegant, effective short-circuit protection.     

A power IC technology with excellent cross-talk isolation

This paper reports a low-cost, excellent cross-talk isolation power integrated circuit (PIG) technology capable of integrating high-voltage LDMOS, high-voltage LIGBT, and low-voltage CMOS control circuit. The technology is implemented using a conventional twin-well CMOS process with no compromise on the CMOS devices, and the breakdown voltages of the LDMOS and LIGBT with drift length of 40 μm are over 400 V. Using this technology, operating current of the body diode of the LDMOS can be improved by over 16 times and operating current of the LIGBT can be improved by over five times before CMOS latch-up in the control circuit occurs     

一种用于半桥功率IC的新型高压电平位移电路

In order to reduce the chip area and improve the reliability of HVICs,a new high-voltage level-shifting circuit with an integrated low-voltage power supply,two PMOS active resistors and a current mirror is proposed.The integrated low-voltage power supply not only provides energy for the level-shifting circuit and the logic circuit,but also provides voltage signals for the gates and sources of the PMOS active resistors to ensure that they are normally-on.The normally-on PMOS transistors do not,therefore,need to be fabricated in the depletion process.The current mirror ensures that the level-shifting circuit has a constant current,which can reduce the process error of the high-voltage devices of the circuit.Moreover,an improved RS trigger is also proposed to improve the reliability of the circuit.The proposed level-shifting circuit is analyzed and confirmed by simulation with MEDICI,and the simulation results show that the function is achieved well.     

Design techniques for low-voltage high-speed pseudo-differential CMOS track-and-hold circuit with low hold pedestal

A low-voltage pseudo-differential double-sampled track-and-hold circuit with low hold pedestal based on the Miller-effect scheme is proposed. Rail-to-rail operation of bootstrapped switches allows the low-voltage T/H circuit implementation. Simulation results confirm that the proposed circuit is effective in low-voltage applications with low hold pedestal.     

Circuit techniques for a 1.8-V-only NAND flash memory

Focusing on internal high-voltage (V_pp) switching and generation for low-voltage NAND flash memories, this paper describes a V _(pp) switch, row decoder, and charge-pump circuit. The proposed nMOS V_pp switch is composed of only intrinsic high-voltage transistors without channel implantation, which realizes both reduction of the minimum operating voltage and elimination of the V _pp leakage current. The proposed row decoder scheme is described in which all blocks are in selected state in standby so as to prevent standby current from flowing through the proposed V_pp switches in the row decoder. A merged charge-pump scheme generates a plurality of voltage levels with an individually optimized efficiency, which reduces circuit area in comparison with the conventional scheme that requires a separate charge-pump circuit for each voltage level. The proposed circuits were implemented on an experimental NAND flash memory. The charge pump and V_pp switch successfully operated at a supply voltage of 1.8 V with a standby current of 10 μA. The proposed pump scheme reduced the area required for charge-pump circuits by 40%     

用单个电感器实现升压和降压的DC/DC转换器

LT3433是一款采用两个开关元件的高压单片DC/DC转换器,是一种采用单个电感器来提供升压和降压转换的独特电路,该文主要介绍该电路的设计原理.     

Theory and simulation of combined mechanisms limiting the safe operating area of power semiconductor microelectronic switches

A generalized analytical model for the turn-off process of bipolar switches with microgates is developed taking into account the role of technological and design imperfections of real structures, which limit their safe operating area. Using a thyristor microchip with external field control, operating in a voltage inverter circuit, as an example, the boundary of the safe operating area with respect to the “turned-off current” is quantitatively determined. It is found that this boundary for a non-ideal structure in the low-voltage region is controlled by the effect of regenerative unlocking [triggering] of the cathode emitter; in the high-voltage region, this boundary is controlled by the onset of current localization in “perturbed” cells, involving dynamic breakdown. The possible applications of the developed model to indicate the directions of device-structure optimization to increase their maximum switching current are discussed. The adequacy of the results of model applications is validated using numerical simulation.     

压电微流量阀驱动电源的研究

研究了一种低纹波输出的压电陶瓷驱动电源,实现对压电驱动微流量阀的输出微流量的控制.利用单片机控制数字频率合成芯片来产生各种函数信号,研究了高低压稳压电路、小信号放大处理及功率放大电路,控制信号经滤波、放大及稳压等处理后,函数信号形成高压输出,驱动压电陶瓷,对微流量阀阀芯位移进行驱动,从而实现对微流量阀输出微流量的精密控制.通过对该电源输出特性的试验研究,结果表明,该电源具有良好的输入输出线性特性及低纹波特性,其线性度拟合相对误差仅为84 mV,高压输出纹波电压低于10 mV,这对提高微流量阀输出微流量的控制精度具有重要意义.     

Zero-voltage DC/DC converter with asymmetric pulse-width modulation for DC micro-grid system

This paper presents a zero-voltage switching DC/DC converter for DC micro-grid system applications. The proposed circuit includes three half-bridge circuit cells connected in primary-series and secondary-parallel in order to lessen the voltage rating of power switches and current rating of rectifier diodes. Thus, low voltage stress of power MOSFETs can be adopted for high-voltage input applications with high switching frequency operation. In order to achieve low switching losses and high circuit efficiency, asymmetric pulse-width modulation is used to turn on power switches at zero voltage. Flying capacitors are used between each circuit cell to automatically balance input split voltages. Therefore, the voltage stress of each power switch is limited at V_in/3. Finally, a prototype is constructed and experiments are provided to demonstrate the circuit performance.     

Analysis,design and implementation of an interleaved three-level PWM DC/DC ZVS converter

This paper presents a new parallel three-level soft switching pulse-width modulation (PWM) converter. The proposed converter has two circuit cells operated by the interleaved PWM modulation. Thus, the ripple currents at input and output sides are reduced. Each circuit cell has two three-level zero voltage switching circuits sharing the same power switches. Therefore, the current and power rating of the secondary side components are reduced. Current double rectifier topology is selected on the secondary side to decrease output ripple current. The main advantages of the proposed converter are soft switching of power switches, low ripple current on the output side and low-voltage rating of power switches for medium-power applications. Finally, the performance of the proposed converter is verified by experiments with 1 kW prototype circuit.     

555定时器的自动化设计及其应用

利用Multisim软件自动设计和分析555定时器、单稳态触发器和报警器电路。结果显示:555定时器的触发端为低电平时,输出端为高电平;触发端为高电平时,输出端为低电平。单稳态触发器的输出脉冲的宽度tW与电阻R、电容C的大小有关,调整R,C的数值,就可以改变输出方波的宽度。报警器电路中,左振荡器输出为低频振荡,右振荡器输出为高频、变频振荡。     

A 1.5-V current-mode CMOS sample-and-hold IC with 57-dB S/N at 20MS/s and 54-dB S/N at 30 MS/s

A new video-speed current-mode CMOS sample-and-hold IC has been developed. It operates with a supply voltage as low as 1.5 V, a signal-to-noise ratio (S/N) of 57 dB and 54 dB with a 1-MHz input signal at clock frequencies of 20 and 30 MHz, and a power dissipation of 2.3 mW. It consists of current-mirror circuits with the node voltages at the input and the output terminals which are kept constant in all phases of the input signal by the use of low-voltage operational amplifiers; this reduces the signal current dependency. The low-voltage operational amplifier consists of a MOS transistor and a constant current source in a common-gate amplifier configuration. Only two analog switches in differential form were used to construct the differential sample-and-hold circuit. This minimizes the error caused by the switch feed through, and thus high accuracy can be realized. Since there is no analog switch in the input path, it is possible to convert the input signal voltage to a current by simply connecting an external resistor. The circuit was fabricated using standard 0.6-μm MOS devices with normal threshold voltages (V_th) of +0.7 V (nMOS) and -0.7 V (pMOS)     

Reliable Circuit Techniques for Low-Voltage Analog Design in Deep Submicron Standard CMOS: A Tutorial

We present in this paper an overview of circuit techniques dedicated to design reliable low-voltage (1-V and below) analog functions in deep submicron standard CMOS processes. The challenges of designing such low-voltage and reliable analog building blocks are addressed both at circuit and physical layout levels. State-of-the-art circuit topologies and techniques (input level shifting, bulk and current driven, DTMOS), used to build main analog modules (operational amplifier, analog CMOS switches) are covered with the implementation of MOS capacitors.     

The effect of series resistance on the current/voltage characteristics of metal-cermet-metal sandwich structures

Variation of the circulating current with potential difference has been studied in evaporated Al-Cu/SiO-Al sandwich structures, 200 nm thick containing 10wt% Cu. The effect of a series resistor in the measuring circuit has been studied in detail. Low-voltage switching, low-voltage narrow-peak current pulses, bistable high-voltage switching and self-sustained oscillations in the circulating current have been obtained using different values of the series resistor. The results are explained through an analysis of the DC load line of the measuring circuit. In the absence of a series resistor, the current/voltage characteristic exhibits threshold, negative resistance and memory and the current is time-dependent.     

A soft-switching coupled inductor bidirectional DC–DC converter with high-conversion ratio

A soft-switching bidirectional DC–DC converter is presented herein as a way to improve the conversion efficiency of a photovoltaic (PV) system. Adoption of coupled inductors enables the presented converter not only to provide a high-conversion ratio but also to suppress the transient surge voltage via the release of the energy stored in leakage flux of the coupled inductors, and the cost can kept down consequently. A combined use of a switching mechanism and an auxiliary resonant branch enables the converter to successfully perform zero-voltage switching operations on the main switches and improves the efficiency accordingly. It was testified by experiments that our proposed converter works relatively efficiently in full-load working range. Additionally, the framework of the converter intended for testifying has high-conversion ratio. The results of a test, where a generating system using PV module array coupled with batteries as energy storage device was used as the low-voltage input side, and DC link was used as high-voltage side, demonstrated our proposed converter framework with high-conversion ratio on both high-voltage and low-voltage sides.