A fully integrated low-power BPSK demodulator for implantable medical devices

During the past decades, research has progressed on the biomedical implantable electronic devices that require power and data communication through wireless inductive links. In this paper, we present a fully integrated binary phase-shift keying (BPSK) demodulator, which is based on a hard-limited COSTAS loop topology, dedicated to such implantable medical devices. The experimental results of the proposed demodulator show a data transmission rate of 1.12 Mbps, less than 0.7 mW consumption under a supply voltage of 1.8 V, and silicon area of 0.2 mm/sup 2/ in the Taiwan Semiconductor Manufacturing Company (TSMC) CMOS 0.18-/spl mu/m technology. The transmitter satisfies the requirement of applications relative to high forward-transferring data rate, such as cortical stimulation. Moreover, the employment of BPSK demodulation along with a passive modulation method allows full-duplex data communication between an external controller and the implantable device, which may improve the controllability and observability of the overall implanted system.     

Fabrication of Organic Thin‐Film Transistors on Three‐Dimensional Substrates Using Free‐Standing Polymeric Masks Based on Soft Lithography

Here, a novel fabrication technique for integrated organic devices on substrates with complex structure is presented. For this work, free‐standing polymeric masks with stencil‐patterns are fabricated using an ultra‐violet (UV) curable polyurethaneacrylate (PUA) mixture, and used as shadow masks for thermal evaporation. High flexibility and adhesive properties of the free‐standing PUA masks ensure conformal contact with various materials such as glass, silicon (Si), and polymer, and thus can also be utilized as patterning masks for solution‐based deposition methods, such as spin‐coating and drop‐casting. Based on this technique, a number of integrated organic transistors are fabricated simultaneously on a cylindrical glass bottle with high curvature, as well as on a flat silicon wafer. It is anticipated that these results will be applied to the development of various integrated organic devices on complex‐structured substrates, which can lead to further applications.     

波导型集成声光器件的研究进展

集成声光器件作为波分复用网络中关键的无源器件,能够实现开关、滤波、调制等功能.声光器件由于其固有的高速度、宽频带和可能多波长同时工作的特点而成为研究重点.文章对已有的集成声光器件进行了分类,简要介绍了波导型集成声光器件的工作原理和发展状况,比较了当前研究广泛的两大类波导型集成声光器件的优缺点,指出了目前需要解决的重要课题及其发展趋势.     

Recent developments in monolithic integration of InGaAsP/InP optoelectronic devices

Monolithically integrated optoelectronic circuits combine optical devices such as light sources (injection lasers and light emitting diodes) and optical detectors with solid-state semiconductor devices such as field effect transistors, bipolar transistors, and others on a single semiconductor crystal. Here we review some of the integrated circuits that have been realized and discuss the laser structures suited for integration with emphasis on the InGaAsP/InP material system. Some results of high frequency modulation and performance of integrated devices are discussed.     

The First Flexible Dual‐Ion Microbattery Demonstrates Superior Capacity and Ultrahigh Energy Density: Small and Powerful

Humans live today in a high‐tech and informationalized society. With the development of the emerging electronic information age, various electronic systems are inclined to be multifunctional and miniaturized. It is urgent to develop “small and powerful” micro‐batteries with flexibility and high electrochemical performance to meet the diverse needs of microelectronic components. However, low electrochemical performance exists in traditional microenergy storage devices, which fail to satisfy the energy needs for microdevices. Here, for the first time, a planar integrated flexible rechargeable dual‐ion microbattery (DIMB) is reported, which is fabricated from an interdigital pattern of graphite as an electrode and lithium hexafluorophosphate as an electrolyte. As a microbattery, the DIMB exhibits a high reversible capacity of 56.50 mAh cm^?3, and excellent cycle stability with 90% capacity retention after 300 cycles under a high working voltage. The application of DIMB in microdevices, such as light‐emitting diodes (LEDs), digital electronic game consoles, and electrochromic glasses is also investigated, fully demonstrating its “small and powerful” performance. The integrated DIMB is a high‐voltage microdevice that reaches a nonpareil discharge voltage of about 100 V and a charging capacity of 102 mAh g^?1. This dual ion‐based flexible microbattery could become a promising candidate for energy storage and conversion components in next‐generation microelectronic devices and integrated electronic devices.     

基于介质电场增强理论的SOI横向高压器件与耐压模型

SOI(Silicon On Insulator)高压集成电路(High Voltage Integrated Circuit,HVIC)因其具有高速、低功耗、抗辐照以及易于隔离等优点而得以广泛应用。作为SOIHVIC的核心器件,SOI横向高压器件较低的纵向击穿电压,限制了其在高压功率集成电路中的应用。为此,国内外众多学者提出了一系列新结构以提高SOI横向高压器件的纵向耐压。但迄今为止,SOI横向高压器件均采用SiO2作为埋层,且实用SOI器件击穿电压不超过600V;同时,就SOI横向器件的电场分布和耐压解析模型而言,现有的模型仅针对具有均匀厚度埋氧层和均匀厚度漂移区的SOI器件建立,而且没有一个统一的理论来指导SOI横向高压器件的纵向耐压设计。笔者围绕SOI横向高压器件的耐压问题,从耐压理论、器件结构和耐压解析模型几方面进行了研究。基于SOI器件介质层电场临界化的思想,提出介质电场增强ENDIF(Enhanced Dielectric LayerField)理论。在ENDIF理论指导下,提出三类SOI横向高压器件新结构,建立相应的耐压解析模型,并进行实验。(1)ENDIF理论对现有典型横向SOI高压器件的纵向耐压机理统一化ENDIF理论的思想是通过增强埋层电场而提高SOI横向器件的纵向耐压。ENDIF理论给出了增强埋层电场的三种途径:采用低εr(相对介电常数)介质埋层、薄SOI层和在漂移区/埋层界面引入电荷,并获得了一维近似下埋层电场和器件耐压的解析式。ENDIF理论可对现有典型SOI横向高压器件的纵向耐压机理统一化,它突破了传统SOI横向器件纵向耐压的理论极限,是优化设计SOI横向高压器件纵向耐压的普适理论。(2)基于ENDIF理论,提出以下三类SOI横向高压器件新结构,并进行理论和实验研究①首次提出低εr型介质埋层SOI高压器件新型结构及其耐压解析模型低εr型介质埋层SOI高压器件包括低εr介质埋层SOI高压器件、变εr介质埋层SOI高压器件和低εr介质埋层PSOI(PartialSOI)高压器件。该类器件首次将低介电系数且高临界击穿电场的介质引入埋层或部分埋层,利用低εr介质增强埋层电场、变εr介质调制埋层和漂移区电场而提高器件耐压。通过求解二维Poisson方程,并考虑变εr介质对埋层和漂移区电场的调制作用,建立了变εr介质埋层SOI器件的耐压模型,由此获得RESURF判据。此模型和RESURF判据适用于变厚度埋层SOI器件和均匀介质埋层SOI器件,是变介质埋层SOI器件(包括变εr和变厚度介质埋层SOI器件)和均匀介质埋层SOI器件的统一耐压模型。借助解析模型和二维器件仿真软件MEDICI研究了器件电场分布和击穿电压与结构参数之间的关系。结果表明,变εr介质埋层SOI高压器件的埋层电场和器件耐压可比常规SOI器件分别提高一倍和83%,当源端埋层为高热导率的Si3N4而不是SiO2时,埋层电场和器件耐压分别提高73%和58%,且器件最高温度降低51%。解析结果和仿真结果吻合较好。②提出并成功研制电荷型介质场增强SOI高压器件笔者提出的电荷型介质场增强SOI高压器件包括:(a)双面电荷槽SOI高压器件和电荷槽PSOI高压器件,其在埋氧层的一侧或两侧形成介质槽。根据ENDIF理论,槽内束缚的电荷将增强埋层电场,进而提高器件耐压。电荷槽PSOI高压器件在提高耐压的基础上还能降低自热效应;(b)复合埋层SOI高压器件,其埋层由两层氧化物及其间多晶硅构成。该器件不仅利用两层埋氧承受耐压,而且多晶硅下界面的电荷增强第二埋氧层的电场,因而器件耐压提高。开发了基于SDB(Silicon Direct Bonding)技术的非平面埋氧层SOI材料的制备工艺,并研制出730V的双面电荷槽SOILDMOS和760V的复合埋层SOI器件,前者埋层电场从常规结构的低于120V/μm提高到300V/μm,后者第二埋氧层电场增至400V/μm以上。③提出薄硅层阶梯漂移区SOI高压器件新结构并建立其耐压解析模型该器件的漂移区厚度从源到漏阶梯增加。其原理是:在阶梯处引入新的电场峰,新电场峰调制漂移区电场并增强埋层电场,从而提高器件耐压。通过求解Poisson方程,建立阶梯漂移区SOI器件耐压解析模型。借助解析模型和数值仿真,研究了器件结构参数对电场分布和击穿电压的影响。结果表明:对tI=3μm,tS=0.5μm的2阶梯SOI器件,耐压比常规SOI结构提高一倍,且保持较低的导通电阻。仿真结果证实了解析模型的正确性。     

异质集成微波光子器件发展现状

微波光子学利用光子技术实现微波信号的产生、传输、处理及控制,可突破传统微波技术在带宽、传输损耗和抗电磁干扰等方面的瓶颈,提升雷达、电子战等信息系统的综合性能.激光器、电光调制器和光电探测器是微波光子技术中的三种核心光电子器件,其性能对微波光子链路的噪声和动态等指标具有决定性的影响,但基于分立器件的微波光子系统体积、重量较大,难以满足雷达、电子战等系统的阵列化需求,硅基异质集成技术以及高密度低损耗片上光传输互连技术是解决有源器件集成和无源器件集成的关键技术.文章介绍了用于微波光子的硅基激光器、电光调制器、光电探测器和波导的异质集成技术的发展现状,并探讨了集成微波光子技术的发展趋势.     

集成电光频率梳研究进展（特邀）

光学频率梳是由一系列离散且等间隔分布的频率成分所组成的光谱结构,作为光谱分析的天然刻度尺,其已广泛应用于光谱学、精密测量、光通信、传感等多个领域。光学频率梳根据其产生技术可分为基于锁模激光器的光学频率梳、克尔微腔光学频率梳、电光频率梳。电光频率梳由于其频率间隔可调、梳齿功率较高、可实现微波到光波的转换等优势,得到了充分发展。但传统电光频率梳的产生器件存在体积大、功耗高的缺点,限制了其进一步应用。随着微纳加工技术的不断发展,越来越多的材料应用于片上集成光学器件,包括硅、氮化硅、氮化铝、磷化铟、铌酸锂、砷化铝镓等。集成电光频率梳器件具有体积小、功耗低等优势,是构建光电集成芯片的重要器件。文中旨在对集成电光频率梳的研究现状进行综述,首先介绍光学频率梳的类型,并详细论述电光频率梳的产生机制;其次介绍产生集成电光频率梳的材料平台、相应的光梳性能指标及其应用;最后基于目前集成电光频率梳领域存在的问题,对未来的研究趋势做出展望。     

FET circuit destruction caused by electrostatic discharge

Under certain environmental conditions, electrostatic discharges can cause catastrophic failure in both bipolar and FET integrated circuits [1]. Some devices (MOSFET's) are particularly susceptible to damage because of the relatively low destructive breakdown voltage (50 to 100 V) of their thin oxides. One source of concern is discharges from the human body during handling. This problem can be minimized by taking various approaches, such as 1) manufacturing the device so it has a high oxide breakdown voltage, 2) adding a protective device to the input, 3) developing special handling procedures to prevent high voltages from being applied to the devices accidentally. The objectives of this paper are to present a technique to test the effectiveness of FET protective devices using a simulated human static discharge and also to present a mathematical model that can predict a catastrophic failure as a function of voltage developed across the FET device and the energy dissipated. Both theoretical and experimental data are presented.     

Progress of Si-based Optoelectronic Devices

Si-based optoelectronics is becoming a very active research area due to its potential applications to optical communications. One of the major goals of this study is to realize all-Si optoelectronic integrated circuit. This is due to the fact that Si- based optoelectronic technology can be compatible with Si microelectronic technology. If Si - based optoelectronic devices and integrated circuits can be achieved, it will lead to a new irtformational technological revolution. In the article, the current developments of this exciting field are mainly reviewed in the recent years. The involved contents are the realization of various Si- based optoelectronic devices, such as light- emitting diodes, optical waveguides devices, Si photonic bandgap crystals, and Si laser,etc. Finally, the developed tendency of all-Si optoelectronic integrated technology are predicted in the near future.     

Optical Signal Processor Using Electro-Optic Polymer Waveguides

We have investigated an optical signal processor using electro-optic polymer waveguides operating at a wavelength of 1.55 $mu$m. Due to recent developments, many useful optical devices have become available such as optical filters, modulators, switches, and multiplexers. It will be useful to have a single optical device, which is reconfigurable to implement all of these functions. We call such a device an “optical signal processor,” which will play a similar role to digital signal processors in electrical circuits. We realize such an optical device in a planar lightwave circuit. Since the planar lightwave circuits are based on the multiple interference of coherent light and can be integrated with significant complexity, they have been implemented for various purposes of optical processing such as optical filters. However, their guiding waveguides are mostly passive, and the only viable mechanism to reconfigure their functions is thermal effects, which is slow and cannot be used for high-speed applications such as optical modulators or optical packet switches. On the other hand, electro-optic polymer has a very high electro-optic coefficient and a good velocity match between electrical and optical signals, thus, permitting the creation of high-speed optical devices with high efficiency. Therefore, we have implemented a planar lightwave circuit using the electro-optic polymer waveguides. As a result, the structure is complex enough to generate arbitrary functions and fast enough to obtain high data rates. Using the optical signal processor, we investigate interesting applications including arbitrary waveform generators.      

A three-dimensional high-throughput architecture usingthrough-wafer optical interconnect

This paper presents a three-dimensional, highly parallel, optically interconnected system to process high-throughput stream data such as images. The vertical optical interconnections are realized using. Integrated optoelectronic devices operating at wavelengths to which silicon is transparent. These through-wafer optical signals are used to vertically optically interconnect stacked silicon circuits. The thin film optoelectronic devices are bonded directly to the stacked layers of silicon circuitry to realize self-contained vertical optical interconnections. Each integrated circuit layer contains analog interface circuitry, namely, detector amplifier and emitter driver circuitry, and digital circuitry for the network and/or processor, all of which are fabricated using a standard silicon integrated circuit foundry. These silicon circuits are post processed to integrate the thin film optoelectronics using standard, low cost, high yield microfabrication techniques. The three-dimensionally integrated architectures described herein are a network and a processor. The network has been designed to meet off-chip I/O using a new offset cube topology coupled with naming and renting schemes. The performance of this network is comparable to that of a three-dimensional mesh. The processing architecture has been defined to minimize overhead for basic parallel operations. The system goal for this research is to develop an integrated processing node for high-throughput, low-memory applications     

Electronic Phase Shifter for Millimeter-Wave Semiconductor Dielectric Integrated Circuits

A new system is proposed for millimeter-wave integrated circuits. It is suggested that high-resistivity silicon be used as a medium for a dielectric waveguide. With the advent of high-resistivity silicon, propagation can occur with relatively low Ioss. Furthermore, since the medium is a semiconductor compatible with active devices, it is proposed that active devices can be constructed directly in the semiconductor dielectric guide or appendaged directly on the surface. The basic approach is similar to that used in integrated optics, except that the medium for millimeter-wave guidance is a semiconductor and the control devices rely on conductivity modulation rather than on electrooptical effects. Some particular devices suggested are oscillator, mechanical and electronic phase shifters, amplitude modulators (switches), and detectors. The first of such devices investigated has been the electronic phase shtiter. Related theory and experiments are reported here. In addition, preliminary results on oscillators imbedded in a dielectric resonator are presented.     

Network subsystem design

It is argued that the bandwidth of the CPU/memory data path on workstations will remain within the same order of magnitude as the network bandwidth delivered to the workstation. This makes it essential that the number of times network data traverses the CPU/memory data path be minimized. Evidence which suggests that the cache cannot be expected to significantly reduce the number of data movements over this path is reviewed. Hardware and software techniques for avoiding the CPU/memory bottleneck are discussed. It is concluded that naively applying these techniques is not sufficient for achieving good application-to-application throughput; they must also be carefully integrated. Various techniques that can be integrated to provide a high bandwidth data path between I/O devices and application programs are outlined     

An innovative technique for packaging power electronic buildingblocks using metal posts interconnected parallel plate structures

Power electronics building blocks (PEBBs) are envisioned as integrated power modules consisting of power semiconductor devices, power integrated circuits, sensors, and protection circuits for a wide range of power electronics applications, such as inverters for motor drives and converters for power processing equipment. At the Center for Power Electronics Systems, we developed a topology for a basic building block-a two-switch two-diode half-bridge converter in totem-pole configuration with built-in gate-driver and protection circuitry, fiber-optic receiver/transmitter interface, and soft-switching capability. Based on the topology, a series of prototype modules, with 600 V, 3.3 kW rating, were fabricated using an innovative packaging technique developed for the program-metal posts interconnected parallel plate structure (MPIPPS). This new packaging technique uses direct attachment of bulk copper, not wire-bonding of fine aluminum wires, for interconnecting power devices. Electrical performance data of the packaged devices show that an air-cooled 15 kW inverter, operating from 400 V dc bus with 20 kHz switching frequency can be constructed by integrating three prototype modules, which is almost double what could be achieved with commercially packaged devices of the same rating     

GaAs SAMP Device for Ku-Band Switching

Switchable attenuating medium propagation (SAMP) devices are coplanar transmission lines on an epitaxial semiconductor (GaAs) substrate. These transmission lines can be switched rapidly between states of high and low attenuation by controlling the width of a depletion layer under the center conductor. SAMP devices can easily be characterized by the use of transmission line theory. They are well suited for use in monolithic microwave integrated circuits (MMIC's). Experimental performance data and theoretical background will be presented.     

Wafer-based nanostructure manufacturing for integrated nanooptic devices

The authors have developed a nanomanufacturing platform based on wafer-level nanoreplication with mold and nanopattern transfer by nanolithography. The nanoreplication process, which is based on imprinting a single-layer spin-coated ultraviolet (UV)-curable resist, achieved good nanopatterning fidelity and on-wafer uniformity with high throughput. Some manufacturing issues of the nanoreplication process, such as the impact of wafer and mold surface particles on nanoreplication yield, are also discussed. Nano-optic devices, such as, quarter-wave plates and polarizers, were manufactured with the nanomanufacturing platform. An average wafer-level optical performance yield of 86% was achieved. The developed technology is applied for high-throughput and low-cost manufacturing nanostructure-based optical devices and integrated optical devices.     

基于金刚石NV色心的带状线芯片微波场成像

为了满足集成微波器件进行高分辨率微波近场测量的需求,本论文提出了一种基于金刚石氮空位（Nitrogen-Vacancy,NV）色心的微波近场成像技术.该技术可用于查找芯片等集成微波器件的干扰源和信号串扰.此微波近场成像方法采用金刚石NV色心颗粒作为场传感器,其中金刚石颗粒固定在锥形光纤的末端.由于塞曼效应,NV色心的光探测磁共振（Optical Detection Magnetic Resonance,ODMR）谱在外部静磁场环境中会分裂成为8个峰,通过测量共振峰频点的Rabi振荡谱,能够得到Rabi频率,接着通过2.8MHz/Gauss换算得出该处的微波场强度,最后通过将所测得所有数据点进行二维图像处理即可得到所测芯片和集成微波器件的表面微波场近场图像.