Reducing initial latency in media servers

A multimedia server needs to provide high bandwidth and continuous real-time delivery. We present techniques for reducing the initial latency of presentations. This is important in interactive applications such as video games and multimedia document browsing. On-disk partial data replication can significantly reduce initial latency without adversely affecting throughput     

On the benefits of multi-path recovery in flexgrid optical networks

We propose a new recovery scheme, called multi-path recovery (MPR), specifically designed for flexgrid-based optical networks. It combines protection and restoration schemes to jointly recover, in part or totally, the bitrate requested by client demands in case of failure. We define the bitrate squeezed recovery optimization (BRASERO) problem to maximize the amount of bitrate which is recovered in case of failure of any single fiber link; a mixed integer linear programming formulation for the BRASERO problem is provided. However, since their exact solutions become impractical when real-sized network and traffic instances are considered, we develop a heuristic algorithm which provides a much better trade-off between optimality and complexity. Exhaustive numerical experiments carried out over realistic network topologies and traffic scenarios show that the efficiency of the proposed MPR scheme approaches that of restoration while providing recovery times as short as protection schemes.     

Reducing packet loss with protection tunnel based rerouting

It is well-known that today’s inter-domain routing protocol, Border Gateway Protocol (BGP), converges slowly during network failures. During the convergence period, widespread temporary burst packet loss happens that may be caused by route loops or blackholes. In this paper, we present a Protection Tunnel based Rerouting (PTR)mechanism-a novel scheme for delivering packet continuously during period of convergence. PTR scheme pre-establishes protection tunnel among routers. Once the inter-domain link failed, routers could redirect those influenced packets along protection tunnel to a router that has a valid path to destination. Therefore, packets could be forwarded continuously even encountering fault links. The performances of PTR scheme are simulated. The results demonstrate that PTR scheme is more resilient to link failures than BGP. The cost caused by PTR scheme is very little and acceptable.     

Power bipolar transistors with a fast recovery integrated diode

We have integrated a fast recovery diode in the structure of a power bipolar transistor. This integral diode is physically connected between the emitter and the collector of the transistor and can be used as a free-wheeling diode in power switches. Selective reduction of the minority carrier lifetime in the region of the diode was realized by Pt implantation in the diode area followed by an optimized thermal process that limits the lateral diffusion of the metal atoms. Using this metal doping a reduction by a factor of 10 of the reverse recovery charges of the integrated diode is obtained without affecting significantly the current carrying capability of the transistor     

Scalable on-demand media streaming with packet loss recovery

Previous scalable on-demand streaming protocols do not allow clients to recover from packet loss. This paper develops new protocols that: (1) have a tunably short latency for the client to begin playing the media; (2) allow heterogeneous clients to recover lost packets without jitter as long as each client's cumulative loss rate is within a tunable threshold; and (3) assume a tunable upper bound on the transmission rate to each client that can be as small as a fraction (e.g., 25%) greater than the media play rate. Models are developed to compute the minimum required server bandwidth for a given loss rate and playback latency. The results of the models are used to develop the new protocols and assess their performance. The new protocols, Reliable Periodic Broadcast and Reliable Bandwidth Skimming, are simple to implement and achieve nearly the best possible scalability and efficiency for a given set of client characteristics and desirable/feasible media quality. Furthermore, the results show that the new reliable protocols that transmit to each client at only twice the media play rate have similar performance to previous protocols that require clients to receive at many times the play rate.     

Proximal-Gen for fast compressed sensing recovery

Compressed sensing (CS) can recover an image from a few random measurements by exploiting the sparsity assumption on the structure of images. Some recent generative model-based CS recovery methods have removed the sparsity constraint, but their recovery process is slow and the recovered signal is constrained to be in the generator range. Here, we propose a new framework, called Proximal-Gen, for CS recovery. Specifically, we first formulate a general domain of the recovered signals, this allows the subsequent recovery algorithms to recover the signals that deviate from the generator range. Then based on the general domain, we develop a fast recovery algorithm, which mainly consists of two sub-algorithms, namely network-based projected gradient descent (NPGD) and denoiser-based proximal gradient descent (DPGD). The NPGD is used to obtain an intermediate signal lying in the generator range, while the DPGD is proposed to recover a deviation signal. Compared with multiple recent generative model-based recovery methods, our method can achieve better reconstruction performance and higher efficiency under most measurements.     

Improved recovery of fast power diodes with self-adjusting pemitter efficiency

A fast p-n-n⁺ power rectifier, which shows a significantly improved recovery behavior, is discussed. The p layer of this diode consists of a p⁺ region of high injection efficiency and a densely interspersed p region of low injection efficiency. The lateral distances are chosen in such a manner that the high efficiency of the p⁺ region becomes effective at high currents only, whereas, up to the normal operative forward current, the p emitter efficiency is small. By commutation, this results in a strong reduction of the peak reverse current and a significantly softer reverse current decay compared to standard diodes designed for the same blocking and forward voltages     

Reducing burst packet loss through route-free forwarding

It is well known that today’s inter-domain routing protocol, Border Gateway Protocol (BGP), converges slowly during network failures. Due to the distribution nature of Internet routing decisions and the rate-limiting timer Minimum Route Advertisement Interval (MRAI) of BGP, unavoidable convergence latency is introduced in reaction to network changes. During the period of convergence temporarily routing table inconsistencies cause short-term routing blackholes and loops which result in widespread temporary burst packet loss. In this paper, we present ROute-Free Forwarding (ROFF) — a novel technique for packet delivering continuously during periods of convergence. With slightly modifications on IP packet header and BGP, route loops and blackholes can be avoided. Our preliminary evaluation demonstrates that ROFF succeeds in reducing the number of Autonomous Systems (ASes) which experience burst packet loss and the duration of packet loss.     

DEESE算法思想应用于PADEC算法中实现相干多径信号分离

PADEC算法中引入已知波形信号源的信息,使得相干多径信号的DOA估计性能大大提高,而DEESE算法异于传统空间平滑算法的独特去相关策略,使它在低信噪比、天线阵阵元数较少时有着良好的DOA估计性能.结合这两种算法各自的优点,将DEESE算法的去相关策略应用于PADEC算法中,形成PADEC-DEESE算法.计算机仿真结果表明,PADEC-DEESE算法完全能够实现相干多径信号的DOA估计,并在天线阵阵元数较少、低信噪比情况下的DOA估计精度优于PADEC、DEESE及传统的MUSIC-SS算法.     

现代快恢复二极管设计方法的研究

基于改善快恢复二极管的的动态特性,通过对二极管的横、纵向参数来进行分析,理论上提出了快恢复二极管的设计方法,并且结合SILVACO-TCAD仿真软件进行验证;得出了现代快恢复二极管应降低阳极浓度、减小基区少子寿命,采用加缓冲层的结论;这种结构极大的改善了快恢复二极管的正向导通特性,达到了优化动态特性的目的。     

Parity-based loss recovery for reliable multicast transmission

We investigate how forward error correction (FEC) can be combined with automatic repeat request (ARQ) to achieve scalable reliable multicast transmission. We consider the two scenarios where FEC is introduced as a transparent layer underneath a reliable multicast layer that uses ARQ, and where FEC and ARQ are both integrated into a single layer that uses the retransmission of parity data to recover from the loss of original data packets. To evaluate the performance improvements due to FEC, we consider different loss rates and different types of loss behavior (spatially or temporally correlated loss, homogeneous or heterogeneous loss) for up to 10⁶ receivers. Our results show that introducing FEC as a transparent layer below ARQ can improve multicast transmission efficiency and scalability. However, there are substantial additional improvements when FEC and ARQ are integrated     

Retransmission loss recovery by duplicate acknowledgment counting

The performance of transmission control protocol (TCP) is largely dependent upon its loss recovery. Therefore, it is a very important issue whether the packet losses may be recovered without retransmission timeout (RTO) or not. TCP always evokes RTO if a retransmitted packet is lost again. In order to alleviate this problem, we propose an algorithm called duplicate acknowledgment counting (DAC). We use a stochastic model to evaluate the performance of DAC, and compare it with TCP NewReno. Numerical results evaluated by simulations show that DAC can improve TCP loss recovery significantly in presence of random losses.     

Reducing cell loss in banyan based ATM switching fabrics

In this paper, we propose a new technique for reducing cell loss in multi‐banyan‐based ATM switching fabrics. We propose a switch architecture that uses incremental path reservation based on previously established connections. Path reservation is carried out sequentially within each banyan but multiple banyan planes can be concurrently reserved. We use a conflict resolution approach according to which banyans make concurrent reservation offers of conflict‐free paths to head of the line cells waiting in input buffers. A reservation offer from a given banyan is allocated to the cell whose source‐to‐destination path uses the largest number of partially allocated switching elements which are shared with previously reserved paths. Paths are incrementally clustered within each banyan. This approach leaves the largest number of free switching elements for subsequent reservations which has the effect of reducing the potential of future conflicts and improves throughput. We present a pipelined switch architecture based on the above concept of path‐clustering which we call path‐clustering banyan switching fabric (PCBSF). An efficient hardware that implements PCBSF is presented together with its theoretical basis. The performance and robustness of PCBSF are evaluated under simulated uniform traffic and ATM traffic. We also compare the cell loss rate of PCBSF to that of other pipelined banyan switches by varying the switch size, input buffer size, and traffic pattern. Copyright © 2001 John Wiley & Sons, Ltd.     

Reducing radiation loss of tilts in dielectric optical waveguides

It is proposed to reduce the radiation loss of an optical wave-guide tilt by increasing the refractive index on the inner side, or by decreasing it on the outer side of the tilt By microwave model experiments it is shown that the method proposed is effective.     

一种基于延迟插入法和云计算系统的快速电路仿真的研究

为提高高速高密度电路的设计效率,本文对快速电路仿真中常用的延迟插入法进行研究,分析并推导出延迟插入法的仿真计算公式。通过和通用电路模拟程序软件HSPICE的仿真结果进行比较,验证了延迟插入法的有效性;通过在云计算系统中对大规模电路进行仿真计算,验证了延迟插入法的高效性。本文的研究数据表明延迟插入法和云计算系统的结合可以提供一种可靠,高效的快速电路仿真技术,应用这种技术可以提高电路设计效率。     

Multi-bits error detection and fast recovery in RISC cores

The particles-induced soft errors are a major threat to the reliability of microprocessors. Even worse, multi-bits upsets (MBUs) are ever-increased due to the rapidly shrinking feature size of the IC on a chip. Several architecture-level mechanisms have been proposed to protect microprocessors from soft errors, such as dual and triple modular redundancies (DMR and TMR). However, most of them are inefficient to combat the growing multi-bits errors or cannot well balance the critical paths delay, area and power penalty. This paper proposes a novel architecture, self-recovery dual-pipeline (SRDP), to effectively provide soft error detection and recovery with low cost for general RISC structures. We focus on the following three aspects. First, an advanced DMR pipeline is devised to detect soft error, especially MBU. Second, SEU/MBU errors can be located by enhancing self-checking logic into pipelines stage registers. Third, a recovery scheme is proposed with a recovery cost of 1 or 5 clock cycles. Our evaluation of a prototype implementation exhibits that the SRDP can successfully detect particle-induced soft errors up to 100% and recovery is nearly 95%, the other 5% will inter a specific trap.     

Asymmetric anode and cathode extraction structure fast recovery diode

This paper presents an asymmetric anode structure and cathode extraction fast and soft recovery diode.The device anode is partial-heavily doped and partial-lightly doped.The P+ region is introduced into the cathode.Firstly,the characteristics of the diode are simulated and analyzed.Secondly,the diode was fabricated and its characteristics were tested.The experimental results are in good agreement with the simulation results.The results show that,compared with the P-i-N diode,although the forward conduction characteristic of the diode is declined,the reverse recovery peak current is reduced by 47％,the reverse recovery time is shortened by 20％ and the softness factor is doubled.In addition,the breakdown voltage is increased by 10％.     

Resonant gate driver with efficient gate energy recovery and switching loss reduction

This article describes a novel resonant gate driver for charging the gate capacitor of power metal-oxide semiconductor field-effect-transistors (MOSFETs) that operate at a high switching frequency in power converters. The proposed resonant gate driver is designed with three small MOSFETs to build up the inductor current in addition to an inductor for temporary energy storage. The proposed resonant gate driver recovers the CV² gate loss, which is the largest loss dissipated in the gate resistance in conventional gate drivers. In addition, the switching loss is reduced at the instants of turn on and turn off in the power MOSFETs of power converters by using the proposed gate driver. Mathematical analyses of the total loss appearing in the gate driver circuit and the switching loss reduction in the power switch of power converters are discussed. Finally, the proposed resonant gate driver is verified with experimental results at a switching frequency of 1 MHz.     

A fast SOI-based variable optical attenuator with a p-i-n structure with low polarization dependent loss

According to the plasma dispersion effect of silicon (Si), a silicon-on-insulator (SOI) based variable optical attenuator (VOA) with p-i-n lateral diode structure is demonstrated in this paper. A wire rib waveguide with sub-micrometer cross section is adopted. The device is only about 2 mm long. The power consumption of the VOA is 76.3 mW (0.67 V, 113.9 mA), and due to the carrier absorption, the polarization dependent loss (PDL) is 0.1 dB at 20 dB attenuation. The raise time of the VOA is 34.5 ns, the fall time is 37 ns, and the response time is 71.5 ns.