Correlation between the electrical properties and the interfacial microstructures of TiAl-based ohmic contacts to p-type 4H-SiC

In order to understand a mechanism of TiAl-based ohmic contact formation for p-type 4H-SiC, the electrical properties and microstructures of Ti/Al and Ni/Ti/Al contacts, which provided the specific contact resistances of approximately 2×10⁻⁵ Ω-cm² and 7×10⁻⁵ Ω-cm² after annealing at 1000°C and 800°C, respectively, were investigated using x-ray diffraction (XRD) and high-resolution transmission electron microscopy (HRTEM). Ternary Ti₃SiC₂ carbide layers were observed to grow on the SiC surfaces in both the Ti/Al and the Ni/Ti/Al contacts when the contacts yielded low resistance. The Ti₃SiC₂ carbide layers with hexagonal structures had an epitaxial orientation relationship with the 4H-SiC substrates. The (0001)-oriented terraces were observed periodically at the interfaces between the carbide layers and the SiC, and the terraces were atomically flat. We believed the Ti₃SiC₂ carbide layers primarily reduced the high Schottky barrier height at the contact metal/p-SiC interface down to about 0.3 eV, and, thus, low contact resistances were obtained for p-type TiAl-based ohmic contacts.     

High conductivity copper-boron alloys obtained by low temperature annealing

The electrical behavior during annealing of copper films with a nominal concentration of 2 at.% boron has been investigated. The evolution of the resistivity of the film was monitored using an in situ technique, in which the film was rampannealed at constant ramp rates. At temperature of 150–200°C, the resistivity of the Cu(B) undergoes a first drop. This is followed by one or two such drops in resistivity, so that after completion of a ramp-anneal from 50°C to 750°C, the room temperature resistivity decreases from the initial value of 13 μΩ cm to 2.1 μΩcm, close to that of bulk copper. Isothermal annealing of the film also leads to substantial decreases in resistivity, from 13 μΩcm to 3 μΩ cm after annealing at 350°C for 8 h and to 2.5 μΩ cm at 400°C for 4 h. These results show that a dramatic reduction in resistivity of Cu(B) alloys takes place at temperatures below 400°C, suggesting possible applications for silicon device interconnections.     

Amorphous chromium silicide formation in hydrogenated amorphous silicon

The interaction between thin films of hydrogenated amorphous silicon and sputter-deposited chromium has been studied. Following deposition of the chromium films at room temperature, the films were annealed over a range of times and temperatures below 350°C. It was found that an amorphous silicide was formed only a few nanometers thick with the square of thickness proportional to the annealing time. The activation energy for the process was 0.55±0.05 eV. The formation process of the silicide was very reproducible with the value of density derived from the thickness and Cr surface density being close to the value for crystalline CrSi₂ for all films formed at temperatures ≤300°C. The specific resistivity of the amorphous CrSi₂ was ≈600 μΩ·cm and independent of annealing temperature.     

Effect of Annealing Ambient on the Self-Formation Mechanism of Diffusion Barrier Layers Used in Cu(Ti) Interconnects

Copper (titanium) [Cu(Ti)] films with low titanium (Ti) concentration were found to form thin Ti-rich barrier layers at the film/substrate interfaces after annealing, which is referred to as self-formation of the barrier layers. This Cu(Ti) alloy was one of the best candidates for interconnect materials used in next-generation ultra-large-scale integrated (ULSI) devices that require both very thin barrier layers and low-resistance interconnects. In the present paper, in order to investigate the influences of annealing ambient on resistivity and microstructure of the Cu alloys, the Cu(7.3at.%Ti) films were prepared on the SiO₂ substrates and annealed at 500°C in ultra-high vacuum (UHV) or argon (Ar) with a small amount of impurity oxygen. After annealing the film at 500°C in UHV, the resistivity was not reduced below 16 μΩ-cm. Intermetallic compounds of Cu₄Ti were observed to form in the films and believed to cause the high resistivity. However, after subsequently annealing in Ar, these compounds were found to decompose to form surface TiO _x and interfacial barrier layers, and the resistivity was reduced to 3.0 μΩ-cm. The present experiment suggested that oxygen reactive to titanium during annealing played an important role for both self-formation of the interfacial barrier layers and reduction of the interconnect resistivity.     

High-Dose Phosphorus-Implanted 4H-SiC: Microwave and Conventional Post-Implantation Annealing at Temperatures ≥1700°C

Semi-insulating 4H-SiC ⟨0001⟩ wafers have been phosphorus ion implanted at 500°C to obtain phosphorus box depth profiles with dopant concentration from 5 × 10¹⁹ cm⁻³ to 8 × 10²⁰ cm⁻³. These samples have been annealed by microwave and conventional inductively heated systems in the temperature range 1700°C to 2050°C. Resistivity, Hall electron density, and Hall mobility of the phosphorus-implanted and annealed 4H-SiC layers have been measured in the temperature range from room temperature to 450°C. The high-resolution x-ray diffraction and rocking curve of both virgin and processed 4H-SiC samples have been analyzed to obtain the sample crystal quality up to about 3 μm depth from the wafer surface. For both increasing implanted phosphorus concentration and increasing post-implantation annealing temperature the implanted material resistivity decreases to an asymptotic value of about 1.5 × 10⁻³ Ω cm. Increasing the implanted phosphorus concentration and post-implantation annealing temperature beyond 4 × 10²⁰ cm⁻³ and 2000°C, respectively, does not bring any apparent benefit with respect to the minimum obtainable resistivity. Sheet resistance and sheet electron density increase with increasing measurement temperature. Electron density saturates at 1.5 × 10²⁰ cm⁻³ for implanted phosphorus plateau values ≥4 × 10²⁰ cm⁻³, irrespective of the post-implantation annealing method. Implantation produces an increase of the lattice parameter in the bulk 4H-SiC underneath the phosphorus-implanted layer. Microwave and conventional annealing produce a further increase of the lattice parameter in such a depth region and an equivalent recovered lattice in the phosphorus-implanted layers.     

Neutralization of electrically active aluminum in recrystallized silicon-on-sapphire films

We report the effect of steam oxidation at 875° C on the electrical resistivity, crystalline quality (measured by ion channeling), and Al concentration (measured by secondary ion mass spectrometry) in 0.25 μm thick, Si-implanted and recrystallized, Si-on-sapphire films. After a deep Si implantation (180 keV, 1.4×l0¹⁵ Si/cm²) at room temperature, and solid-phase epitaxial regrowth from the non-amorphized, 0.03 μm thick surface region, the initially undoped SOS films become doped p-type, and their resistivity decreases from (1−5)xl0¹⁴ ficm to 0.5 Ωcm. The doping is due to electrically active Al, released from the A1₂O₃ by the Si implantation, and present in the recrystallized films at a concentration of ≃2×l0¹⁶ Al/cm³ . After a 75 min steam oxidation at 875 °C, which consumes 0.06 Μm of Si, the resistivity of the recrystallized films increases to over 40 Ωcm, but the Al concentration is unchanged. The oxidation also uncovers higher quality material below the non-recrystallized surface layer. A semi-quantitative model is proposed to explain the electrical data, based on the diffusion of oxygen from the Si/SiO₂ interface into the SOS film during oxidation, and the formation of Al-O-Si neutral complexes. Data on the stability of the high-resistivity films against high-temperature annealing or re-amorphization and annealing is given.     

Very low resistance ohmic contacts to n-GaN

Ohmic contacts with low resistance are fabricated on n-GaN films using Al/Ti bilayer metallization. GaN films used are 0.3 μm thick layers with carrier concentrations of 1 × 10¹⁹ cm⁻³ grown on the c-plane sapphire by ion-removed electron cyclotron resonance molecular beam epitaxy. The lowest value for the specific contact resistivity (ρ_c) of 1.2×10⁻⁸ Ω·cm² was obtained with furnace annealing at 500°C for 60 min. This result shows the effectiveness of high carrier concentration GaN layers and the low temperature annealing for the realization of low resistance ohmic contacts. Sputtering Auger electron spectroscopy analysis reveals that Al diffuses into Ti layer and comes into contact with the GaN surface.     

Characteristics of PECVD grown tungsten nitride films as diffusion barrier layers for ULSI DRAM applications

We have developed tungsten nitride (W-Nitride) films grown by plasma enhanced chemical vapor deposition (PECVD) for barrier material applications in ultra large scale integration DRAM devices. As-deposited W-Nitride films show an amorphous structure, which transforms into crystalline, β-W₂N and α-W phases upon annealing at 800°C. The resistivity of the as-deposited films grown at the NH₃/WF₆ gas flow ratio of 1 is about 160 μω-cm, which decreases to 50 μω-cm after an rapid thermal annealing treatment at 800°C. In the contact holes with the size of 0.35 μm and aspect ratio of 3.5, the bottom step coverage of the tungsten nitride films is about 60%, which is about three times higher than that of collimated-TiN films. We obtained contact resistance and leakage current with the tungsten nitride barrier layer comparable to those with conventional collimated TiN films. The contact resistance and leakage current are stable upon thermal stressing at 450°C up to 48 h.     

Thermal Stability Study of Cu(MoN<Subscript><Emphasis Type="Italic">x</Emphasis></Subscript>) Seed Layer on Barrierless Si

This study reports the good thermal stability of a sputtered Cu(MoN _x ) seed layer on a barrierless Si substrate. A Cu film with a small amount of MoN _x was deposited by reactive co-sputtering of Cu and Mo in an Ar/N₂ gas mixture. After annealing at 560°C for 1 h, no copper silicide formation was observed at the interface of Cu and Si. Leakage current and resistivity evaluations reveal the good thermal reliability of Cu with a dilute amount of MoN _x at temperatures up to 560°C, suggesting its potential application in advanced barrierless metallization. The thermal performance of Cu(MoN _x ) as a seed layer was evaluated when pure Cu is deposited on top. X-ray diffraction, focused ion beam microscopy, and transmission electron microscopy results confirm the presence of an ∼10-nm-thick reaction layer formed at the seed layer/Si interface after annealing at 630°C for 1 h. Although the exact composition and structure of this reaction layer could not be unambiguously identified due to trace amounts of Mo and N, this reaction layer protects Cu from a detrimental reaction with Si. The Cu(MoN _x ) seed layer is thus considered to act as a diffusion buffer with stability up to 630°C for the barrierless Si scheme. An electrical resistivity of 2.5 μΩ cm was obtained for the Cu/Cu(MoN _x ) scheme after annealing at 630°C.     

Pressure electrical contact improved by carbon black paste

Pressure and pressureless electrical contacts were evaluated by measuring the contact electrical resistivity between copper mating surfaces. Pressure electrical contacts with a contact resistivity of 2×10⁻⁵ Ω·cm² have been attained using a carbon black paste of a thickness of less than 25 μm as the interface material. In contrast, a pressureless contact with silver paint as the interface material exhibits a higher resistivity of 3×10⁻⁵ Ω·cm² or above. A pressureless contact with colloidal graphite as the interface material exhibits the same high contact resistivity (1×10⁻⁴ Ω·cm²) as a pressure contact without any interface material. On the other hand, pressureless contacts involving solder and silver epoxy exhibit lower contact resistivity than carbon black pressure contacts.     

Microstructure and properties of multilayer-derived tungsten silicide

In metallization, peeling and oxidation of tungsten silicide are the most serious problems of tungsten rich silicide. In this study, multilayer-derived silicon rich tungsten silicide with the silicon film on the outermost surface is investigated to avoid these problems. The dependence of sheet resistance on the annealing conditions is studied. X-ray diffraction results indicate that silicide formation is nearly completed after 30 min annealing at 750° C. Microstructures of silicide and polycides are investigated by electron microscopy. Silicide deposited on SiO₂ has smaller grains that deposited on poly-Si. A resistivity of 60 μΩ-cm is obtained for multilayer-derived WSi_2.3.     

Epitaxial growth and electrical conductance of metal(CoSi2)/insulator(CaF2) nanometer-thick layered structures on Si (111)

Epitaxial growth of a metal (CoSi₂) /insulator (CaF2) nanometer-thick layered structure on Si(111) was demonstrated and the resistivity of CoSi₂ epilayer in this structure was investigated. An epitaxial CoSi₂ layer on CaF₂ was obtained by the two-step growth technique,i.e. solid phase epitaxy with the epitaxial Si layer grown in the first step and Co deposited in the second step. This technique was shown to be effective to avoid the Co agglomeration on CaF₂ layer observed in the co-evaporation of Si and Co. An epitaxial CaF₂ layer was formed on CoSi₂/CaF₂ at low substrate temperature (450°C) with partially ionized and accelerated CaF₂ beam, to avoid Co agglomeration in the CoSi₂/CaF₂ underlayer as well. Obtained results showed a single-crystalline nature in reflection high-energy electron diffraction (RHEED) and transmission electron microscopy (TEM) observations. The resistivity of a few nm-thick CoSi₂ epilayers embedded by CaF₂ has been investigated. We studied thickness and annealing temperature dependence of resistivity and showed that a minimum resistivity of 30 μΩ cm was obtained in a 2 nm-thick CoSi₂ sample annealed at 860°C.     

Hot-implantation of nitrogen donors into p- type α-SiC and characterization of n+-p junction

N⁺ implantation into p-type a-SiC (6H-SiC, 4H-SiC) epilayers at elevated temperatures was investigated and compared with implantation at room temperature (RT). When the implant dose exceeded 4 × 10₁₅ cm₋₂, a complete amorphous layer was formed in RT implantation and severe damage remained even after post implantation annealing at 1500°C. By employing hot implantation at 500~800°C, the formation of a complete amorphous layer was suppressed and the residual damage after annealing was significantly reduced. For implant doses higher than 10¹⁵ cm⁻², the sheet resistance of implanted layers was much reduced by hot implantation. The lowest sheet resistance of 542Ω/ was obtained by implantation at 500 ~ 800°C with a 4 × 10¹⁵ cm⁻² dose. Characterization of n⁺-p junctions fabricated by N⁺ implantation into p-type epilayers was carried out in detail. The net doping concentration in the region close to the junction showed a linearly graded profile. The forward current was clearly divided into two components of diffusion and recombination. A high breakdown voltage of 615 ∼ 810V, that is almost an ideal value, was obtained, even if the implant dose exceeded 10¹⁵ cm⁻². By employing hot implantation at 800°C, the reverse leakage current was significantly reduced.     

Silicide formation in co-deposited TiSix layers: The effect of deposition temperature and Mo

The silicide reaction in co-deposited TiSi_x layers on single crystal and pre-amorphized Si has been studied in detail. Both the co-deposition ratio and the co-deposition temperature were found to have a strong effect on the formation of the C54-TiSi₂ phase in these films. An unusual dependence of the sheet resistance on the co-deposition ratio was observed for films deposited at room temperature and those deposited at 400°C: the C54-TiSi₂ phase forms more easily for layers deposited at 400°C in the co-deposition ranges x∼0 and x>1.5, while it forms more easily for layers deposited at room temperature in the co-deposition ratio range of x∼0.2–1.5. These dependencies are explained by the formation of crystalline silicide phase(s) with composition close to the co-deposition ratio. With a Si rich ratio, the C49-TiSi₂ phase forms at 400°C with very small grain size, which facilitates the C54-TiSi₂ phase formation. The initial reaction of Ti-rich layer deposited at 400°C involves the formation of metal rich silicide, which impedes the formation of the C54-TiSi₂ phase. An ultra-thin MoSi_2.0 layer (<0.5 nm) was found to promote the formation of the C54-TiSi₂ phase in layers co-deposited at room temperature, but it showed little effect on layers co-deposited on pre-amorphized substrates at elevated temperature.     

Microstructural and electrical investigation of Ni/Au ohmic contact on p-type GaN

Electrical properties of Ni/Au ohmic contacts on p-type GaN were interpreted with the change of microstructure observed under transmission electron microscopy. The contact resistivity was decreased from 1.3×10⁻² to 6.1×10⁻⁴ Ωcm² after annealing at 600°C. The reduction is due to the dissolution of Ga atoms into Au−Ni solid solution formed during annealing, via the generation of Ga vacancies. Thus, net concentration of holes increased below the contact, resulting in the reduction of contact resistivity. At 800°C, N atoms decomposed; reacted with Ni, and forming cubic Ni₄N. Consequently, N vacancies, acting as donors in GaN, were generated below the contact, leading to the increase of contact resistivity to 3.8×10⁻² Ωcm².     

Electrically Nonconductive Thermal Pastes with Carbon as the Thermally Conductive Component

Electrically nonconductive thermal pastes have been attained using carbon (carbon black or graphite) as the conductive component and ceramic (fumed alumina or exfoliated clay) as the nonconductive component. For graphite particles (5 μm), both clay and alumina are effective in breaking up the electrical connectivity, resulting in pastes with electrical resistivity up to 10¹³Ω·cm and thermal contact conductance (between copper surfaces of roughness 15 μm) up to 9 × 10⁴ W/m²·°C. For carbon black (30 nm), clay is more effective than alumina, providing a paste with resistivity 10¹¹ Ω·cm and thermal contact conductance 7 × 10⁴ W/m²·°C. Carbon black increases the thermal stability, whereas either graphite or alumina decreases the thermal stability. The antioxidation effect of carbon black is further increased by the presence of clay up to 1.5 vol.%. The addition of clay (up to 0.6 vol.%) or alumina (up to 2.5 vol.%) to graphite paste enhances the thermal stability.     

Structural and Passivative Behaviors of Cu(In) Thin Film

This investigation prepares a low-resistivity and self-passivated Cu(In) thin film. The dissociation behaviors of dilute Cu-alloy thin films, containing 1.5–5at.%In, were prepared on glass substrates by a cosputter deposition, and were subsequently annealed in the temperature range of 200–600 °C for 10–30 min. Thus, self-passivated Cu thin films in the form In₂O₃/Cu/SiO₂ were obtained by annealing Cu(In) alloy films at an elevated temperature. Structural analysis indicated that only strong copper diffraction peaks were detected from the as-deposited film, and an In₂O₃ phase was formed on the surface of the film by annealing the film at an elevated temperature under oxygen ambient. The formation of In₂O₃/Cu/SiO₂ improved the resistivity, adhesion to SiO₂, and passivative capability of the studied film. A dramatic reduction in the resistivity of the film occurred at 500 °C, and was considered to be associated with preferential indium segregation during annealing, yielding a low resistivity below 2.92 μΩcm. The results of this study can be potentially exploited in the application of thin-film transistor–liquid crystal display gate electrodes and copper metallization in integrated circuits.     

Evolution of Deep Defect Centers in Semi-Insulating 4H-SiC Substrates under High-Temperature Annealing

The influence of postgrowth high-temperature anneals between 1400°C and 2400°C on the behavior of the D₁ center in semi-insulating 4H-SiC was studied by photoluminescence. The optical signature of D₁ was observed up to 2400°C with intensity maxima at 1700°C and 2200°C. It was also found that changes in the postannealing cooling rate drastically influence the behavior of the D₁ center and the concentrations of the V_C, V_Si, V_C–V_Si, and V_C–C_Si lattice defects observed from electron paramagnetic resonance experiments. The change in intensity of the D₁ defect has some correlation with the intensity change of the V_C–V_Si pair defect at temperatures above 1900°C. In addition, infrared photoluminescence spectroscopy studies showed that changes in the intensity of the D₁ defect at 2100°C to 2400°C annealing temperatures and variable cool-down rates have close correlation with intensity changes of the UD2 defect.     

Copper-Silver Alloy for Advanced Barrierless Metallization

In this study we observed significantly improved properties, over a pure copper (Cu) film, for a copper-silver alloy film made with a pure copper film co-sputtered with a minute amount of either Ag_0.3N_0.4 or Ag_1.2N_0.7 on a barrierless Si substrate. In either case, no noticeable interaction between the film␣and the Si substrate was found after annealing at 600°C for 1 h. The Cu(Ag_0.3,N_0.4) film was thermally stable after annealing at 400°C for 240 h. The film’s resistivity was ∼2.2 μΩ cm after annealing at 600°C, while its leakage current was found to be lower than that of a pure Cu film by three orders of magnitude. The adhesion of the Cu(Ag_1.2,N_0.7) film to the Si substrate was approximately seven times that of a pure Cu film to a silicon substrate. Hence, a Cu film doped with Ag and N seems to be a better candidate for both barrierless metallization and the making of superior interconnects.     

Low temperature annealing behaviors of the titanium films formed by the ionized sputtering process on (001) silicon substrates

We investigated the low temperature reactions between the Ti films created by the ionized sputtering process and the (001) single crystal silicon wafers using high resolution transmission electron microscopy and x-ray diffractometry. We observed that the amorphous Ti-Si intermixed layer is formed at the Ti-Si interface whose thickness increased with the thickness of the deposited Ti films. The amorphous interlayer grew upon annealing treatments at the temperatures below 450°C. We also observed that the crystallization of the amorphous interlayer occurred upon annealing at 500°C. The first formed phase is Ti₅Si₃ in contact with Ti films, which is epitaxial with Ti films. Upon further annealing at 500°C, the Ti₅Si₄ phase and C49 TiSi₂ phase formed in the regions close to Ti films and Si substrates, respectively.