All-optical logic NOR gate using two-cascaded semiconductor optical amplifiers

The authors present a novel all-optical logic NOR gate using two-cascaded semiconductor optical. amplifiers (SOAs) in a counterpropagating feedback configuration. This configuration accentuates the gain nonlinearity due to the mutual gain modulation of the two SOAs. The all-optical NOR gate feasibility has been demonstrated delivering an extinction ratio higher than 12 dB over a wide range of wavelength.     

NAND/NOR logic circuit using single InP-based RTBT

Bias dependent NAND and NOR logic functions using a single InP-based resonant tunnelling bipolar transistor (RTBT) are presented. NAND and NOR functionality is experimentally demonstrated and compared to simulation results using HP MDS-software for the first time. The circuit benefits from the high breakdown voltage of the fabricated RTBT     

基于RST的SiGe/Si"或非"逻辑器件研究

文中通过利用耗尽层阻断沟道的方法,讨论了一种基于RST结构原理实现"或非"逻辑功能的器件结构.     

Monolithic arrays of surface emitting laser NOR logic devices

Monolithic, cascadable, laser-logic-device arrays have been realized and characterized. The monolithic surface-emitting laser logic (SELL) device consists of an AlGaAs superlattice lasing around 780 nm connected to a heterojunction phototransistor (HPT) in parallel and a resistor in series. Arrays up to 8×8 have been fabricated, and 2×2 arrays show uniform characteristics. The optical logic output is switched off with 40 μW incident optical input     

On the logic delay in MOS LSI static NOR designs

Conventional definitions of logic block delay are reviewed and a preferred one is proposed, on a statistical basis, for the static NOR circuits in an LSI MOSFET technology. According to this definition, the delay is based on the actual circuit thresholds depends minimally on the input transition rate and is always positive. Moreover critical pulsewidths are given directly in terms of block delays. Using this definition, the block and path delay statistics are derived for use in CAD simulation of chip logic and performance in some limited sense. Finally, examples are given illustrating the use of delay definition in chip delay and pulsewidth.     

非线性布尔函数的智能优化设计

引言在序列密码体制的设计中,布尔函数具有十分重要的作用。过去,布尔函数的选取通常采用随机生成和直接构造的方法,然而,这两种方法都存在着诸多的欠缺。随机生成方法需要一个很大的搜索空间,要找到非线性度高、自相关性低的布尔函数是非常困难的,直接构造的布尔函数能够使得所需要的一些性质达到最优,但其它某些密码学性质又可能比较差。近年来,各种机器学习和人工智能的相关算法(诸如“爬山算法”、“遗传算法”、和“模拟退火”算法等)     

Weighted sum threshold logic operation of MOBILE(monostable-bistable transition logic element) using resonant-tunnelingtransistors

The functional operation of the MOBILE (monostable-bistable transition logic element) has been studied using multiple-input logic gates. The MOBILE uses two resonant-tunneling transistors (RTTs) connected in series and driven by an oscillating bias voltage to produce a mono-to-bistable transition of the circuit. A MOBILE having three input gates with a 1:2:4 width ratio can distinguish all 8 (2³) input patterns corresponding to each weighted sum, depending on the threshold value selected by the control gate. The results confirm the realization of the weighted sum threshold logic operation of input signals     

基于线性光放大器全光逻辑或非门的仿真研究

为了实现全光逻辑的仿真运算,基于Simulink模块可视化的特点,根据线性光放大器交叉增益调制原理的理论模型,采用模块搭建的方法,实现了全光逻辑"或非"的运算。结果表明,通过Simulink的模块搭建,使其更好地仿真出逻辑"或非"输出结果;适当地选择注入电流组合,逻辑或非的运算效果越佳;由于模块化的结构容易进行修改和扩充,通过模块搭建用于更多的逻辑运算也是可行的。     

Multiple-input logic circuit design using BiCMOS-based negative differential resistance circuits

We first propose an inverter circuit design using the negative differential resistance (NDR) circuit composed of the standard Si-based n-channel metal-oxide-semiconductor field-effect-transistor (NMOS) and SiGe-based heterojunction bipolar transistor (HBT). By suitably designing the MOS width/length parameters, we can obtain the ??-type NDR current?Cvoltage (I?CV) characteristic. Expanding the inverter circuit operation, the two-input and four-input NOR logic gates are demonstrated. Especially, the design and fabrication of the logic circuit is based on the standard SiGe BiCMOS process. Compared to the traditional NDR device like resonant tunneling diode (RTD), our MOS?CHBT?CNDR-based applications are much easier to be combined with some Si-based or SiGe-based devices on the same chip.     

An integrated m-out-of-n detection circuit using threshold logic

The design of the integrated 4-out-of-9 detector is based on a threshold logic approach. A differential current-switching circuit configuration is used, and the detector is fully compatible with conventional emitter-coupled logic (ECL). The circuit has a propagation delay of 16 ns and dissipates only 100 mW. The functional power-delay product of 1600 pJ is an order of magnitude below that achieved with an efficient gate design.     

Logic circuit design using monostable-bistable transition logic element based on standard BiCMOS process

We present a monostable-bistable transition logic element (MOBILE) based on the negative-differential-resistance (NDR) circuit. In particular, this circuit can be completely implemented using the standard BiCMOS process. A traditional MOBILE using two resonant tunneling diodes (RTD) connected in series is a functional logic circuit. The fabrication of RTD is utilized in the complicated molecular-beam-epitaxy (MBE) system. However, we present a MOBILE circuit that is completely made of standard Si-based metal-oxide-semiconductor field effect transistors and SiGe-based heterojunction bipolar transistors. By suitably determining the control voltages and input conditions, we can obtain the operation of the inverter, AND and OR logic gates. We also demonstrate the latch characteristic of this MOBILE circuit. This logic circuit is fabricated using the standard 0.35 μm BiCMOS process without the need for the MBE system.     

Design of all-optical simultaneous AND,NAND, OR,and NOR logic gates using phase-based control of three coupled waveguides

In this paper, we present a novel phase-based structure for implementing the all-optical multi-function logic gates. The proposed structure which is composed of three coupled waveguides allows us to simultaneously access OR/NOR and AND/NAND logic functions from different output ports. The phase of middle waveguide plays the role of control tool which defines the logical values of outputs. The output ports can be switched from OR/NOR to AND/NAND logic functions by changing the control phase from 24\(^{\circ }\) to 237\(^{\circ }\), respectively. Beam propagation method has been employed in order to accomplish the simulations of light propagation.     

An all-optical remote controlled X-Nor logic using soliton pulse

We propose a new method to perform an ultra high speed all optical remote controlled X-NOR logic operation at a very long distance by exploiting the interaction ofhypersecant optical soliton pulses （HOSP）. To implement such logic operation, three HOSPs maintaining a particular condition are introduced into an optical fiber where they interact with each other. Two of them carry the input of the logic operation with the constant triggering of other HOSP.     

An all-optical remote controlled X-Nor logic using soliton pulse

We propose a new method to perform an ultra high speed all optical remote controlled X-NOR logic operation at a very long distance by exploiting the interaction of hypersecant optical soliton pulses (HOSP). To implement such logic operation,three HOSPs maintaining a particular condition are introduced into an optical fiber where they interact with each other. Two of them carry the input of the logic operation with the constant triggering of other HOSP.     

Fast floating-point normalisation unit realised using NOR planes

A new floating-point (FP) normalisation unit scheme is presented, that achieves enhanced performance by merging a leading zero counter (LZC) and a normalisation shifter. The LZC and the shift decoder are combined by using NOR planes to generate control signals directly to the normalisation shifter. The chip has been fabricated with a five-metal 0.18 μm CMOS process and performs the 64 bit FP normalisation within 1.4 ns     

All-optical multiple logic gates with XOR, NOR, OR, and NAND functions using parallel SOA-MZI structures: theory and experiment

The authors have proposed, simulated, and experimentally demonstrated all-optical multiple logic gates using two parallel semiconductor optical amplifier (SOA)-Mach-Zehnder interferometer (MZI) structures that enable simultaneous operations of various logic functions of XOR, NOR, OR, and NAND. The proposed scheme, which is optimized by adjusting the optical gain and phase differences in SOA-MZI structures with creative and systematic method, has great merits to achieve the reshaped output pulses with high extinction ratio and enable the high-speed operation at over 10 Gb/s through performance enhancement of SOAs. Its validity is confirmed through simulation and experiments at 2.5 and 10 Gb/s, respectively.     

Ultrafast integrable and reconfigurable XNOR, AND, NOR, and NOT photonic logic gate

A novel, simple, compact, and integrable scheme of reconfigurable and ultrafast photonic logic gate is demonstrated, based on a single semiconductor optical amplifier (SOA) and able to process ultrafast signals. XNOR function has been optically implemented exploiting four-wave mixing and cross-gain modulation in an SOA. The same scheme can be easily reconfigured to obtain AND, NOR, and NOT logic gates. Performances in terms of bit error rate for 20-ps return-to-zero signals at 10 Gb/s show a power penalty limited to 0.5 dB for all logic gates but the AND, which experiences regeneration (-2-dB power penalty) due to nonlinear SOA noise compression.     

非线性干涉滤光片开关特性及逻辑功能

应用干涉滤光片作为一种光学双稳器件,演示了光学逻辑开关功能。