Cure shrinkage measurement of nonconductive adhesives by means of a thermomechanical analyzer

The conductivity of a nonconductive adhesive (NCA) flip chip interconnect is completely dependent on the direct mechanical contact between the integrated circuit (IC) bump and substrate pad. Cure shrinkage of NCA is critical for the formation of the final contact force in the contacts. However, measurement of the cure shrinkage during cross-linking reaction is fairly difficult. This paper introduces a new, yet simple, approach to measure cure shrinkage of adhesives using a thermo-mechanical analyzer. Isothermal studies of shrinkage change as a function of curing show four distinct regions. First, the thickness of the epoxy decreases due to decreasing viscosity and applied load, followed by a stage where the dimension change is constant as the cross-linking reaction is yet to set in. Once cross-linking begins, the shrinkage reaches a maximum followed by a plateau where the cross-linking reaction has completed. Sharp changes of the slope of cure shrinkage versus degree of cure were observed to coincide with gelation and vitrification. After gelation, a linear relationship between the cure shrinkage and degree of cure was observed to extend until the occurrence of vitrification, which quenches the cross-linking reaction. Applied load in the range of 0.05 N was found to be optimal to minimize measurement errors.     

Characterization of nonconductive adhesives for flip-chip interconnection

For chip-level interconnection, nonconductive adhesive (NCA) is emerging as one of the promising substitutes for solder interconnection because of its inherent fine-pitch capability and environmental friendliness. The NCA interconnect relies on the mechanical connection between the contacts on the chip and corresponding contacts on the substrate enabled by the compressive stress created as the NCA epoxy cures. The degradation mechanism of NCA technology is, however, relatively less well understood compared to solder interconnects in terms of materials requirements for enhanced reliability performance. This study addresses the impact of material systems employed on the reliability of the packages. This involves characterization of NCA pastes in thermomechanical, hygroscopic swelling, and moisture diffusion properties. The reliability evaluation was carried out using electroless nickel/gold perimeter bumped test chips with daisy-chained connections. Analysis showed that interfacial delamination and open contact were the major failure modes in the NCA package. Pressure cooker test (PCT) performance was improved by using NCA with low-saturated moisture concentration, low coefficient of moisture expansion, and high adhesion. For better performance in the moisture sensitivity test (MST), the key properties required were high shear strength and low moisture diffusivity. Interestingly, filler content shows opposing behavior in the MST versus the PCT. Thus, optimum filler content must be found.     

Contact resistance and shear strength of the solder joints formed using Cu bumps capped with Sn or Ag/Sn layer

Solder joints were successfully bonded by joining Ag/Sn/Cu bumps and Ag/Sn/Cu layers at 200°C for 30 sec under 20 MPa, 40 MPa, and 80 MPa using thermo-compression bonder. The solder joints were aged at 150°C up to 1000 h. The strength of the solder joints was measured by the shear test and the contact resistance was measured using four-point probe method. The microstructure of the solder joints and the fracture modes after shear test were analyzed by scanning electron microscopy (SEM) with the energy-dispersive spectrometry (EDS). Results showed that the electrical resistance of the solder joints decreased, and the shear strength of the solder joints increased after aging treatment. The fracture modes were observed to move from the interfacial failure between solder and intermetallic compounds (IMCs) to the interfacial failure between IMCs. It was considered that the transition of fracture modes was closely related with the microstructure evolution of the solder joints, especially the transformation of IMC phases during the aging treatment.     

倒装芯片封装技术及内部应力检测技术探析

当前,倒装芯片封装技术已经成为相关领域的主流方法,但由于芯片、基板、焊球、下填料等材料具有差异化的热膨胀系数,导致封装过程中极易引入热应力,不利于保持芯片的性能及其可靠性。采用有效方法能够对倒装封装过程中所产生的应力进行检测,对于完善封装参数,提高产品可靠性,具有重要的现实意义。     

Geometrical effect of bump resistance for flip-chip solder joints: Finite-element modeling and experimental results

The bump resistance of flip-chip solder joints was measured experimentally and analyzed by the finite-element method. Kelvin structures for flip-chip solder joints were designed and fabricated to measure the bump resistance. The measured value was only about 0.9 mΘ at room temperature, which was much lower than that expected. Three-dimensional (3-D) modeling was performed to examine the current and voltage distribution in the joint. The simulated value was 7.7 mΘ, which was about 9 times larger than the experimental value. The current crowding effect was found to be responsible for the difference in bump resistance. Therefore, the measured bump resistance strongly depended on the layout of the Kelvin structure. Various layouts were simulated to investigate the geometrical effect of bump resistance, and a significant geometrical effect was found. A proper layout was proposed to measure the bump resistance correctly. The Kelvin structure would play an important role in monitoring void formation and microstructure changes during the electromigration of flip-chip solder joints.     

微电子封装用导电胶的研究进展

介绍了导电胶的组成、分类及与传统锡-铅焊料相比导电胶的优点。阐述了导电胶的导电机理、失效机理以及国内外的研究现状。     

金凸点热超声倒装焊工艺研究

系统地研究了金凸点热超声倒装焊工艺参数,结果表明:焊接压力越大,芯片剪切强度越大,其随着焊接压力的提高而升高。压力不足会导致凸点形变量不足,与基板接触程度不足,压力过大会造成凸点严重变形,凸点已完全平坦化,沿四周过度扩展,焊接压力约为35~45 g/球比较合理;超声功率在40%及以上,剪切力趋于平缓,根据试验结果,使用的超声功率应该从“剪切力/超声功率”曲线的“上坡段”选取,约40%比较合理;随着焊接时间的延长,剪切力先增大,后逐渐减小,对焊接时间而言,过长的超声时间是无效的,反而会使本来已实现焊接的界面反复摩擦和塑性形变而损伤,结合强度降低,合理的焊接时间为1 s左右。经试验考察,当前的焊接工艺参数,在经历长寿命,以及比较严苛的温度应力之后,具有较好的可靠性。     

A continuous contact resistance monitoring during the temperature ramp of anisotropic conductive adhesive film joint

In this study, a systematic experimental work was performed to evaluate the reliability of the anisotropic conductive adhesive film (ACF) joint at high temperature for flip-chip-on-flex (FCOF) assemblies. A four-point probe method was developed to measure the contact resistance at high temperature. Measurement was also conducted along the length of the chip. The correlation between the increased resistance and the failure mechanism was investigated using scanning electron microscopy (SEM). Initially, the contact resistance increased linearly with rising temperature, but later, it increased abruptly. This changeover was related to the glass-transition temperature (T_g) of the ACF matrix. The coefficient of thermal expansion (CTE) is very high at temperatures above T_g; thus, the ACF swells too much, reducing the mechanical contact of the particles with the bump and/or pad. Again, as the adhesive strength becomes weaker at temperatures above the glass transition, it is unable to resist the thermal stress of the flex. The cumulative thermal stress at the edges dislodges the particles from the interconnection. Even below T_g, the thermal stress at the edges is higher than the middle point. Thus, the contact resistance varied from the middle joint of the chip to that of the corner at the same high temperature. To reduce the contact resistance at the corner joint of the FCOF packages bonded by ACF, a square-shaped chip instead of a chip with a higher aspect ratio should be used. It was also suggested to use an adhesive with a higher glass-transition temperature and lower CTE.     

倒装芯片各向异性导电胶互连的剪切结合强度

采用冲击试验方法研究了各向异性导电胶膜(ACF)互连的玻璃和柔性基板上倒装芯片(COG和COF)的剪切结合强度.结果表明:COF比COG的剪切强度高.ACF的固化程度达85 %时有最大的结合强度.键合温度、导电颗粒状态、缺陷等因素对ACF互连的结合强度有较大影响,而键合压力的影响不大.     

Stability of Flip-Chip Interconnects Assembled with Al/Ni(V)/Cu-UBM and Eutectic Pb-Sn Solder During Exposure to High-Temperature Storage

The thermal stability of flip-chip solder joints made with trilayer Al/Ni(V)/Cu underbump metalization (UBM) and eutectic Pb-Sn solder connected to substrates with either electroless Ni(P)-immersion gold (ENIG) or Pb-Sn solder on Cu pad (Cu-SOP) surface finish was determined. The ENIG devices degraded more than 50 times faster than the Cu-SOP devices. Microstructural characterization of these joints using scanning and transmission electron microscopy and ion beam microscopy showed that electrical degradation of the ENIG devices was a direct result of the conversion of the as-deposited Ni(V) barrier UBM layer into a porous fine-grained V₃Sn-intermetallic compound (IMC). This conversion was driven by the Au layer in the ENIG surface finish. No such conversion was observed for the devices assembled on Cu-SOP surface finish substrates. A resistance degradation model is proposed. The model captures changes from a combination of phenomena including increased (1) intrinsic resistivity, (2) porosity, and (3) electron scattering at grain boundaries and surfaces. Finally, the results from this study were compared with results found in a number of published electromigration studies. This comparison indicates that degradation during current stressing in the Pb-Sn bump/ENIG system is in part due to current-crowding-induced Joule heating and the thermal gradients that result from localized Joule heating.     

国外微电子组装用导电胶的研究进展

介绍导电胶的组成、分类、较之于传统共晶锡铅焊料的优点以及导电胶的研究现状。重点阐述国外在导电胶导电机理研究、可靠性研究及新型高性能导电胶研制方面的现状和进展。     

Research on the contact resistance,reliability, and degradation mechanisms of anisotropically conductive film interconnection for flip-chip-on-flex applications

Although there have been many years of development, the degradation of the electrical performance of anisotropically conductive adhesive or film (ACA or ACF) interconnection for flip-chip assembly is still a critical drawback despite wide application. In-depth study about the reliability and degradation mechanism of ACF interconnection is necessary. In this paper, the initial contact resistance, electrical performance after reliability tests, and degradation mechanisms of ACF interconnection for flip-chip-on-flex (FCOF) assembly were studied using very-low-height Ni and Au-coated Ni-bumped chips. The combination of ACF and very-low-height bumped chips was considered because it has potential for very low cost and ultrafine pitch interconnection. Contact resistance changes were monitored during reliability tests, such as high humidity and temperature and thermal cycling. The high, initial contact resistance resulted from a thin oxide layer on the surface of the bumps. The reliability results showed that the degradation of electrical performance was mainly related to the oxide formation on the surface of deformed particles with non-noble metal coating, the severe metal oxidation on the conductive surface of bumps, and coefficient of thermal expansion (CTE) mismatch between the ACF adhesive and the contact conductive-surface metallization. Some methods for reducing initial contact resistance and improving ACF interconnection reliability were suggested. The suggestions include the removal of the oxide layer and an increase of the Au-coating film to improve conductive-surface quality, appropriate choice of conductive particle, and further development of better polymeric adhesives with low CTE and high electrical performance.     

Temperature and current-density distributions in flip-chip solder joints with Cu traces

Three-dimensional simulation was performed to investigate the temperature and current density distribution in flip-chip solder joints with Cu traces during current stressing. It was found that the Cu traces can reduce the Joule heating effect significantly at high stressing currents. When the solder joints were stressed by 0.6 A, the average temperature increases in solder bumps with the Al traces was 26.7°C, and it was deceased to 18.7°C for the solder joint with the Cu traces. Hot spots exist in the solder near the entrance points of the Al or Cu traces. The temperature increases in the hot spot were 29.3°C and 20.6°C, for solder joints with the Al traces and Cu traces, respectively. As for current density distribution, the maximum current density inside the solder decreased slightly from 1.66×10⁵ A/cm² to 1.46×10⁵ A/cm² when the Al traces were replaced by the Cu traces. The solder joints with the Cu traces exhibited lower Joule heating and current crowding effects than those with the Al traces, which was mainly attributed to the lower electrical conductivity of the Cu traces. Therefore, the solder joints with the Cu traces are expected to have better electromigration resistance.     

Prevention of spalling by the self-formed reaction barrier layer on controlled collapse chip connections under bump metallization

The spalling phenomenon on under bump metallization (UBM) is one of the current urgent reliability issues for the Pb-free solder implementation in flip chip technology. In this paper, we report that spalling of Ni thin UBM can be prevented during the soldering reaction, if a Cu reservoir is introduced into the structure of controlled collapse chip connections (C4) solder joints. Once molten Sn-3.5Ag solder was saturated with Cu atoms, Cu precipitated out as a layer of Cu-Sn compound on Ni thin UBM. The Cu-Sn compound layer served as a reaction barrier to retard the consumption of Ni thin UBM. So, spalling was retarded. After prolonged reflowing, Ni thin UBM was converted to ternary Cu-Sn-Ni compounds. Unlike interfaces of the Ni-Sn compound/Cr, the interface of the Cu-Sn-Ni compound/Cr was very stable and no spalling was found.     

混合式长波线列TDI红外探测器改进互连工艺研究

根据目前混合式红外焦平面互连工艺以及对长波线列延时积分红外探测器产量增长的需求,结合现有的工艺设备能力,开发出\"共片工艺\",以最大限度地提高在互连工艺段的生产效率.     

Effect of Al trace dimension on electromigration failure time of flip-chip solder joints

The effect of Al-trace dimension on electromigration of flip-chip solder joints was investigated. The Al trace dimension was found to have a significant influence on the electromigration failure time. When joints with Al traces 100 μm wide were stressed by 1.0 A at 100°C, failure times were 35 h, 1,700 h, and >3,000 h for joints with Al traces that were 2,550 μm, 1,700 μm, and 850 μm long, respectively. Solder joints with Al traces 40 μm wide and 2,550 μm long failed instantly at 0.6 A. The Joule heating effect was found to be responsible for the huge difference in failure time.     

倒装焊接技术及其发展

文章主要介绍了倒装片技术从起源到现在的发展状况,并对倒装片的工艺优点及电气方面的优点作出评价,提出倒装片将成为今后大型计算机组装工艺中的关键技术。     

先进的MEMS封装技术

从特殊的信号界面、立体结构、外壳、钝化和可靠性五个方面总结了MEMS封装的特殊性。介绍了几种当前先进的MEMS封装技术：倒装焊MEMS、多芯片(MCP)和模块式封装(MOMEMS)。最后强调,必须加强MEMS封装的研究。