Design for testability and built-in self test: a review

A summary is presented of a number of design-for-testability (DFT) and built-in self-test (BIST) schemes that can be used in modern VLSI circuits. The DFT methods presented are used to increase the controllability and observability of the circuit design. Partitioning, bus architectures, test-point insertion, and scan methods are discussed. On-chip hardware for real-time test-pattern generation and data compression are investigated. Several of the DFT methods are then combined to form BIST hardware configurations. Built-in evaluation and self-test (BEST), autonomous test, scan with random inputs, built-in logic block observer (BILBO), partitioning with BEST, test-point insertion with on-chip control, and combined test-pattern generation and data compression (CTGC) are considered. An overview of each BIST scheme is offered     

A model-based approach to sequential fault diagnosis - A best student paper award winner at IEEE Autotestcon 2005

Fault diagnosis is crucial for the reduction of test and integration time as well as downtime of complex systems. In this article, we present a model-based approach to derive tests and test sequences for sequential fault diagnosis. This approach offers advantages over methods that are based on test coverage of explicit fault states, represented in matrix form. Functional models are more easily adapted to design changes and constitute a complete information source for test selection on a given abstraction level. We introduce our approach and implementation with a theoretical example. We demonstrate its practical use in three case studies, and for these cases we obtain cost reductions of up to 59% compared to the matrix-based approach     

A Classical Parameter Identification Method and?a?Modern Test Generation Algorithm

Many methods have been presented for the testing and diagnosis of analog circuits. Each of these methods has its advantages and disadvantages. In this paper we propose a novel sensitivity analysis algorithm for the classical parameter identification method and a continuous fault model for the modern test generation algorithm, and we compare the characteristics of these methods. At present, parameter identification based on the component connection model (CCM) cannot ensure that the diagnostic equation is optimal. The sensitivity analysis algorithm proposed in this paper can choose the optimal set of trees to construct an optimal CCM diagnostic equation, and enhance the diagnostic precision. But nowadays increasing attention is being paid to test generation algorithms. Most test generation algorithms use a single value in the fault model. But the single values cannot substitute for the actual faults that may occur, because the possible faulty values vary over a continuous range. To solve this problem, this paper presents a continuous fault model for the test generation algorithm which has a continuous range of parameters. The test generation algorithm with this model can improve the treatment of the tolerance problem, including the tolerances of both normal and faulty parameters, and enhance the fault coverage rate. The two methods can be applied in different situations.     

Numerical Simulation of the Modulation Transfer Function in HgCdTe Detector Arrays

In this work, we develop a method for simulating the modulation transfer function (MTF) of infrared detector arrays, which is based on numerical evaluation of the detector physics. The finite-difference time-domain and finite element methods are used to solve the electromagnetic and electrical equations for the device, respectively. We show how the total MTF can be deconvolved to examine the effects of specific physical processes. We introduce the MTF area difference and use it to quantify the effectiveness of several crosstalk mitigation techniques in improving the system MTF. We then apply our simulation methods to two-thirds generation mercury cadmium telluride (HgCdTe) detector architectures. The methodology is general, can be implemented with commercially available software, has experimentally realizable analogs, and is extendable to other material systems and device designs.     

Conformance testing of protocols specified as communicating finitestate machines-a guided random walk based approach

We present a new approach for conformance testing of protocols specified as a collection of communicating finite state machines (FSMs). Our approach uses a guided random walk procedure. This procedure attempts to cover all transitions in the component FSMs. We also introduce the concept of observers that check some aspect of protocol behavior. We present the result of applying our method to two example protocols: full-duplex alternating bit protocol and the ATM-adaptation-layer-convergence protocol. Applying our procedure to the ATM adaptation layer, 99% of component FSMs edges can be covered in a test with 11692 input steps. Previous approaches cannot do conformance test generation for standard protocols (such as asynchronous transfer mode (ATM) adaptation layer) specified as a collection of communicating FSMs     

Multiplexing of millimeter-wave signals for fiber-radio links by direct modulation of a two-mode locked Fabry-Pe/spl acute/rot laser

In this paper, we introduce generation of multiplexed signals on the millimeter-wave bands for fiber-radio systems where an optical millimeter-wave generator is based on a two-mode locked Fabry-Pe/spl acute/rot (FP) slave laser, whose injection current is directly modulated by a signal source. We qualitatively consider the distortion of the millimeter-wave signals from the FP slave laser. The distortion components on the millimeter-wave bands are induced from the simultaneous modulation of the locked modes and the nonlinear modulation response of the FP laser. Two-tone modulation of the locked FP laser is examined to evaluate the dynamic range of the millimeter-wave signals against the second- and third-order distortion components. We also perform fiber transmission of three 156-Mb/s-BPSK signals on the 60-GHz band to demonstrate fiber-radio down-link systems. The total capacity of the down-link system is discussed. In addition, two methods for multicarrier generation on the millimeter-wave bands are proposed. Multicarrier generators supported by these methods can be used as local signals for up-link millimeter-wave signals. The first method is based on multitone modulation of the FP slave laser. We attempt the down-conversion of a 52-Mb/s ASK signal on the 60-GHz band by using the millimeter-wave local signals. The second method depends on the distorted modulation of the FP slave laser by using a single continuous wave signal where the DC-bias level of the FP laser's injection current is partly under the threshold value. We confirm that five carriers on the 60-GHz band are effectively generated by using the second method. Furthermore, the influences of the chromatic dispersion effects on the millimeter-wave local signals are investigated for both methods.     

A time-domain test for some types of nonlinearity

The bispectrum and third-order moment can be viewed as equivalent tools for testing for the presence of nonlinearity in stationary time series. This is because the bispectrum is the Fourier transform of the third-order moment. An advantage of the bispectrum is that its estimator comprises terms that are asymptotically independent at distinct bifrequencies under the hypothesis of linearity. An advantage of the third-order moment is that its values in any subset of joint lags can be used in the test, whereas when using the bispectrum the entire (or truncated) third-order moment is required to construct the Fourier transform. We propose a test for nonlinearity based upon the estimated third-order moment. We use the phase scrambling bootstrap method to give a nonparametric estimate of the variance of our test statistic under the hypothesis. Using a simulation study, we demonstrate that the test obtains its target significance level, with large power, when compared to an existing standard parametric test that uses the bispectrum. Further we show how the proposed test can be used to identify the source of nonlinearity due to interactions at specific frequencies. We also investigate implications for heuristic diagnosis of nonstationarity.     

A formal model for proving hardware timing properties and identifying timing channels

Timing channels are becoming a critical threat to hardware security. When exploited, secret information can be revealed by analyzing the execution time statistically. There are a variety of methods for detecting timing channels such as statistical analysis, testing and formal verification. However, existing methods cannot guarantee that the timing channels can be identified due to limited test coverage or high performance overhead. In this work, we introduce a novel model for evaluating timing variations of the hardware design. Furthermore, we propose a systematical solution that integrates time label enhanced tracking logic and formally verifies the timing invariant property of hardware designs in order to identify hardware timing channels. We demonstrate our solution on several hardware implementations, including arithmetic units, cryptographic cores and cache. The proof results show that our solution can detect hardware timing channels effectively.     

基于交互模式的隐私保护方法研究

In network environments, before meaningful interactions can begin, trust may need to be established between two interactive entities in which an entity may ask the other to provide some information involving privacy. Consequently, privacy protection and trust establishment become important in network interactions. In order to protect privacy while facilitating effective interactions, we propose a trust based privacy protection method. Our main contributions in this paper are as follows: (1) We introduce a novel concept of k sensitive privacy as a measure to assess the potential threat of inferring privacy; (2) According to trust and k sensitive privacy evaluation, our proposed method can choose appropriate interaction patterns with lower degree of inferring privacy threat; (3) By considering interaction patterns for privacy protection, our proposed method can overcome the shortcomings of some current privacy protection methods which may result in low interaction success rate. Simulation results show that our method can achieve effective interactions with less privacy loss.     

Test Generation for Mixed-Signal Devices Using Signal Flow Graphs

We describe a new reverse simulation approach to analog and mixed-signal circuit test generation that parallels digital test generation. We invert the analog circuit signal flow graph, reverse simulate it with good and bad machine outputs, and obtain test waveforms and component tolerances, given circuit output tolerances specified by the functional test needs of the designer. The inverted graph allows backtracing to justify analog outputs with analog input sinusoids. Mixed-signal circuits can be tested using this approach, and we present test generation results for two mixed-signal circuits and four analog circuits, one being a multiple-input, multiple-output circuit. This analog backtrace method can generate tests for second-order analog circuits and certain non-linear circuits. These cannot be handled by existing methods, which lack a fault model and a backtrace method. Our proposed method also defines the necessary tolerances on circuit structural components, in order to keep the output circuit signal within the envelope specified by the designer. This avoids the problem of overspecifying analog circuit component tolerances, and reduces cost. We prove that our parametric fault tests also detect all catastrophic faults. Unlike prior methods, ours is a structural, rather than functional, analog test generation method.     

A new switched current circuit fault diagnosis approach based on pseudorandom test and preprocess by using entropy and Haar wavelet transform

This paper presents a new switched current (SI) circuit fault diagnosis approach based on pseudorandom test and preprocess by using entropy and Haar wavelet transform. The proposed method has the capability to detect and identify faulty transistors in SI circuit by analyzing its time response. The use of pseudorandom sequences as a stimulate signal to SI circuit reduces the cost of testing and the overhead of the test generation circuit, and using entropy and Haar wavelet transform to preprocess the time response for feature extraction drastically improves the fault diagnosis efficiency. For both actual experiment and analysis of switched current filters in Z transform (ASIZ) simulation, a low-pass, a band-pass SI filter and a clock feed-through cancellation circuit have been used as test examples to verify the effectiveness of the proposed method. The result shows that the accuracy of fault recognition achieved is about 100% by analyzing low-frequency approximations entropy and high-frequency details entropy. Therefore, it indicates that the presented method is superior than other methods.     

多媒体技术与传统教学模式相结合的课程改革实践

怎样将多媒体技术与传统教学模式有机结合起来，在保证教学质量的前提下提高教学效率，是目前我们面临的新课题。近年来我们在电工类课程的教学研究中采用了查阅文献研究法、实验对比法、调查法和检测法，并着重注意解决好两个问题：一是如何避免多媒体课件仅仅只是教科书翻版的问题；二是在授课过程中如何根据不同教学内容选择不同的教学手段，采取有效措施弥补多媒体授课的缺陷，拓宽课堂为学生提供自我发挥的平台。因而取得了良好的教学效果。     

A new swarm-SVM-based fault diagnosis approach for switched current circuit by using kurtosis and entropy as a preprocessor

This paper presents a new fault diagnosis method for switched current (SI) circuits. The kurtoses and entropies of the signals are calculated by extracting the original signals from the output terminals of the circuit. Support vector machine (SVM) is introduced for fault diagnosis using the entropies and kurtoses as inputs. In this technique, a particle swarm optimization is proposed to optimize the SVM to diagnose switched current circuits. The proposed method can identify faulty components in switched current circuit. A low-pass SI filter circuit has been used as test beached to verify the effectiveness of the proposed method. The accuracy of fault recognition achieved is about 97 % although there are some overlapping data when tolerance is considered. A comparison of our work with Long et al. (Analog Integr Circuit Signal Process 66:93–102, 2011), which only used entropy as a preprocessor, reveals that our method performs well in the part of fault diagnostic accuracy.     

3-D electrical impedance tomography for piecewise constant domains with known internal boundaries

Electrical impedance tomography (EIT) is a badly posed inverse problem, but can be stabilized if one assumes that the conductivity is piecewise constant, with a relatively small number of distinct regions, and that the region boundaries are known, for example from prior anatomical imaging. With this assumption, we introduce a three-dimensional (3-D) boundary element method (BEM) model for the forward EIT map from injected currents to measured voltages, and 3-D inverse solutions for both BEM and the finite element method (FEM) which explicitly take into account the parameterization implied by the known boundary locations. We develop expressions for the Jacobians for both methods, since they are nonlinear, to more rapidly solve the inverse problem. We show simulation results in a torso geometry with the heart and lungs as inhomogeneities. In a simulation study, we could reconstruct the conductive values of some internal organs of a human torso with more than 92% accuracy even with inaccurate internal boundary locations, a randomized rather than constant conductivity profile (with the standard deviation of the Gaussian-distributed conductivities set to 20% of their mean values), signal to measurement noise of 50 dB, and with different meshes used for the forward and inverse problems. BEM and FEM perform similarly, leading to the conclusion that the choice between them should be based on secondary considerations such as computational efficiency or the need to model conductivity anisotropies     

Test Generation Algorithm for Linear Systems Based on Genetic Algorithm

This paper proposes a test generation algorithm combining genetic algorithm for fault diagnosis on linear systems. Most test generation algorithms just used a single value fault model. This test generation algorithm is based on a continuous fault model. This algorithm can improve the treatment of the tolerance problem, including the tolerances of both normal and fault parameters, and enhance the fault coverage rate. The genetic algorithm can be used to choose the characteristic values. The genetic algorithm can enhance precision of test generation algorithm especially for complex fitness functions derived from complex systems under test. The genetic algorithm can also further improve the fault coverage rate by reducing the loop number of divisions of the initial fault range. The experiments are carried out to show this test generation algorithm with a linear system and an integrated circuit.     

A subspace matching color filter design methodology for a multispectral imaging system.

In this paper, we present a methodology to design filters for an imaging system to improve the accuracy of the spectral measurements for families of reflective surfaces. We derive the necessary and sufficient conditions that the sensor space of the system must obey in order to measure the spectral reflectance of the surfaces accurately. Through simulations, we show how these conditions can be applied to design filters using a set of sample spectral data acquired from extracted teeth. For this set of data, we also compare our results to those of Wolski's method, a conventional filter design method which produces filters that recover tristimulus values of surfaces accurately under several illuminants. We show that our method produces filters that capture the spectral reflectance better given the same number of measurements. The errors in predicting the color of the sample data are much lower under every test illuminant when the filters designed with our method are used.     

On Design Validation Using Verification Technology

Despite great advances in the area of Formal Verification during the last ten years, simulation is currently the primary means for performing design verification. The definition of an accurate and pragmatic measure for the coverage achieved by a suite of simulation vectors and the related problem of coverage directed automatic test generation are of great importance. In this paper we introduce a new set of metrics, called the Event Sequence Coverage Metrics (ESCMs). Our approach is based on a simple and automatic method to extract the control flow of a circuit so that the resulting state space can be explored for validation coverage analysis and automatic test generation. During simulation we monitor, in addition to state and transition coverage, whether certain control event sequences take place or not. We then combine formal verification techniques, using BDDs as the underlying representation, with traditional ATPG and behavioral test generation techniques to automatically generate additional sequences which traverse uncovered parts of the control state graph, or exercise an uninstantiated control event sequence.     

Macro-Calibration in Sensor/Actuator Networks

We describe an ad-hoc localization system for sensor networks and explain why traditional calibration methods are inadequate for this system. Building upon previous work, we frame calibration as a parameter estimation problem; we parameterize each device and choose the values of those parameters that optimize the overall system performance. This method reduces our average error from 74.6% without calibration to 10.1%. We propose ways to expand this technique to a method of autocalibration for localization as well as to other sensor network applications.