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1.
In this paper we present a study of self-heating effects in nanoscale SOI (Silicon-On-Insulator) devices and conventional MOSFETs using an in-house electro-thermal particle-based device simulator. We first describe the key features of the electro-thermal Monte Carlo device simulator (the two-dimensional (2D) and the three-dimensional version (3D) of the tool) and then we present a series of representative simulation results that clearly illustrate the importance of self-heating in larger nanoscale devices made in SOI technology. Our simulation results for planar SOI devices (using 2D version of the tool) show that in the smallest devices considered, heat dissipation occurs in the contacts, not in the active channel region of the device. This is because of two factors: pronounced velocity overshoot effect and the smaller thermal resistance of the buried oxide layer. We propose methods in which heat can be effectively removed from the device by using silicon on diamond and silicon on AlN technologies. To simulate self heating in nanowire transistors, the 2D simulator was extended to three spatial dimensions. We study the interplay of Coulomb interactions due to the presence of a random trap at the source end of the channel in nanowire transistors, the influence of a positive and a negative trap on the magnitude of the on-current and the role of the potential barrier at the source end of the channel. Finally, we examine the importance of self-heating effects in conventional MOSFETs used for low-power applications. We find that the average temperature increase obtained with our simulator of about 10 K is almost identical to the value that has to be used in low-power circuit simulations.  相似文献   

2.
In this paper we summarize 6 years of work on modeling self-heating effects in nano-scale devices at Arizona State University (ASU). We first describe the key features of the electro-thermal Monte Carlo device simulator (the two-dimensional and the three-dimensional version of the tool) and then we present series of representative simulation results that clearly illustrate the importance of self-heating in larger nanoscale devices made in silicon on insulator technology (SOI). Our simulation results also show that in the smallest devices considered the heat is in the contacts, not in the active channel region of the device. Therefore, integrated circuits get hotter due to larger density of devices but the device performance is only slightly degraded at the smallest device size. This is because of two factors: pronounced velocity overshoot effect and smaller thermal resistance of the buried oxide layer. Efficient removal of heat from the metal contacts is still an unsolved problem and can lead to a variety of non-desirable effects, including electromigration. We propose ways how heat can be effectively removed from the device by using silicon on diamond and silicon on AlN technologies. We also study the interplay of Coulomb interactions due to the presence of a random trap at the source end of the channel and the self-heating effects. We illustrate the influence of a positive and a negative trap on the magnitude of the on-current and the role of the potential barrier at the source end of the channel.  相似文献   

3.
We present results from the simulation of the electrothermal behaviour of submicron wurtzite GaN/AlGaN High Electron Mobility Transistors (HEMTs). The simulator uses an iterative procedure which couples a Monte Carlo simulation with a fast Fourier series solution of the Heat Diffusion Equation (HDE). The results demonstrate the dependence of the extent of the thermal droop observed in the Ids-Vds characteristics and the device peak temperature on the device bias. The paper also investigates the effect of the inclusion of thermal self-consistency on the device microscopic properties and studies the dependence of the device electrothermal characteristics on the type of substrate material used.  相似文献   

4.
A modified Poisson equation able to take into account the influence of gates and a δ-doping in FETs and HEMTs is proposed. This equation can be solved self-consistently together with 1D transport equations along inhomogeneous transistor channels like those of the hydrodynamic or drift-diffusion approximations or with a Monte Carlo simulator used to describe carrier transport in n+nn+ structures.  相似文献   

5.
The three-dimensional stochastic drift–diffusion–Poisson system is used to model charge transport through nanoscale devices in a random environment. Applications include nanoscale transistors and sensors such as nanowire field-effect bio- and gas sensors. Variations between the devices and uncertainty in the response of the devices arise from the random distributions of dopant atoms, from the diffusion of target molecules near the sensor surface, and from the stochastic association and dissociation processes at the sensor surface. Furthermore, we couple the system of stochastic partial differential equations to a random-walk-based model for the association and dissociation of target molecules. In order to make the computational effort tractable, an optimal multi-level Monte–Carlo method is applied to three-dimensional solutions of the deterministic system. The whole algorithm is optimal in the sense that the total computational cost is minimized for prescribed total errors. This comprehensive and efficient model makes it possible to study the effect of design parameters such as applied voltages and the geometry of the devices on the expected value of the current.  相似文献   

6.
Results from the application of our electrothermal simulator to n-type 0.15 μm gate In0.15Ga0.85As-Al0.28Ga0.72As HEMT structures are presented. The simulator involves an iterative procedure which alternately solves the Heat Diffusion Equation (HDE) and executes a Monte Carlo electronic transport algorithm. The net thermal flux generated during each Monte Carlo stage, calculated from the net rate of phonon emission, is fed into the thermal solution; the resulting temperature map is then used in the following Monte Carlo iteration. The HDE is solved through application of a novel analytical thermal resistance matrix technique which allows calculation of temperatures solely within the region of interest while including the large-scale boundary conditions. A novel charge injection scheme is applied for the treatment of side ohmic contacts, which avoids anomalous generation of thermal flux in adjacent regions. The characteristic ‘thermal droop’ is found in the I-V characteristics of the simulated device. Associated temperature distributions are shown to be spatially non-uniform with peak values and spatial locations dependent upon bias and the length of the containing die. Electron drift velocities and energies along the HEMT channel exhibit the largest shift on the inclusion of thermal self-consistency below the drain end of the gate, not at the location of the temperature peak.  相似文献   

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For the purpose of investigating the role of self-heating effects on the electrical characteristics of nano-scale devices, we implemented a two-dimensional Monte Carlo device simulator that self-consistently includes the solution of the energy balance equations for both, acoustic and optical phonons. We find less degradation in the current in smaller device structures because of the more pronounced velocity overshoot.  相似文献   

10.
We propose a very fast hierarchical simulator to study the transport properties of silicon nanowire FETs. We obtain the transverse wave functions and the longitudinal effective masses and band-edges of the lowest conduction bands from a nearest-neighbor sp 3 d 5 s * tight-binding study of an infinite nanowire with null external potential. Then we plug these parameters into a self-consistent Poisson-Schrödinger solver, using an effective mass approach and considering the bands decoupled. We apply this method, which gives quantitatively correct results with notable time savings, for the simulation of transport in two different silicon nanowire FETs.  相似文献   

11.
A full-band Cellular Monte Carlo (CMC) approach is applied to the simulation of electron transport in AlGaN/GaN HEMTs with quantum corrections included via the effective potential method. The best fit Gaussian parameters of the effective potential method for different Al contents and gate biases are calculated from the equilibrium electron density. The extracted parameters are used for quantum corrections included in the full-band CMC device simulator. The charge set-back from the interface is clearly observed. However, the overall current of the device is close to the classical solution due to the dominance of polarization charge.  相似文献   

12.
A family of efficient quantum transport models for simulation of modern nanoscale devices is presented. These models are used for quantitative calculations of quantum currents in nanoscale electronic devices within our device simulator software. Specifically, we used them to simulate the tunneling current through thin barrier in vertical-cavity surface-emitting laser (VCSEL), direct and reverse tunnel currents through the tunnel junction, Schottky contact characteristics, and gate induced drain leakage (GIDL).  相似文献   

13.
To study the thermal effect in nano-transistors, a simulator solving self-consistently the Boltzmann transport equations for both electrons and phonons has been developed. It has been used to investigate the self-heating effects in a 20 nm-long double-gate MOSFET (Fig. 1). A Monte Carlo solver for electrons is coupled with a direct solver for the steady-state phonon transport. The latter is based on the relaxation time approximation. This method is particularly efficient to provide a deep insight of the out-of-equilibrium thermal dissipation occurring at the nanometer scale when the device length is smaller than the mean free path of both charge and thermal carriers. It allows us to evaluate accurately the phonon emission and absorption spectra in both real and energy spaces.  相似文献   

14.
We have developed a self-consistent quantum mechanical Monte Carlo device simulator that takes electron transport in quantized states into consideration. Two-dimensional quantized states in MOSFET channels are constructed from one-dimensional solutions of the Schrödinger equation at different positions along the channel, and the Schrödinger and Poisson equations are solved self-consistently in terms of electron concentration and electrostatic potential distribution. The channel electron concentration, velocity and drain currents are calculated with the one particle Monte Carlo approach incorporating the intra-valley acoustic phonon and inter-valley phonon scattering mechanisms. This simulator was applied to a 70 nm n-MOSFET transistor, and we found that current mostly flows through the lowest subband and transport is quasi-ballistic near the source junction. To quantitatively estimate the performance of advanced devices, we have developed an inversion carrier transport simulator based on a full-band model. Our simulation method enables us to evaluate device characteristics and analyze the transport properties of ultra-small MOSFETs.  相似文献   

15.
Efficiency of AlGaN/GaN HEMTs used in high power, high frequency applications is thought to be limited by parasitic thermal effects. In this study, we investigate coupled electrical and thermal transport in AlGaN/GaN HEMTs using an ensemble Monte Carlo model. Calculation of the non-equilibrium phonon population reveals a hot spot in the channel that is localized at low drain-source bias, but expands towards the drain at higher bias, significantly degrading channel mobility.  相似文献   

16.
A self-consistent Monte Carlo simulator for carbon-nanotube, field-effect transistors (CNTFETs) is reported. Transport is simulated in zigzag (n, 0) nanotubes having a coaxial gating geometry, and key aspects of the Monte Carlo implementation are described. The simulator is used to extract the channel mean-free path (MFP) of CNTFETs. Although the mean-free path of acoustic phonons in metallic tubes is known to be very large (on the order of a micron), our results show that the channel MFP is much shorter and bias dependent in CNTFETs, and that CNTFETs therefore operate near the ballistic limit only at channel lengths that are considerably shorter than those required for near-ballistic transport in metallic tubes.  相似文献   

17.
Monte Carlo remains an effective simulations methodology for the study of MOSFET devices well into the decananometre regime as it captures non-equilibrium and quasi-ballistic transport. The inclusion of quantum corrections further extends the usefulness of this technique without adding significant computational cost. In this paper we examine the impact of boundary conditions at the Ohmic contacts when Density Gradient based quantum corrections are implemented in a 3D Monte Carlo simulator. We show that Neumann boundary conditions lead to more stable and physically correct simulation results compared to the traditional use of Dirichlet boundary conditions.  相似文献   

18.
In this review paper we give an overview on the present state of the art in modeling heat transport in nanoscale devices and what issues we need to address for better and more successful modeling of future devices. We begin with a brief overview of the heat transport in materials and explain why the simple Fourier law fails in nanoscale devices. Then we elaborate on attempts to model heat transport in nanostructures from both perspectives: nanomaterials (the work of Narumanchi and co-workers) and nanodevices (the work of Majumdar, Pop, Goodson and recently Vasileska, Raleva and Goodnick). We use our own simulation results which we have used to examine heat transport in nanoscaling devices to point out some important issues such as the fact that thermal degradation does not increase as we decrease feature size due to the more pronounced non-stationary transport and ballistic transport effects in nanoscale devices. We also point out that instead of using SOI, if one uses Silicon on Diamond technology there is much less heat degradation and better spread of the heat in the Diamond material. We also point out that tools for thermal modeling of nanoscale devices need to be improved from the present state of the art as 3D tools are needed, for example, to simulate heat transport and electrical transport in a FinFET device. Better models than the energy balance equations for the acoustic and optical phonons what we presently use in our simulators are also welcomed. The ultimate goal is to design the tool that can be efficient enough but at the same time can simulate most accurately both electrons and phonons within the particle pictures by solving their corresponding Boltzmann transport equations self-consistently. Investigations in integration of Peltier coolers with CMOS technology are also welcomed and much needed to reduce the problem of heat dissipation in nanoscale devices and interconnects.  相似文献   

19.
A method for quantum transport simulations of nanowire (NW) field-effect transistors (FETs) with inelastic electron–phonon scattering processes incorporated is presented in this paper. The microscopic device Hamiltonian with realistic phonon spectrum and electron–phonon interaction is transformed into an equivalent low-dimensional transport model with discrete random phonon modes. The electron–phonon coupling constants are optimized in order to reproduce the inelastic scattering effects. Small size of the model and special form of the inelastic self-energy terms in the NEGF formalism make it a powerful tool to study dissipative transport in realistic NW transistors. The utility of the method is demonstrated by computing inelastic transport characteristics in Si NW FETs.  相似文献   

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