Molecular beam epitaxy growth of high-quality HgCdTe LWIR layers on polished and repolished CdZnTe substrates

We report here molecular beam epitaxy (MBE) mercury cadmium telluride (HgCdTe) layers grown on polished and repolished substrates that showed state-of-the-art optical, structural, and electrical characteristics. Many polishing machines currently available do not take into account the soft semiconductor materials, CdZnTe (CZT) being one. Therefore, a polishing jig was custom designed and engineered to take in account certain physical parameters (pressure, substrate rotational frequency, drip rate of solution onto the polishing pad, and polishing pad rotational velocity). The control over these parameters increased the quality, uniformity, and the reproducibility of each polish. EPIR also investigated several bromine containing solutions used for polishing CZT. The concentration of bromine, as well as the mechanical parameters, was varied in order to determine the optimal conditions for polishing CZT.     

CdZnTe(211)B衬底对MBE外延碲镉汞材料的影响分析

碲锌镉 CdZnTe（211）B 衬底广泛应用于碲镉汞（HgCdTe）分子束外延生长,其性能参数在很大程度上决定了碲镉汞分子束外延材料的质量。主要讨论了 CdZnTe（211）B 衬底几个关键性能参数对碲镉汞外延材料的影响,包括 Zn 组分及均匀性、缺陷（位错、孪晶及晶界和碲沉淀）以及表面状态（粗糙度和化学组成）,并且分析了对 CdZnTe（211）B 衬底进行筛分时各性能参数的评价方法和指标。     

Fabrication of Strain-Relaxed Si<Subscript>1 − <Emphasis Type="Italic">x</Emphasis></Subscript>Ge<Subscript>x</Subscript>/Si(001) Buffer Layers of Low Surface Roughness

The results are presented of the fabrication of strain-relaxed graded Si_{1 − x} Ge_x/Si(001) buffer layers with a maximum Ge fraction of about 0.25 that have a low density of threading dislocations (<10⁶ cm⁻²) and low surface roughness. The buffer layers are grown by atmospheric-pressure hydride CVD. It is found that chemical mechanical polishing can reduce their surface roughness to a level comparable with that of the original Si(001) substrates. It is shown that the polished buffer layers can serve as substrates for MBE-grown SiGe/Si heterostructures.__________Translated from Mikroelektronika, Vol. 34, No. 4, 2005, pp. 243–250.Original Russian Text Copyright © 2005 by Vostokov, Drozdov, Krasil’nik, Kuznetsov, Novikov, Perevoshchikov, Shaleev.     

Molecular-beam epitaxial growth of CdSe<Subscript>x</Subscript>Te<Subscript>1−x</Subscript> on Si(211)

We report on the first successful growth of the ternary-alloy CdSe_xTe_1−x(211) on 3-in. Si(211) substrates using molecular-beam epitaxy (MBE). The growth of CdSeTe was performed using a compound CdTe effusion source and an elemental Se effusion source. The alloy composition (x) of the CdSe_xTe_1−x ternary compound was controlled through the Se:CdTe flux ratios. Our results indicated that the crystalline quality of CdSeTe decreases as the alloy composition increases, which is possibly due to an alloy-disordering effect. A similar trend was observed for the CdZnTe ternary-alloy system. However, the alloy-disordering effect in CdSeTe was found to be less severe than that in CdZnTe. We have carried out the growth of CdSeTe on Si at different temperatures. An optimized growth window was established for CdSeTe on Si(211) to achieve high-crystalline-quality CdSeTe/Si layers with 4% Se. The as-grown layers exhibited excellent surface morphology, low surface-defect density (less than 500 cm⁻²), and low x-ray full width at half maximum (FWHM) values near 100 arcsec. Additionally, the CdSeTe/Si layer exhibited excellent lateral uniformity and the best etched-pit density (EPD) value on a 4% CdSeTe, measured to be as low as 1.4 × 10⁵ cm⁻².     

Mg2Si buffer layers on Si(100) prepared by a simple evaporation method

The formation of Mg₂Si(100), a_o= 6.39Å, on Si(100) substrates has been investigated. Mg was first evaporated onto Si(100) surfaces and Mg₂Si (100) films were formed in a subsequent annealing process. The Mg₂Si layers were characterized by x-ray diffraction and transmission electron microscopy analysis. Optical and scanning electron microscopy analysis show the surface morphology to be smooth. The films are stable under thermal cycling and exhibit low resistivity. Epitaxial films of Mg₂Si on Si(100) could be an ideal substrate for mercury cadmium telluride and antimonide based III-V semiconductor for mid-infrared devices because of its close lattice matching (the lattice misfit factor is less than 1.5%).     

Molecular beam epitaxial growth of Cd<Subscript>1−y</Subscript>Zn<Subscript>y</Subscript>Se<Subscript>x</Subscript>Te<Subscript>1−x</Subscript> on Si(211)

We report on the first successful growth of the quaternary alloy Cd_1−yZn_ySe_xTe_1−x(211) on 3-in. Si(211) substrates using molecular beam epitaxy (MBE). The growth of CdZnSeTe was performed using a compound CdTe effusion source, a compound ZnTe source, and an elemental Se effusion source. The alloy compositions (x and y) of the Cd_1−yZn_ySe_xTe_1−x quaternary compound were controlled through the Se/CdTe and ZnTe/CdTe flux ratios, respectively. Our results indicated that the surface morphology of CdZnSeTe improves as the Zn concentration decreases, which fits well with our previous observation that the surface morphology of CdZnTe/Si is poorer than that of CdSeTe/Si. Although the x-ray full-width at half-maximums (FWHMs) of CdZnSeTe/Si with 4% of Zn + Se remain relatively constant regardless of the individual Zn and Se concentrations, etched-pit density (EPD) measurements exhibit a higher dislocation count on CdZnSeTe/Si layers with about 2% Zn and Se incorporated. The enhancement of threading dislocations in these alloys might be due to an alloy disorder effect between ZnSe and CdTe phases. Our results indicate that the CdZnSeTe/Si quaternary material with low Zn or low Se concentration (less than 1.5%) while maintaining 4% total Zn + Se concentration can be used as lattice-matching composite substrates for long-wavelength infrared (LWIR) HgCdTe as an alternative for CdZnTe/Si or CdSeTe/Si.     

Integration of GaN thin films with dissimilar substrate materials by Pd-In metal bonding and laser lift-off

Gallium nitride (GaN) thin films grown on sapphire substrates were successfully bonded and transferred onto GaAs, Si, and polymer “receptor” substrates using a low-temperature Pd-In bond followed by a laser lift-off (LLO) process to remove the sapphire growth substrate. The GaN/sapphire structures were joined to the receptor substrate by pressure bonding a Pd-In bilayer coated GaN surface onto a Pd coated receptor substrate at a temperature of 200°C. X-ray diffraction showed that the intermetallic compound PdIn₃ had formed during the bonding process. LLO, using a single 600 mJ/cm², 38 ns KrF (248 nm) excimer laser pulse directed through the transparent sapphire substrate, followed by a low-temperature heat treatment, completed the transfer of the GaN onto the “receptor” substrate. Cross-sectional scanning electron microscopy and x-ray rocking curves showed that the film quality did not degrade significantly during the bonding and LLO process.     

4 in硅基碲化镉的厚度均匀性研究

采用分子束外延（Molecular Beam Epitaxy, MBE）方法在4 in硅衬底上进行了硅基碲化镉复合衬底生长工艺研究。使用光学轮廓仪、原子力显微镜、傅里叶红外光谱仪等设备对碲化镉薄膜进行了测试。结果表明,碲化镉薄膜的厚度均匀性、表面粗糙度、翘曲度和半峰宽等都达到了预期标准,能为外延碲镉汞薄膜提供良好的衬底。     

Correlation of CdZnTe(211)B substrate surface morphology and HgCdTe(211)B epilayer defects

We present results on the surface morphology and recombination lifetimes of molecular-beam epitaxy (MBE)-grown HgCdTe (211)B epilayers and correlate them with the roughness of the CdZnTe substrate surfaces. The substrate surface quality was monitored by in-situ spectroscopic ellipsometry (SE) and reflection high-energy electron diffraction (RHEED). The SE roughness of the substrate was measured after oxide desorption in the growth chamber. The RHEED patterns collected show a strong correlation with the SE roughness. This proves that SE is a valuable CdZnTe prescreening tool. We also found a correlation between the substrate roughness and the epilayer morphologies. They are characterized by a high density of thin elongated defects, “needle defects,” which appear on most samples regardless of growth conditions. The HgCdTe epilayers grown on these substrates were characterized by temperature-dependent, photoconductive decay-lifetime data. Fits to the data indicate the presence of mid-gap recombination centers, which were not removed by 250°C/24-h annealing under a Hg-rich atmosphere. These centers are believed to originate from bulk defects rather than Hg vacancies. We show that Te annealing and CdTe growth on the CdZnTe substrates smooth the surface and lower substantially the density of needle defects. Additionally, a variety of interfacial layers were also introduced to reduce the defect density and improve the overall quality of the epilayer, even in the presence of less than perfect substrates. Both the perfection of the substrate surface and that of its crystalline structure are essential for the growth of high-quality material. Thus, CdZnTe surface polishing procedures and growth techniques are crucial issues.     

Exfoliation and blistering of Cd<Subscript>0.96</Subscript>Zn<Subscript>0.04</Subscript>Te substrates by ion implantation

As part of a series of wafer bonding experiments, the exfoliation/blistering of ion-implanted Cd_0.96Zn_0.04Te substrates was investigated as a function of postimplantation annealing conditions. (211) Cd_0.96Zn_0.04Te samples were implanted either with hydrogen (5×10¹⁶ cm⁻²; 40–200 keV) or co-implanted with boron (1×10¹⁵ cm⁻²; 147 keV) and hydrogen (1–5×10¹⁶ cm⁻²; 40 keV) at intended implant temperatures of 253 K or 77 K. Silicon reference samples were simultaneously co-implanted. The change in the implant profile after annealing at low temperatures (<300°C) was monitored using high-resolution x-ray diffraction, atomic force microscopy (AFM), and optical microscopy. The samples implanted at the higher temperature did not show any evidence of blistering after annealing, although there was evidence of sample heating above 253 K during the implant. The samples implanted at 77 K blistered at temperatures ranging from 150°C to 300°C, depending on the hydrogen implant dose and the presence of the boron co-implant. The production of blisters under different implant and annealing conditions is consistent with nucleation of subsurface defects at lower temperature, followed by blistering/exfoliation at higher temperature. The surface roughness remained comparable to that of the as-implanted sample after the lower temperature anneal sequence, so this defect nucleation step is consistent with a wafer bond annealing step prior to exfoliation. Higher temperature anneals lead to exfoliation of all samples implanted at 77 K, although the blistering temperature (150–300°C) was a strong function of the implant conditions. The exfoliated layer thickness was 330 nm, in good agreement with the projected range. The “optimum” conditions based on our experimental data showed that implanting CdZnTe with H⁺ at 77 K and a dose of 5×10¹⁶/cm² is compatible with developing high interfacial energy at the bonded interface during a low-temperature (150°C) anneal followed by layer exfoliation at higher (300°C) temperature.     

Preparation and Characterization of Epitaxial Conductive Nb-SrTiO<Subscript>3</Subscript> Thin Films on Si Substrates

Epitaxial Nb-doped SrTiO₃ (001) thin films have been integrated on Si(001) single-crystal substrates with a TiN template layer by radio-frequency (RF) sputtering. The epitaxial growth of Nb-SrTiO₃ was achieved in an Ar environment at a substrate temperature of 540°C. The orientation relationship was determined to be simply cube-on-cube as Nb-SrTiO₃ (001)[110]||TiN(001) [110]||Si(001)[110]. The deposited Nb-SrTiO₃ films show a smooth and featureless surface with roughness below 1 nm. These smooth Nb-doped SrTiO₃/TiN/Si films have a conductivity of 500 S/cm and could be promising electrodes for subsequent ferroelectric thin films.     

Cadmium(1−x)zinc(x)telluride thin films deposited by sequential pulsed laser deposition

In this work, sequential pulsed laser deposition was used for the deposition of cadmium zinc telluride (CZT) thin films. CZT is a ternary II–VI compound semiconductor with a tunable band gap between 1.51 and 2.26 eV. In this work, three different CZT film compositions were achieved at room temperature by sequential deposition of nanometric layers with a precise number of laser shots on the cadmium telluride (CdTe) and zinc telluride (ZnTe) targets. XPS, XRD and UV–vis transmittance techniques were used to characterize the CZT films. The atomic content of zinc ranged from 60% down to 13%. This represents an enlargement of the lattice constant from 6.19 to 6.41 Å, and a band gap decrement from 1.94 to 1.55 eV. In addition, the CZT film resistivity can be modulated between the CdTe (4.1×10⁷ Ω-cm) and ZnTe (2.8×10⁵ Ω-cm) values. Our results demonstrated that the sequential pulsed laser deposition can be used to obtain several CZT film compositions with precise control of its stoichiometry and can be extended to the production of other ternary compounds.     

Ultra-Thin Si<Subscript>1−<Emphasis Type="Italic">x</Emphasis></Subscript>Ge<Subscript><Emphasis Type="Italic">x</Emphasis></Subscript> Dislocation Blocking Layers for Ge/Strained Si CMOS Devices

We demonstrate ultra-thin (<150 nm) Si_1−x Ge _x dislocation blocking layers on Si substrates used for the fabrication of tensile-strained Si N channel metal oxide semiconductor (NMOS) and Ge P channel metal oxide semiconductor (PMOS) devices. These layers were grown using ultra high vacuum chemical vapor deposition (UHVCVD). The Ge mole fraction was varied in rapid, but distinct steps during the epitaxial layer growth. This results in several Si_1−x Ge _x interfaces in the epitaxially grown material with significant strain fields at these interfaces. The strain fields enable a dislocation blocking mechanism at the Si_1−x Ge _x interfaces on which we were able to deposit very smooth, atomically flat, tensile-strained Si and relaxed Ge layers for the fabrication of high mobility N and P channel metal oxide semiconductor (MOS) devices, respectively. Both N and P channel metal oxide semiconductor field effect transister (MOSFETs) were successfully fabricated using high-k dielectric and metal gates on these layers, demonstrating that this technique of using ultra-thin dislocation blocking layers might be ideal for incorporating high mobility channel materials in a conventional CMOS process.     

Structural and Electronic Properties of Gold Contacts on CdZnTe with Different Surface Finishes for Radiation Detector Applications

State-of-the-art room-temperature, high-resolution x-ray and gamma-ray semiconductor detectors can be fabricated from CdZnTe (CZT) crystals. The structural and electronic properties of the CZT surface, especially the contact interfaces, can have a substantial effect on radiation detector performance, for example leakage current, signal-to-noise ratio, and energy resolution, especially for soft x-rays and large pixilated arrays. Atomically smooth and defect-free surfaces are desirable for high-performance CZT-based detectors; chemo-mechanical polishing (CMP) is typically performed to produce such surfaces. The electrical behavior of the metal/CZT interface varies substantially with surface preparation before contact deposition, and with choice of metal and deposition technique. We report a systematic study of the structural and electronic properties of gold (Au) contacts on CZT prepared with different surface finishes. We observed subsurface damage under Au contacts on CMP-finished CZT and abrupt interfaces for Au on chemically-polished (CP) CZT. Schottky barrier formation was observed for Au contacts, irrespective of surface finish, and less charge trapping and low surface resistance were observed for CP-finished surfaces. Pre-deposition surface treatment produced interfaces free from oxide layers.     

Wafer bonding for III–V on insulator structures

The InP and GaAs wafers were bonded to GaAs substrates using a siliconnitride intermediate layer. Key process parameters include the silicon-nitride surface roughness and density as determined by atomic-force microscopy and x-ray reflectivity. We demonstrate that silicon nitride can be bonded without any chemical-mechanical polishing step. Silicon-nitride films produced by plasma-enhanced chemical-vapor deposition (PECVD) and deposition by sputtering were compared for bonding compatibility. Smooth silicon-nitride layers (root-mean-square roughness <0.7 nm) were found to produce large areas of bonded material and an oxygen-plasma treatment (200 mtorr, 200 W, 60 s) produced strong nitride/nitride bonding. The strain in the InP layer after transfer to the GaAs substrate was determined using x-ray reciprocal-space mapping (RSM). The crystalline quality of the InP layer was examined with high-resolution x-ray scattering.     

CdZnTe Substrate Surface Preparation Technology at ASELSAN,Inc. for Molecular Beam Epitaxy Growth of High Quality HgCdTe Epilayers

High quality CdZnTe substrates with 4% ZnTe mole fraction are used for epitaxial growth of HgCdTe infrared detector layers. Molecular Beam Epitaxy (MBE) growth of HgCdTe epilayers requires high quality surface layer with sub-nanometer surface roughness values as well. We report on the development of a CdZnTe substrate surface preparation process for MBE growth of high quality HgCdTe epilayers. Surface preparation processes were performed on both commercially available CdZnTe substrates and substrates obtained from in-house grown CdZnTe boules. We developed a multi-step substrate surface processing flow to achieve sub-nanometer surface roughness, low total thickness variation (TTV), and wax or slurry residue free CdZnTe substrate surfaces. Each process step was optimized with the aim of removing the subsurface damage caused by the previous process step; so that we reduce the amount of damaged layer needed to be etched prior to epitaxy. Our developed surface preparation process can be applicable to commercially available CdZnTe substrates with high surface roughness and high TTV. This process was also optimized for as-cut CdZnTe slices. We are capable of processing typically 25 mm?×?25 mm CdZnTe substrates with achievable surface roughness values (R_rms) down to below 0.5 nm.     

Transition from the two- to three-dimensional growth of Ge films upon deposition onto relaxed SiGe/Si(001) buffer layers

The critical thickness of the two-dimensional growth of Ge on relaxed SiGe/Si(001) buffer layers different in Ge content is studied in relation to the parameters of the layers. It is shown that the critical thickness of the two-dimensional growth of Ge on SiGe buffer layers depends on the lattice mismatch between the film and the substrate and, in addition, is heavily influenced by Ge segregation during SiGe-layer growth and by variations in the growth-surface roughness upon the deposition of strained (stretched) Si layers. It is found that the critical thickness of the two-dimensional growth of Ge directly onto SiGe buffer layers with a Ge content of x = 11–36% is smaller than that in the case of deposition onto a Si (001) substrate. The experimentally detected increase in the critical thickness of the two-dimensional growth of Ge with increasing thickness of the strained (stretched) Si layer predeposited onto the buffer layer is attributed to a decrease in the growth-surface roughness and in the amount of Ge located on the surface as a result of segregation.     

Development of a Method for Chemical–Mechanical Preparation of the Surface of CdZnTe Substrates for HgCdTe-Based Infrared Focal-Plane Arrays

This paper reports the first implementation in our laboratory of a chemical–mechanical polishing (CMP) process for CdZnTe (CZT) substrates prepared for growth of HgCdTe layers by liquid phase epitaxy and molecular beam epitaxy. The process enables significant reduction of the thickness of the damaged zone induced by the mechanical polishing that must be etched away before epitaxy. Resulting improvements in surface morphology, in terms of waviness and density of point defects, are reported. The chemical state of surfaces polished by CMP was characterized by x-ray photoelectron spectroscopy. The chemical state was highly homogeneous; comparison with a reference surface is reported. End use assessment of this surface processing was compared with that of reference substrates by preparation of focal-plane arrays in the medium-wavelength infrared spectral range, by using epitaxial layers grown on substrates polished by different methods. The electro-optical performance of the detectors, in terms of photovoltaic noise operability, are reported. The results reveal that the state of this CMP surface is at the level of the best commercial substrates.     

Thermal stability and transformation of C<Subscript>60</Subscript> molecules deposited on silicon-coated (111) iridium

Thermal stability and transformation of C₆₀ molecules deposited onto a silicon film on (111) iridium have been studied in ultrahigh vacuum within the temperature range of 300–1900 K. The temperature range covered is shown to break up into four consecutive regions, each dominated by its own specific process; namely, thermal stability of C₆₀ films (T<600 K), desorption of fullerene molecules from the second and subsequent molecular layers (800–900 K), decomposition of these molecules in the first layer which contacts the substrate (650–850 K), graphitization of the carbon layer into a thermally stable two-dimensional graphite film (900–1700 K), and thermal desorption of carbon from the surface (T>1900 K). These processes retain their qualitative character as one passes from Si submonolayer films to (4–5)-monolayer-thick films.     

High-Vacuum Evaporation of <Emphasis Type="Italic">n</Emphasis>-CuIn<Subscript>3</Subscript>Se<Subscript>5</Subscript> Photoabsorber Films for Hybrid PV Structures

Thin films of Cu-In-Se (CISe) photoabsorber with an overall composition of CuIn₃Se₅ were deposited onto glass/indium tin oxide (ITO) substrates from a polycrystalline bulk CuIn₃Se₅ source using the high-vacuum evaporation technique. Thermal conditions for the substrates during the evaporation process and the subsequent annealing in vacuum were selected to prepare polycrystalline n-CuIn₃Se₅ photoabsorber layers for use in hybrid photovoltaic structures based on an inorganic photoabsorber and conductive polymer functional layers. The CISe layers were deposited at a substrate temperature of 200°C and were annealed at temperatures from 300°C to 500°C in vacuum. Part of the as-deposited CISe was annealed twice, in argon and in vacuum at 500°C. These layers exhibited high photosensitivity and photoconductivity when illuminated with white light at an intensity of 100 mW/cm². The results showed that the chalcopyrite structure of the prepared CISe photoabsorber films adhered well to the glass/ITO substrate. The average value of charge carrier concentration and the profile of charge carrier concentration in the annealed CISe photoabsorber layer were calculated using impedance spectroscopy.