Positive bias temperature instability effects of Hf-based nMOSFETs with various nitrogen and silicon profiles

Positive bias temperature instability (PBTI) effects of HfO/sub 2/-based nMOSFETs with various nitrogen profiles in HfO/sub 2/ were investigated. The nitrogen profile was modulated by an inserting Si layer (/spl sim/6/spl Aring/) into hafnium oxynitride gate dielectrics. The Si layer is used to trap nitrogen and to suppress nitrogen out-diffusion during subsequent anneals. Compared to control HfO/sub x/N/sub y/ without Si insertion, the Si-inserted HfO/sub x/N/sub y/ samples exhibited reduced PBTI degradation, especially if the Si layer was placed further from the Si interface. The improvement can be attributed to the reduction of oxide bulk trapped as well as reduced interface trapped charge generation resulting from compensation effect of inserted Si layer.     

Effects of interstitial oxygen defects at HfO/sub x/N/sub y//Si interface on electrical characteristics of MOS devices

Effects of the defects at high-/spl kappa/ dielectric/Si interface on the electrical characteristics of MOS devices are important issues. To study these issues, a low defect (denuded zone) at Si surface was formed by a high-temperature annealing in hydrogen atmosphere in this paper. Our results reveal that HfO/sub x/N/sub y/ demonstrates significant improvement on the electrical properties of MOS devices due to its low amount of the interstitial oxygen [O/sub i/] and the crystal-originated particles defects as well as small surface roughness at HfO/sub x/N/sub y//Si interface. The current-conduction mechanism of the HfO/sub x/N/sub y/ film at the low- and high-electrical field and high-temperature (T>100/spl deg/C) is dominated by Schottky emission and Frenkel-Poole (FP) emission, respectively. The trap energy level involved in FP conduction was estimated to be around 0.5eV. Reduced gate leakage current, stress-induced leakage current and defect generation rate, attributable to the reduction of defects at HfO/sub x/N/sub y//Si interface, were observed for devices with denuded zone. The variable rise and fall time bipolar-pulse-induced current technique was used to determine the energy distribution of interface trap density (D/sub it/). The results exhibit that relatively low D/sub it/ can be attributed to the reduction of defects at Si surface. By using denuded zone at the Si surface, HfO/sub x/N/sub y/ has demonstrated significant improvement on electrical properties as compared to SiO/sub x/N/sub y/.     

The Impact of Nitrogen Engineering in Silicon Oxynitride Gate Dielectric on Negative-Bias Temperature Instability of p-MOSFETs: A Study by Ultrafast On-The-Fly $I_{rm DLIN}$ Technique

Degradation of p-MOSFET parameters during negative-bias temperature instability (NBTI) stress is studied for different nitridation conditions of the silicon oxynitride (SiON) gate dielectric, using a recently developed ultrafast on-the-fly I_DLIN technique having 1-mus resolution. It is shown that the degradation magnitude, as well as its time, temperature, and field dependence, is governed by nitrogen (N) density at the Si/SiON interface. The relative contribution of interface trap generation and hole trapping to overall degradation as varying interfacial N density is qualitatively discussed. Plasma oxynitride films having low interfacial N density show interface trap dominated degradation, whereas relative hole trapping contribution increases for thermal oxynitride films having high N density at the Si/SiON interface.     

Effect of the composition on the electrical properties of TaSi/sub x/N/sub y/ metal gate electrodes

In this letter, the effect of silicon and nitrogen on the electrical properties of TaSi/sub x/N/sub y/ gate electrode were investigated. The TaSi/sub x/N/sub y/ films were deposited on SiO/sub 2/ using reactive cosputtering of Ta and Si target in Ar and N/sub 2/ ambient. The thermal stability of TaSi/sub x/N/sub y//SiO/sub 2//p-type Si stacks was evaluated by measuring the flatband voltage and equivalent oxide thickness at 400/spl deg/C and 900/spl deg/C in Ar. It was found that under high temperature anneals, Si-rich TaSi/sub x/N/sub y/ films increased and this was attributed to the formation of a reaction layer at the electrode-dielectric interface. Reducing the Si content alone did not prevent the formation of this reaction layer while removing Si completely by utilizing TaN resulted in work functions that were too high. The presence of both Si and N was deemed necessary and their content was critical in obtaining optimized TaSi/sub x/N/sub y/ gates that are suitable for NMOS devices.     

Silicon-on-insulator structures with a nitrogenated buried SiO<Subscript>2</Subscript> layer: Preparation and properties

Electrical properties of silicon-on-insulator (SOI) structures with buried SiO₂ layer implanted with nitrogen ions are studied in relation to the dose and energy of N⁺ ions. It is shown that implantation of nitrogen ions with doses >3 × 10¹⁵ cm⁻² and an energy of 40 keV brings about a decrease in the fixed positive charge in the oxide and a decrease in the density of surface stares by a factor of 2. An enhancement of the effect can be attained by lowering the energy of nitrogen ions. The obtained results are accounted for by interaction of nitrogen atoms with excess silicon atoms near the Si/SiO₂ interface; by removal of Si-Si bonds, which are traps of positive charges; and by saturation of dangling bonds at the bonding interface of the SOI structure.     

Room-temperature microfluidics packaging using sequential plasma activation process

A sequential plasma activation process consisting of oxygen reactive ion etching (RIE) plasma and nitrogen radical plasma was applied for microfluidics packaging at room temperature. Si/glass and glass/glass wafers were activated by the oxygen RIE plasma followed by nitrogen microwave radicals. Then, the activated wafers were brought into contact in atmospheric pressure air with hand-applied pressure where they remained for 24 h. The wafers were bonded throughout the entire area and the bonding strength of the interface was as strong as the parents bulk wafers without any post-annealing process or wet chemical cleaning steps. Bonding strength considerably increased with the nitrogen radical treatment after oxygen RIE activation prior to bonding. Chemical reliability tests showed that the bonded interfaces of Si/Si could significantly withstand exposure to various microfluidics chemicals. Si/glass and glass/glass cavities formed by the sequential plasma activation process indicated hermetic sealing behavior. SiO/sub x/N/sub y/ was observed in the sequentially plasma-treated glass wafer, and it is attributed to binding of nitrogen with Si and oxygen and the implantation of N/sub 2/ radical in the wafer. High bonding strength observed is attributed to a diffusion of absorbing water onto the wafer surfaces and a reaction between silicon oxynitride layers on the mating wafers. T-shape microfluidic channels were fabricated on glass wafers by bulk micromachining and the sequential plasma-activated bonding process at room temperature.     

Defect-enhanced visible electroluminescence of multi-energy silicon-implanted silicon dioxide film

White-light and blue-green electroluminescence (EL) of a multirecipe Si-ion-implanted SiO/sub 2/ (SiO/sub 2/:Si/sup +/) film on Si substrate are demonstrated. The blue-green photoluminescence (PL) is enhanced by the reaction of O/sub 3//spl equiv/Si-O-Si/spl equiv/O/sub 3//spl rarr/O/sub 3//spl equiv/Si-Si/spl equiv/O/sub 3/+O/sub interstitial/ during Si implantation. After annealing at 1100/spl deg/C for 180 min, the luminescence at both 415 and 455 nm is markedly enhanced by the complete activation of radiative defects, such as weak oxygen bonds, neutral oxygen vacancies (NOVs), and the precursors of nanocrystallite Si (E'/sub /spl delta// centers). Absorption spectroscopy and electron paramagnetic resonance confirm the existence of NOVs and E'/sub /spl delta// centers. The slowly rising E'/sub /spl delta//-related PL intensity reveals that the formation of nanocrystallite Si (nc-Si) requires longer annealing times and suggests that the activation energy for diffusion of excess Si atoms is higher than that of other defects in ion implanted SiO/sub 2/. The EL from the Ag-SiO/sub 2/:Si/sup +//n-Si-Ag metal-oxide-semiconductor diode changes from deep blue to green as the driving current increase from 0.28 to 3 A. The maximum white-light luminescent power is up to 120 nW at a bias current of 1.25 A.     

Characterization of interface defects related to negative-bias temperature instability in ultrathin plasma-nitrided SiON/Si1 0 0 systems

Interface defects related to negative-bias temperature instability (NBTI) in an ultrathin plasma-nitrided SiON/Si1 0 0 system were characterized by using conductance–frequency measurements, electron-spin resonance measurements, and synchrotron radiation X-ray photoelectron spectroscopy. It was confirmed that NBTI is reduced by using D₂-annealing instead of the usual H₂-annealing. Interfacial Si dangling bonds (P_b1 and P_b0 centers) were detected in a sample subjected to negative-bias temperature stress (NBTS). Although we suggest that NBTS also generates non-P_b defects, it does not seem to generate nitrogen dangling bonds. These results show that NBTI of the plasma-nitrided SiON/Si system is predominantly due to P_b depassivation. Plasma nitridation was also found to increase the P_b1/P_b0 density ratio, modify the P_b1 defect structure, and increase the latent interface trap density by generating Si suboxides at the interface. These changes are likely to be the causes of NBTI in ultrathin plasma-nitrided SiON/Si systems.     

Si基MOCVD生长AlN深陷阱中心研究

通过PL 谱和Raman谱对MOCVD生长Si基Al N的深陷阱中心进行了研究,发现三个深能级Et1 ,Et2 ,Et3,分别在Ev 上2 .6 1,3.10 ,2 .11e V.Et1 是由氧杂质和氮空位(或Al间隙原子)能级峰位靠近重合共同引起的,Et2 、Et3都是由于衬底Si原子扩散到Al N引起的.在Si浓度较低时,Si主要以取代Al原子的方式存在,产生深陷阱中心Et2 .Si浓度高于某个临界浓度时,部分Si原子以取代N原子位置的方式存在,形成深陷阱中心Et3.实验还表明,即使经高温长时间退火,Al N中Et1 和Et2 两个深陷阱中心也是稳定的     

Angle-resolved photoelectron spectroscopy on gate insulators

This work reviews the study of the chemical composition and the chemical structure of ultrathin oxynitride films using angle-resolved photoelectron spectroscopy. The nearest and the second nearest neighbors of a nitrogen atom in oxynitride films were determined from the deconvolution of N 1s spectra. It was found by applying maximum entropy concept to the angle resolved Si 2p and N 1s photoelectron spectra that the distribution of nitrogen atoms and their bonding configurations in oxynitride films formed by the plasma nitridation is quite different from those in oxynitride films formed by the interface nitridation.     

Properties of Si/sub 3/N/sub 4//Si/sub x/Ge/sub 1-x/ metal-insulator-semiconductor capacitors

The density of fast interface states was studied in Si/sub 3/N/sub 4//Si/sub 0.8/Ge/sub 0.2/ metal-insulator-semiconductor (MIS) capacitors. The interface state density does not appear to be strongly affected by the presence of a thin Si interlayer between the nitride and SiGe alloy. This is in contrast to the results when SiO/sub 2/ is used as the insulator material in similar structures.<>     

Si(001)外延ZnSe薄膜界面原子的结合与成键

基于密度泛函理论的第一性原理计算,通过对Si(001)和氮化Si(001)表面单层Zn/Se原子结合的方式,模拟ZnSe外延薄膜的二维生长模式,从单层原子结合能、界面原子电子得失、共价结合成键的角度解释了Zn/Se原子在衬底表面的黏附性问题,阐述了薄膜生长初期界面无定形Se出现等现象,分析了氮化Si(001)表面对薄膜二维均匀生长的作用,结果显示N的引入缓和了Si衬底的非极性共价结合与ZnSe原子间的极性离子键结合之间的异质差异。     

Role of anode hole injection and valence band hole tunneling on interface trap generation during hot carrier injection stress

Interface trap (N/sub IT/) generation and recovery due to broken /spl equiv/Si-H bonds at the Si/SiO/sub 2/ interface is studied during and after hot carrier injection (HCI) stress and verified by a two-dimensional reaction-diffusion model. N/sub IT/ generation and recovery characteristics do not correlate with channel hot electron (HE) density distribution (verified by Monte Carlo simulations). Anode hole injection, which is triggered by HE injection into the gate poly, and valence band hole tunneling, which is triggered for thinner oxides, must be invoked to properly explain experimental results. The observed hole-induced, not electron-induced, breaking of /spl equiv/Si-H bonds during HCI stress is also consistent with that for negative bias temperature instability stress.     

Hot-carrier stress effects on gate-induced-drain leakage current in n-channel MOSFETs studied by hydrogen/deuterium isotope effect

The degradation of gate-induced-drain leakage (GIDL) current under hot-carrier stress (HCS) has been studied in n-channel MOSFETs that were annealed in hydrogen (H) or deuterium (D). It is found that the degradation of GIDL current (I/sub GIDL/) can be effectively suppressed by deuterium passivation of interface traps. By using the H/D isotope effect, the impacts of oxide charge trapping (/spl Delta/N/sub ox/) and interface trap generation (/spl Delta/N/sub it/) on I/sub GIDL/ are successfully separated. The results indicate that, depending on stress and measurement conditions, I/sub GIDL/ may increase or decrease under HCS. /spl Delta/N/sub ox/ alters I/sub GIDL/ at high electric fields by varying the band-to-band tunneling current. /spl Delta/N/sub it/ alters I/sub GIDL/ at a low electric field by introducing a trap-assisted leakage component. Furthermore, evidence of hole trapping at the peak substrate current stress is indisputably presented for the first time and its impact on I/sub GIDL/ is discussed.     

Interface states and deep-level centers in silicon-on-insulator structures

Deep-level centers in a split-off silicon layer and trap levels were studied by deep-level transient spectroscopy both at the Si/SiO₂ interface obtained by direct bonding and also at the Si(substrate)/〈thermal SiO₂〉 interface in the silicon-on-insulator structures formed by bonding the silicon wafers and delaminating one of the wafers using hydrogen implantation. It is shown that the Si/〈thermal SiO₂〉 interface in a silicon-on-insulator structure has a continuous spectrum of trap states, which is close to that for classical metal-insulator-semiconductor structures. The distribution of states in the upper half of the band gap for the bonded Si/SiO₂ interface is characterized by a relatively narrow band of states within the range from E _c −0.17 eV to E _c −0.36 eV. Furthermore, two centers with levels at E _c −0.39 eV and E _c −0.58 eV are observed in the split-off silicon layer; these centers are concentrated in a surface layer with the thickness of up to 0.21 μm and are supposedly related to residual postimplantation defects. __________ Translated from Fizika i Tekhnika Poluprovodnikov, Vol. 35, No. 8, 2001, pp. 948–953. Original Russian Text Copyright ? 2001 by Antonova, Stano, Nikolaev, Naumova, Popov, Skuratov.     

Ge outdiffusion effect on flicker noise in strained-Si nMOSFETs

The flicker noise characteristics of strained-Si nMOSFETs are significantly dependent on the gate oxide formation. At high temperature (900/spl deg/C) thermal oxidation, the Si interstitials at the Si/oxide interface were injected into the underneath Si-SiGe heterojunction, and enhanced the Ge outdiffusion into the Si/oxide interface. The Ge atoms at Si/oxide interface act as trap centers, and the strained-Si nMOSFET with thermal gate oxide yields a much larger flicker noise than the control Si device. The Ge outdiffusion is suppressed for the device with the low temperature (700/spl deg/C) tetraethylorthosilicate gate oxide. The capacitance-voltage measurements of the strained-Si devices with thermal oxide also show that the Si/oxide interface trap density increases and the Si-SiGe heterojunction is smeared out due to the Ge outdiffusion.     

The role of the Mercury-Si Schottky-barrier height in /spl Psi/-MOSFETs

Pseudo-MOSFETs (/spl Psi/-MOSFET) are routinely used for silicon-on-insulator (SOI) material characterization, allowing threshold voltage, electron and hole mobility, doping density, oxide charge, interface trap density, etc. to be determined. The HgFET, one version of the /spl Psi/-MOSFET, uses mercury source and drain contacts. It is a very effective SOI test structure, but its current-voltage behavior is critically dependent on the Hg-Si interface. We have investigated this interface through current-voltage measurements of HgFETs and Schottky diodes and through device modeling. We show that modest barrier height changes of 0.2 eV lead to current changes of up to three orders of magnitude. Etching the Si surface in a mild HF :H/sub 2/O solution can easily change barrier heights and we attribute this behavior to Si surface passivation of dangling bonds. As this surface passivation diminishes with time, the Si surface becomes a more active generation site and the barrier height of the Hg-Si interface changes, taking on the order of 50-100 h at room temperature in air.     

The role of the mercury-Si Schottky-barrier height in /spl Psi/-MOSFETs

Pseudo-MOSFETs (/spl Psi/-MOSFET) are routinely used for silicon-on-insulator (SOI) material characterization, allowing threshold voltage, electron and hole mobility, doping density, oxide charge, interface trap density, etc. to be determined. The HgFET, one version of the /spl Psi/-MOSFET, uses mercury source and drain contacts. It is a very effective SOI test structure, but its current-voltage behavior is critically dependent on the Hg-Si interface. We have investigated this interface through current-voltage measurements of HgFETs and Schottky diodes and through device modeling. We show that modest barrier height changes of 0.2 eV lead to current changes of up to three orders of magnitude. Etching the Si surface in a mild HF :H/sub 2/O solution can easily change barrier heights and we attribute this behavior to Si surface passivation of dangling bonds. As this surface passivation diminishes with time, the Si surface becomes a more active generation site and the barrier height of the Hg-Si interface changes, taking on the order of 50-100 h at room temperature in air.     

Gate-first Germanium nMOSFET with CVD HfO/sub 2/ gate dielectric and silicon surface passivation

A gate-first self-aligned Ge n-channel MOSFET (nMOSFET) with chemical vapor deposited (CVD) high-/spl kappa/ gate dielectric HfO/sub 2/ was demonstrated. By tuning the thickness of the ultrathin silicon-passivation layer on top of the germanium, it is found that increasing the silicon thickness helps to reduce the hysteresis, fixed charge in the gate dielectric, and interface trap density at the oxide/semiconductor interface. About 61% improvement in peak electron mobility of the Ge nMOSFET with a thick silicon-passivation layer over the CVD HfO/sub 2//Si system was achieved.     

Al/AlN/Si MIS结构的电学性质

用S i(111)上M OCVD生长的晶态A lN制备出性能良好的A l/A lN/S i(111)M IS结构,用C-V技术首次系统研究了A l/A lN/S iM IS结构的电学性质。用A l/A lN/S iM IS结构的C-V技术测量了A lN的极化特性,得出A lN层的极化强度为-0.000 92 C/m2;揭示了A lN/S i界面存在连续分布的载流子陷阱态,给出了陷阱态密度在S i禁带中随能量的分布;还观察到A lN界面层存在Et-Ev(A lN)=2.55 eV的分立陷阱中心。