Soldering-induced Cu diffusion and intermetallic compound formation between Ni/Cu under bump metallization and SnPb flip-chip solder bumps

Nickel-based under bump metallization (UBM) has been widely used as a diffusion barrier to prevent the rapid reaction between the Cu conductor and Sn-based solders. In this study, joints with and without solder after heat treatments were employed to evaluate the diffusion behavior of Cu in the 63Sn-37Pb/Ni/Cu/Ti/Si₃N₄/Si multilayer structure. The atomic flux of Cu diffused through Ni was evaluated from the concentration profiles of Cu in solder joints. During reflow, the atomic flux of Cu was on the order of 10¹⁵–10¹⁶ atoms/cm²s. However, in the assembly without solder, no Cu was detected on the surface of Ni even after ten cycles of reflow. The diffusion behavior of Cu during heat treatments was studied, and the soldering-process-induced Cu diffusion through Ni metallization was characterized. In addition, the effect of Cu content in the solder near the solder/intermetallic compound (IMC) interface on interfacial reactions between the solder and the Ni/Cu UBM was also discussed. It is evident that the (Cu,Ni)₆Sn₅ IMC might form as the concentration of Cu in the Sn-Cu-Ni alloy exceeds 0.6 wt.%.     

倒装焊复合SnPb焊点应变应力分析

近年来,在微电子工业中,轻、薄、短、小是目前电子封装技术发展的趋势。因此,倒装焊技术应用越来越广,而焊点的可靠性在倒装焊技术中变得越来越重要。采用有限元软件,模拟、分析了焊点高度和下填料对焊点在热载荷作用下的应力应变值。     

Interfacial reaction and joint reliability of fine-pitch flip-chip solder bump using stencil printing method

This study was focused on the formation and reliability evaluation of solder joints with different diameters and pitches for flip chip applications. We investigated the interfacial reaction and shear strength between two different solders (Sn-37Pb and Sn-3.0Ag-0.5Cu, in wt.%) and ENIG (Electroless Nickel Immersion Gold) UBM (Under Bump Metallurgy) during multiple reflow. Firstly, we formed the flip chip solder bumps on the Ti/Cu/ENIG metallized Si wafer using a stencil printing method. After reflow, the average solder bump diameters were about 130, 160 and 190 μm, respectively. After multiple reflows, Ni₃Sn₄ intermetallic compound (IMC) layer formed at the Sn-37Pb solder/ENIG UBM interface. On the other hand, in the case of Sn-3.0Ag-0.5Cu solder, (Cu,Ni)₆Sn₅ and (Ni,Cu)₃Sn₄ IMCs were formed at the interface. The shear force of the Pb-free Sn-3.0Ag-0.5Cu flip chip solder bump was higher than that of the conventional Sn-37Pb flip chip solder bump.     

Thermosonic bonding of lead-free solder with metal bump for flip-chip bonding

While extensive research on the lead-free solder has been conducted, the high melting temperature of the lead-free solder has detrimental effects on the packages. Thermosonic bonding between metal bumps and lead-free solder using the longitudinal ultrasonic is investigated through numerical analysis and experiments for low-temperature soldering. The results of numerical calculation and measured viscoelastic properties show that a substantial amount of heat is generated in the solder bump due to viscoelastic heating. When the Au bump is thermosonically bonded to the lead-free solder bump (Sn-3%Ag-0.5%Cu), the entire Au bump is dissolved rapidly into the solder within 1 sec, which is caused by the scrubbing action of the ultrasonic. More reliable solder joints are obtained using the Cu/Ni/Au bump, which can be applied to flip-chip bonding.     

A reliability comparison of electroplated and stencil printed flip-chip solder bumps based on UBM related intermetallic compound growth properties

The effects of under bump metallurgy (UBM) microstructures on the intermetallic compound (IMC) growth of electroplated and stencil printed eutectic Sn-Pb solder bumps were investigated. The process parameters and their effects on UBM surface morphology and UBM shear strength were studied. For the electroplating process, the plating current density was the dominant factor to control the Cu UBM microstructure. For the stencil printing process, the zincation process has the most significant effect on the Ni UBM surface roughness and Ni grain sizes. In both processes, the good adhesion of UBM to aluminum can be obtained under suitable UBM processing conditions. Samples with different UBM microstructures were prepared using the two processes. The resulting samples were thermal aged at 85/spl deg/C, 120/spl deg/C, and 150/spl deg/C. It was observed that the Cu UBM surface roughness had larger effect on the IMC growth and solder ball shear strength than the Ni UBM surface roughness. The thickness of Cu/sub 3/Sn and Cu/sub 6/Sn/sub 5/ IMC depended strongly on the UBM microstructure. However, for Ni/Au UBM, no significant dependence was observed. More likely, the thickness of Au-Ni-Sn IMC near the IMC/solder interface was controlled by the amount of gold and the gold diffusion rate in the solder. Shear tests were performed after thermal aging tests and thermal/humidity tests. Different failure modes of different sample groups were analyzed. Electroless Ni UBM has been developed because it is a mask-less, low-cost process compared to electroplated Cu UBM. This study demonstrated that the process control was much easier for Ni UBM due to its lower reactivity with Sn material. These properties made Ni UBM a promising candidate for the lead-free solder applications.     

Effect of polyimide baking on bump resistance in flip-chip solder joints

The effect of polyimide (PI) thermal process on the bump resistance of flip-chip solder joint is investigated for 28 nm technology device with aggressive extreme low-k (ELK) dielectric film scheme and lead-free solder. Kelvin structure is designed in the bump array to measure the resistance of single solder bump. An additional low-temperature pre-baking before standard PI curing increases the bump resistance from 9.3 mΩ to 225 mΩ. The bump resistance increment is well explained by a PI outgassing model established based on the results of Gas Chromatography–Mass Spectrophotometer (GC–MS) analysis. The PI outgassing substances re-deposit on the Al bump pad, increasing the resistance of interface between under-bump metallurgy (UBM) and underneath Al pad. The resistance of interface is twenty-times higher than pure solder bump, which dominates the measured value of bump resistance. Low-temperature plasma etching prior to UBM deposition is proposed to retard the PI outgassing, and it effectively reduces the bump resistance from 225 mΩ to 10.8 mΩ.     

Electromigration-induced UBM consumption and the resulting failure mechanisms in flip-chip solder joints

Eutectic PbSn flip chip solder joint was subjected to 5×10³ A/cm² current stressing at 150°C and 3.5 × 10⁴ A/cm² current stressing at 30°C. The under bump metallurgy (UBM) on the chip was sputtered Ni/Cu, and the substrate side was a thick Cu trace. It was shown through in-situ observation that the local temperature near the entrance of electrons from the Al interconnect to the solder became higher than the rest of the joint. The accelerated local Ni UBM consumption near the entrance was also observed. Once the Ni was consumed at a location, a porous structure formed, and the flow of the electrons was blocked there. It was found that the formation of the void and the formation of the porous structure were competing with each other. If the porous structure formed first, then the void would not be able to nucleate there. On the other hand, if the void could nucleate before the UBM above lost its conductivity, then the joint would fail by the void formation-and-propagation mechanism.     

Effect of Cu stud microstructure and electroplating process onintermetallic compounds growth and reliability of flip-chip solder bump

In electroplating-based flip-chip technology, the Cu stud and solder deposition processes are two of the most important factors affecting the reliability of solder joints. The growth of Cu-Sn intermetallic compounds (IMC) also plays a critical role. In this paper, the effect of Cu stud surface roughness and microstructures on the reliability of solder joint was studied. The surface roughness of the Cu stud was increased as the Cu electroplating current density increased. The microstructural morphology of the Cu-Sn IMC layer was affected by Cu stud surface structure. We found the growth rate of IMC layer increased with the increasing of Cu stud grain size and surface roughness during aging test. The growth kinetics of Cu-Sn intermetallic compound formation for 63Sn/37Pb solder followed the Arrhenius equation with activation energy varied from 0.78 eV to 1.14 eV. The ratios of Cu₃ Sn layer thickness to the total Cu-Sn IMC layer thickness was in the range of 0.5 to 0.15 for various Cu microstructures at 150°C during thermal aging test. The shear strength of solder bump was measured after thermal aging and temperature/humidity tests. The relationship between electroplating process and reliability of solder joints was established. The failure mode of solder joints was also analyzed     

Thermal cycling analysis of flip-chip solder joint reliability

The reliability concern in flip-chip-on-board (FCOB) technology is the high thermal mismatch deformation between the silicon die and the printed circuit board that results in large solder joint stresses and strains causing fatigue failure. Accelerated thermal cycling (ATC) test is one of the reliability tests performed to evaluate the fatigue strength of the solder interconnects. Finite element analysis (FEA) was employed to simulate thermal cycling loading for solder joint reliability in electronic assemblies. This study investigates different methods of implementing thermal cycling analysis, namely using the "dwell creep" and "full creep" methods based on a phenomenological approach to modeling time independent plastic and time dependent creep deformations. There are significant differences between the "dwell creep" and "full creep" analysis results for the flip chip solder joint strain responses and the predicted fatigue life. Comparison was made with a rate dependent viscoplastic analysis approach. Investigations on thermal cycling analysis of the temperature range, (ΔT) effects on the predicted fatigue lives of solder joints are reported     

Mechanism of interfacial reaction for the Sn-Pb solder bump with Ni/Cu under-bump metallization in flip-chip technology

Nickel-based under-bump metallization (UBM) has been widely used in flip-chip technology (FCT) because of its slow reaction rate with Sn. In this study, solder joints after reflows were employed to investigate the mechanism of interfacial reaction between the Ni/Cu UBM and eutectic Sn-Pb solder. After deliberate quantitative analysis with an electron probe microanalyzer (EPMA), the effect of Cu content in solders near the interface of the solder/intermetallic compound (IMC) on the interfacial reaction could be probed. After one reflow, only one layered (Ni_1−x,Cu_x)₃Sn₄ with homogeneous composition was found between the solder bump and UBM. However, after multiple reflows, another type of IMC, (Cu_1−y,Ni_y)₆Sn₅, formed between the solder and (Ni_1−x,Cu_x)₃Sn₄. It was observed that if the concentration of Cu in the solders near the solder/IMC interface was higher than 0.6 wt.%, the (Ni_1−x,Cu_x)₃Sn₄ IMC would transform into the (Cu_1−y,Ni_y)₆Sn₅ IMC. The Cu contents in (Ni_1−x,Cu_x)₃Sn₄ were altered and not uniformly distributed anymore. With the aid of microstructure evolution, quantitative analysis, elemental distribution by x-ray color mapping, and related phase equilibrium of Sn-Ni-Cu, the reaction mechanism of interfacial phase transformation between the Sn-Pb solder and Ni/Cu UBM was proposed.     

Effect of bump size on current density and temperature distributions in flip-chip solder joints

Three dimensional thermo-electrical analysis was employed to simulate the current density and temperature distributions for eutectic SnAg solder bumps with shrinkage bump sizes. It was found that the current crowding effects in the solder were reduced significantly for smaller solder joints. Hot-spot temperatures and thermal gradient were increased upon reducing the solder. The maximum temperature for solder joint with 144.7 μm bump height is 103.15 °C which is only 3.15 °C higher than the substrate temperature due to Joule heating effect. However, upon reducing the bump height to 28.9 μm, the maximum temperature in the solder increased to 181.26 °C. Serious Joule heating effect was found when the solder joints shrink. The higher Joule heating effect in smaller solder joints may be attributed to two reasons, first the increase in resistance of the Al trace, which is the main heating source. Second, the average and local current densities increased in smaller bumps, causing higher temperature increase in the smaller solder bumps.     

Evaluation of solder joint reliability in flip-chip packages during accelerated testing

The microstructural investigation and thermomechanical reliability evaluation of the Sn-3.0Ag-0.5Cu solder bumped flip-chip package were carried out during the thermal shock test of the package. In the initial reaction, the reaction product between the solder and Cu mini bump of chip side was Cu₆Sn₅ intermetallic compound (IMC) layer, while the two phases which were (Cu,Ni)₆Sn₅ and (Ni,Cu)₃Sn₄ were formed between the solder and electroless Ni-P layer of the package side. The cracks occurred at the corner solder joints after the thermal shocks of 400 cycles. The primary failure mechanism of the solder joints in this type of package was confirmed to be thermally-activated solder fatigue failure. The premature brittle interfacial failure sometimes occurred in the package side, but nearly all of the failed packages showed the occurrence of the typical fatigue cracks. The finite-element analyses were conducted to interpret the failure mechanisms of the packages, and revealed that the cracks were induced by the accumulation of the plastic work and viscoplastic shear strains.     

Geometrical effect of bump resistance for flip-chip solder joints: Finite-element modeling and experimental results

The bump resistance of flip-chip solder joints was measured experimentally and analyzed by the finite-element method. Kelvin structures for flip-chip solder joints were designed and fabricated to measure the bump resistance. The measured value was only about 0.9 mΘ at room temperature, which was much lower than that expected. Three-dimensional (3-D) modeling was performed to examine the current and voltage distribution in the joint. The simulated value was 7.7 mΘ, which was about 9 times larger than the experimental value. The current crowding effect was found to be responsible for the difference in bump resistance. Therefore, the measured bump resistance strongly depended on the layout of the Kelvin structure. Various layouts were simulated to investigate the geometrical effect of bump resistance, and a significant geometrical effect was found. A proper layout was proposed to measure the bump resistance correctly. The Kelvin structure would play an important role in monitoring void formation and microstructure changes during the electromigration of flip-chip solder joints.     

Thermal cycling reliability of SnAgCu and SnPb solder joints: A comparison for several IC-packages

This paper deals with a comparison study between SnPb and SnAgCu solder joint reliability. The comparison is based on non-linear finite element modelling. Three packages have been selected: silicon CSP, underfilled flip chip and QFN package. Also the effect of thermal cycling conditions has been investigated. Comparing the induced inelastic strains in the solder joint, the lead-free SnAgCu generally scores better thanks to the lower creep strain rate. On the other hand for the CSP and flip chip package, SnAgCu scores worse for the more extreme loading conditions when the inelastic dissipated energy density is selected as damage parameter. The main reason is that due to the lower creep strain rate, the stresses become higher for SnAgCu resulting in higher hysteresis loops with more dissipated energy per cycle. For the QFN package, SnAgCu scores much better.     

Residual stress and interfacial reaction of the electroplated Ni-Cu alloy under bump metallurgy in the flip-chip solder joint

Pure Ni, the Ni-Cu alloy, and pure Cu layers as the under bump metallurgy (UBM) for a flip-chip solder joint were deposited by electrolytic plating. For the pure Ni layer, residual stress can be controlled by adding a wetting agent and decreasing current density, and it is always under tensile stress. The Ni-Cu alloys of different Cu compositions from ∼20wt.%Cu to 100wt.%Cu were deposited with varying current density in a single bath. The residual stress was a strong function of current density and Cu composition. Decreasing current density and increasing Cu content simultaneously causes the residual stress of the metal layers to sharply decrease. For the pure Cu layer, the stress is compressive. The Cu layer acts as a cushion layer for the UBM. The residual stress of the UBM strongly depends on the fraction of the Cu cushion layer. Interfacial reaction of the UBM with Sn-3.5 wt.% Ag was studied. As the Cu contents of Ni-Cu alloys increased, the dissolution rate increased. Several different intermetallic compounds (IMCs) were found. The lattice constants of alloys and the IMC increase with increasing Cu contents because the larger Cu atoms substitute for the smaller Ni atoms in the crystallites. The Cu content of the IMC are strongly dependent on the composition of the alloys. Ball shear tests were done with different metal-layer schemes. The failure occurs through the IMC and solder.     

Temperature profile effects in accelerated thermal cycling of SnPb and Pb-free solder joints

Accelerated thermal cycling (ATC) has been widely used in the microelectronics industry for reliability assessment. ATC testing decreases life cycle test time by one or more of the following means: increasing the heating and cooling rate, decreasing the hold time, or increasing the range of the applied temperature. The relative effect of each of these cycle parameters and the failure mechanisms they induce has been the subject of many studies; however uncertainty remains, particularly regarding the role of the heating and cooling rate. In this research, three conditions with two ramp rates (14 °C/min and 95 °C/min) and two temperature ranges (ΔT = 0–100 °C and −40 to 125 °C) were applied to resistor 2512 and PBGA 256 test vehicles assembled with SnPb and Pb-free solders. The test results showed that the higher ramp rate reduced the testing time while retaining the same failure modes, and that the damage per cycle increased with the temperature difference. For the resistors, the Pb-free solder joints lasted longer than the SnPb joints at the smaller ΔT, but were inferior at the larger ΔT. In contrast, the Pb-free solder joints in the PBGA test vehicles lasted longer than the SnPb solder under both conditions.     

Underfill constraint effects during thermomechanical cycling of flip-chip solder joints

The presence of an “underfill” encapsulant between a microelectronic device and the underlying substrate is known to substantially improve the thermal fatigue life of flip-chip (FC) solder joints, primarily due to load-transfer from the solder to the encapsulant. In this study, a new single joint-shear (SJS) test, which allows the measurement of the strain response of an individual solder ball during thermomechanical cycling (TMC), has been used to investigate the impact of the constraint imposed by the underfill on a solder joint. Finite element (FE) modeling has been used to demonstrate that the SJS sample geometry captures most of the deformation characteristics of an FC joint and to provide insight into experimental observations. It has been shown that the strain response of a eutectic Pb-Sn solder joint is influenced significantly by in-situ microstructural coarsening during TMC, which in turn is dependent on the underfill properties. In general, underfill properties, which allow the imposition of large compressive-hydrostatic stresses on the solder joint, were the most effective in reducing coarsening. Phase coarsening prevented the stabilization of the stress-strain response of the solder, even in the absence of crack damage, and was found to depend strongly on the local inelastic-strain state within the joint. This necessitates that future solder deformation models account for strain-history-dependent microstructural evolution and that underfill properties be optimized to minimize the extent of coarsening during TMC in order to maximize joint life.     

On the design parameters of flip-chip PBGA package assembly foroptimum solder ball reliability

An experimental investigation of the warpage of a flip-chip plastic ball grid array package assembly is presented and a critical deformation mode is identified. The experimental data, documented while cooling the assembly from the underfill curing temperature to -40°C, clearly reveal the effect of the constraints from the chip and the PCB on the global behavior of the substrate. The constraints produce an inflection point of the substrate at the edge of the chip. An experimentally verified three-dimensional (3-D) nonlinear finite element analysis proceeds to quantify the effect of the substrate behavior on the second-level solder ball strains. An extensive parametric study is conducted to identify the most critical design parameter for optimum solder ball reliability     

Intermetallic compound formation and morphology evolution in the 95Pb5Sn flip-chip solder joint with Ti/Cu/Ni under bump metallization during reflow soldering

Intermetallic compound formation and morphology evolution in the 95Pb5Sn flip-chip solder joint with the Ti/Cu/Ni under bump metallization (UBM) during 350°C reflow for durations ranging from 50 sec to 1440 min were investigated. A thin intermetallic layer of only 0.4 μm thickness was formed at the 95Pb5Sn/UBM interface after reflow for 5 min. When the reflow was extended to 20 min, the intermetallic layer grew thicker and the phase identification revealed the intermetallic layer comprised two phases, (Ni,Cu)₃Sn₂ and (Ni,Cu)₃Sn₄. The detection of the Cu content in the intermetallic compounds indicated that the Cu atoms had diffused through the Ni layer and took part in the intermetallic compound formation. With increasing reflow time, the (Ni,Cu)₃Sn₄ phase grew at a faster rate than that of the (Ni,Cu)₃Sn₂ phase. Meanwhile, irregular growth of the (Ni,Cu)₃Sn₄ phase was observed and voids formed at the (Ni,Cu)₃Sn₂/Ni interface. After reflow for 60 min, the (Ni,Cu)₃Sn₂ phase disappeared and the (Ni,Cu)₃Sn₄ phase spalled off the NI layer in the form of a continuous layer. The gap between the (Ni,Cu)₃Sn₄ layer and the Ni layer was filled with lead. A possible mechanism for the growth, disappearance, and spalling of the intermetallic compounds at the 95Pb5Sn/UBM interface was proposed.