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1.
E. Deprettere 《International Journal of Circuit Theory and Applications》1975,3(4):383-390
This paper is a second step in the proof of the conjecture that it is impossible to synthesize a gyrator by means of nullors and linear resistors with fewer than four resistors if only two nullors are permitted, or with fewer than three nullors if only two resistors are permitted. It is proved that a gyrator cannot be realized with only two nullors and two resistors. In a forthcoming paper (third step) it will be proved that a two-nullor, three-resistor gyrator realization cannot be obtained. The proofs are presented in such a way that at the same time a synthesis procedure for minimal nullor-resistor networks is demonstrated. 相似文献
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E. Deprettere 《International Journal of Circuit Theory and Applications》1976,4(3):285-297
It is proved that it is impossible to synthesize a gyrator with only two nullors and three resistors. Combining the results obtained in References 1 and 2 and in this paper, we obtain the following necessary and sufficient conditions: a nullor-resistor gyrator realization is minimal if and only if it consists of either two nullors and four resistors or three nullors and two resistors. 相似文献
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A very simple method for synthesizing the inverse system of a non-linear non-autonomous circuit containing nullors is proposed. The main application of the procedure is the synchronization of chaos by the inverse system approach. This is illustrated with two examples: the synchronization of a Duffing circuit and a communication scheme by direct chaotic modulation using Chua's circuit. © 1998 John Wiley & Sons, Ltd. 相似文献
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C. Acar F. Anday H. Kuntman 《International Journal of Circuit Theory and Applications》1993,21(4):331-341
A synthesis procedure based on the signal flow graph is given for generating second-order active filters using a minimum number of operational transconductance amplifiers and grounded capacitors. the pole quality factor and pole frequency sensitivities are studied for the proposed filters. Furthermore, the limitations on input signal amplitude are studied and a simple formula is derived for the input signal amplitude not causing clipping and slew-rate-limiting problems. 相似文献
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Realizability conditions for the synthesis of multiport voltage-transfer matrices by means of RC transformerless networks embedding either balanced or grounded nullors are systematically described. The results obtained are summarized in two theorems concerning the minimum number of nullors necessary and sufficient to synthesize a given voltage-transfer matrix. 相似文献
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A. Rodriguez-Vazquez J. L. Huertas L. O. Chua 《International Journal of Circuit Theory and Applications》1985,13(4):309-326
The use of switched-capacitor components for designing non-linear networks is discussed in this paper. We first introduce a new type of network component, the BESC resistor, and consider its application to the design of non-linear transfer characteristic and driving point plots. Systematic methods for designing piecewise-linear BESC resistors using switched capacitors are then given. Finally, experimental results showing the performance of the proposed circuits are included. 相似文献
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R. Raut 《International Journal of Circuit Theory and Applications》2006,34(5):583-589
Current transfer function is a feature of current‐mode filters. Current‐mode filters have so far been realized principally using current amplifiers and current conveyors. Some current‐mode filter architecture using operational amplifiers have also been reported. In this article it is shown that by using the principles of transposed network and nullor model for the active device, a current transfer function can be realized in a very simple way using a voltage amplifier, i.e. operational amplifier (OA). The key concept is the knowledge that each ideal (i.e. infinite gain) controlled source is exactly equivalent to a nullor. Thus, a voltage‐mode filter implemented using an ideal three terminal (output, input and ground) OA can be very easily converted to a current‐mode filter using the same OA. The principle has been illustrated by considering single‐OA‐ and multi‐OA‐based second‐order voltage‐mode filters. SPICE simulation results are provided to validate the theoretical concept. Copyright © 2006 John Wiley & Sons, Ltd. 相似文献
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RBF神经网络算法及在定点DSP上的快速实现 总被引:1,自引:0,他引:1
首先介绍了径向基函数神经网络(RBFNN)的结构和运算,分析了完成算法的复杂性,而后给出了如何运用泰勒公式及虚拟浮点库(IQmath Library)实现RBF神经网络在定点DSP上的快速实现的方法,并结合运算实例,验证了此算法的有效性。 相似文献
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R. Nouta 《International Journal of Circuit Theory and Applications》1977,5(4):409-415
A method is indicated by which wave digital filters of the true ladder structure can be realized efficiently using programmable hardware consisting of the following parts: arithmetic memory, program memory, coefficient memory and arithmetic unit. It is shown how to minimize the complexity of the first two mentioned memories. 相似文献
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Emanuel Gluskin 《International Journal of Circuit Theory and Applications》1998,26(2):207-213
The known problem of the resistance measured between two closest nodes on a grid of similar resistors, often considered in a linear version in physics and electrical engineering textbooks, is considered in a non-linear version. An estimation, based on a simple polynomial model, shows that with increase in the number of the dimensions of the grid (or a lattice), the non-linearity of the characteristic of a single resistor is expressed more and more weakly in the input resistive function, and that the input resistive function has the same (in the sense of the degrees involved and polarities of the coefficients) polynomial structure as the individual characteristic of the single resistor. © 1998 John Wiley & Sons, Ltd. 相似文献
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针对数字多用表检定系统存在的测试程序可扩展性差、通用性不强的问题,在深入研究数表计量标准领域中校准仪器的原理及功能的基础上,以数字多用表检定规程为依据,设计开发了一套用于校准多种型号高精度数字多用表的自动检定系统。首先介绍了检定系统的设计情况,详细阐述了系统组成原理、软硬件开发过程,并给出了仪器控制所需的几个关键函数。实验表明,系统完全可行且性能优越,可完成多种型号数字多用表的自动化检定,具有良好的稳定性、可靠性,提高了数表计量标准的计量检定能力,具有较高的实用价值。 相似文献
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Ahmed M. Soliman 《International Journal of Circuit Theory and Applications》1998,26(5):431-438
New realizations of grounded C, grounded R current mode oscillators using the current conveyor (CCII) are given. The proposed oscillators are classified into two classes depending on the number of feedback loops. In class I, there is a single current feedback loop, whereas in class II, there are two current feedback loops. Class I includes two types and it employs two CCIIs, three capacitors and three or four resistors. Class II employs two CCIIs having two-outputs each, two capacitors and three resistors and has independent control on the condition of oscillation and on the frequency of oscillation by varying two alternative resistors. PSpice simulations are included. Exact analysis based on the parasitic elements of the CCII is carried out indicating that class I has a third order characteristic equation. Class II has the advantage that the effects of the parasitic elements of the CCIIs can be absorbed in the circuit components. © 1998 John Wiley & Sons, Ltd. 相似文献
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Brent Maundy David Westwick Stephan Gift 《International Journal of Circuit Theory and Applications》2008,36(1):81-108
This paper describes three circuits that implement pseudo‐logarithmic functions, which are simple and easy to implement. The circuits can be realized using operational amplifiers or current feedback amplifiers. Tuning can be achieved using switched resistors, or active resistors, or tunable transconductors, but are best suited for use with digitally switched resistors. Frequency response and stability considerations for two of the circuits are thoroughly discussed and PSPICE results confirming the theoretical results are presented alongside measured results. Copyright © 2007 John Wiley & Sons, Ltd. 相似文献