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1.
Although most of the work done in fault tolerance is in the digital field, it is widely understood that error detection and correction capability in analog circuits has the same importance as in digital circuits. The technique proposed by Abhijit Chatterjee can realize concurrent single error detection and correction in linear analog circuits well. Based on his work, this paper addresses concurrent multiple error detection and correction in linear analog systems, which is known to be a difficult and unsolved problem. We prove that the concurrent error diagnosis scheme using continuous checksum can not be extended to the case of multiple errors under the assumption that the checker and the functional block will not fail simultaneously, though people are still attempting to make such an extension. © 1998 John Wiley & Sons, Ltd.  相似文献   

2.
Large change sensitivity has been proved efficient at, but restricted to, generating a linear circuit fault dictionary. This paper discusses the extension of large change sensitivity to non‐linear analog circuit fault diagnosis. The fault dictionary is divided into d.c. and a.c. sections. In the d.c. domain, non‐linear components are approximated with piecewise linear models. By relating the operating region of each piecewise linear model to the magnitude of a single fault in a procedure termed preconditioning, it is shown that large change sensitivity can efficiently compute the response of a faulty non‐linear circuit. Results presented of an analysis of computational complexity show a significant reduction in the cost of simulating single linear resistor faults in a non‐linear circuit using this method. In addition, after establishing that the resistive portion of the circuit is fault free, a fault dictionary is constructed for dynamic components using large change sensitivity in the small signal a.c. domain. Included with a discussion on the issues of large change sensitivity based simulation‐before‐test, a small non‐linear circuit is used to demonstrate the effectiveness of the proposed fault diagnosis algorithm. Copyright © 2000 John Wiley & Sons, Ltd.  相似文献   

3.
The paper offers an algorithm for local and global parametric diagnosis in nonlinear analog circuits, including both identification of the faulty parameters and determination their values. The algorithm exploits a nonlinear algebraic type test equations which may possess multiple solutions, corresponding to different sets of the parameters values which meet the test. To find the solutions, the homotopy concept is applied. Since the test equation is not given in explicit analytical form, the simplicial method is used to trace the homotopy path. The proposed approach can be applied to a broad class of analog circuits, including the complementary metal–oxide–semiconductor circuits fabricated in nanometer technology. The developed diagnostic procedure has been implemented in DELPHI, whereas the required by the algorithm repeated circuit analyses are carried out using IsSPICE 4 and both environments have been joined together. For illustration, two numerical examples are given. Copyright © 2013 John Wiley & Sons, Ltd.  相似文献   

4.
The convergence problems of conventional DC analysis can be partly avoided by using piecewise‐linear analysis. This paper proposes a piecewise‐linear DC analysis method that can efficiently handle arbitrary couplings between non‐linear circuit elements. Piecewise‐linear modelling of the non‐linear circuit elements is automatically performed during simulation, using simplicial subdivisions. The number of linear regions, and thereby iterations, is considerably reduced by combining the common parts of separate simplicial subdivisions. Due to these reasons and since the method is formulated with the commonly used modified nodal approach, it has been possible to implement the method in the general‐purpose circuit simulator APLAC. The correct operation of the method is demonstrated with three examples. Copyright © 1999 John Wiley & Sons, Ltd.  相似文献   

5.
在低频信号注入法的基础上,针对支路对地电容影响检测精度,以及小波检测方法存在的不足,提出了基于二维线性跟踪器的直流回路接地故障检测方法。将采集到的电压、电流信号送入二维线性跟踪器检测系统,通过调节跟踪器参数,提取低频信号和相应的微分信号,用最小二乘法拟合得到接地电阻值和对地电容值。仿真结果表明:该方法检测步骤简便、计算量小、测量结果准确,能全面反映支路的运行状态,为直流系统接地故障检测提供了一种新思路。  相似文献   

6.
A new frequency‐domain grouping robust fault diagnosis (GRFD) scheme, based on the design for both grouping‐robust estimation/evaluation of component variation rate and Boolean‐based decision process, is proposed for solving fault diagnosis of large‐scale analog circuits with uncertainties, including both component tolerances and measurement errors.In this scheme, first, grouping‐robust estimators for one partitioning of all component groups, designed by using grouping‐full‐column rank output measurement technique, are employed to estimate the component variation rate. Secondly, based on the faulty possibility judgment policy suggested in this research, grouping‐robust evaluators are employed for the careful evaluation of component variation rate in order to reduce the effect of both component tolerances and measurement errors on the diagnostic test result for one partitioning. Next, both repeating the same one‐partitioning GRFD for a variety of partitionings and combining Boolean‐based decision process, an overall GRFD scheme is proposed for achieving analog fault diagnosis. Finally, a fault diagnosis example of a large‐scale analog circuit is illustrated. The results indicate that without any a priori information about the type of component failure, a precise t‐diagnosable case for a large‐scale circuit with component tolerances and measurement errors is accomplished at the lowest measurement cost. Copyright © 2001 John Wiley & Sons, Ltd.  相似文献   

7.
For broadband frequency domain responses of highly dynamical systems, because vector fitting always has low accuracy especially at resonant frequency response points, a new piecewise vector fitting algorithm is proposed. The complete broadband frequency range is divided into a number of sections. Vector fitting is then applied to each section to identify the poles and residues. Through frequency partitioning, the numerical conditioning of the pole and residue identification equations is improved. Then in each section a sub‐macromodel is obtained. Finally, by adding up the sub‐macromodels in each section, a novel broadband macro‐model with high accuracy is obtained for the whole broadband frequency domain. At the same time, to reduce redundant poles, in each section the number of poles is controlled by a predefined fitting error. An illustrative example involving a low‐pass filter is presented for validation of the proposed method. © 2016 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.  相似文献   

8.
An efficient algorithm is proposed for finding all solutions of piecewise‐linear (PWL) resistive circuits using linear programming (LP). This algorithm is based on a simple test (termed the LP test) for non‐existence of a solution to a system of PWL equations in a given region. In the conventional LP test, the system of PWL equations is transformed into an LP problem, to which the simplex method is applied. However, this algorithm requires a very large number of pivotings because the simplex method is applied on many regions. In this paper, we introduce the dual simplex method to the LP test, which makes the average number of pivotings per region much smaller (less than one, for example) and makes the algorithm very efficient. By numerical examples, it is shown that the proposed algorithm could find all solutions of large‐scale problems, including those where the number of variables is 300 and the number of linear regions is 10300, in practical computation time. Copyright © 2002 John Wiley & Sons, Ltd.  相似文献   

9.
Recently several topological representations have been explored as alternatives to the conventional absolute‐coordinate representation for integrated circuit layout automation. Those topological representations, however, lack one or more aspects in capturing the solution space subject to symmetry constraints, which are abundant in analog layouts. In this paper, we explore the use of transitive closure graphs (TCGs) to represent analog placements, i.e. placements with symmetry constraints. We define a set of conditions so that a TCG satisfying these conditions, referred to as a symmetric‐feasible TCG, will correspond to a valid symmetric placement and vice versa. We then present an O(n2) algorithm, where n is the number of cells to be placed, to build a symmetric placement from a symmetric‐feasible TCG, a problem known as packing. We further describe a set of random perturbation operations on existing symmetric‐feasible TCGs to generate new symmetric‐feasible TCGs with time complexity of O(n) . This allows our TCG‐based symmetry‐aware analog placer to search only the symmetric‐feasible TCG solution space, leading to a substantial reduction of the search space and solution time. Experimental results on several analog circuits have confirmed the superiority of the TCG representation to the conventional absolute‐coordinate representation as well as several other topological representations in analog layout design. Copyright © 2008 John Wiley & Sons, Ltd.  相似文献   

10.
In this letter, an efficient algorithm is proposed for finding all solutions of non‐linear (not piecewise‐linear) resistive circuits. This algorithm is based on interval analysis, the dual simplex method, and the contraction methods. By numerical examples, it is shown that the proposed algorithm could find all solutions of systems of 500–700 non‐linear circuit equations in acceptable computation time. Copyright © 2004 John Wiley & Sons, Ltd.  相似文献   

11.
This study describes a relationship between an element parameter and a fault feature steady‐state node‐voltage vector (SSNVV). The locus of the SSNVV endpoints is proposed and proven to be an arc of circle under certain conditions, whereas the element parameter varies from small to large within a certain range. The arc of circle is called locus circle of SSNVV (LCoSSNVV). An LCoSSNVV‐based soft‐fault diagnostic method is also proposed. The method utilizes three discrete SSNVV endpoints to draw an LCoSSNVV for each element and collects all LCoSSNVVs to produce an LCoSSNVV set for fault diagnosis. In the following diagnostic process, the method measures a fault feature SSNVV of actual faulty circuit and judges which element is faulty on the basis of the relationship between the measured fault feature SSNVV and the LCoSSNVVs in an LCoSSNVV set. Subsequently, the fault can be further subdivided into different types of soft faults on the basis of the relative position of the SSNVV on the LCoSSNVV. A range of the faulty element parameter value can be estimated. Several examples illustrate the method. A measurement solution of SSNVV and a solution of a programming strategy are described. The new LCoSSNVV‐based method would effectively improve the soft‐fault diagnosis process of a linear time‐invariant circuit network. Copyright © 2015 John Wiley & Sons, Ltd.  相似文献   

12.
In this letter, the performance of the LP test algorithm, which is an algorithm for finding all solutions of piecewise‐linear resistive circuits, is evaluated by numerical experiments. It is shown that the algorithm could find all solutions of large‐scale problems (including those where the number of variables is 200–300 and the number of linear regions is 10200–10300) in practical computation time. Copyright © 2000 John Wiley & Sons, Ltd.  相似文献   

13.
Fault diagnosis of analog circuits is more challenging compared with digital circuits as a result of the parametric deviation and the difficulty in signal discretization. There still lacks effective approaches to realize reliable fault detection and isolation for a comprehensive diagnosis. A new fault diagnosis technique called multi‐valued Fisher's fuzzy decision tree (MFFDT) is proposed in this paper to solve the problem. This technique uses the decision tree as the diagnosis model and incorporates the Fisher's linear discriminant principles. The fuzzification mechanism is devised to discretize the input monitoring data. The proposed MFFDT method is composed of two aspects: decision tree training and real fault diagnosis processes. The former uses the benchmark data to train a decision tree, while the latter sends the monitoring data into the decision tree to generate diagnosis results. The proposed method is validated using simulated data and the real‐time data for an active filter circuit and an audio amplifying circuit. The comparative analysis is also presented to evaluate diagnosis performances. Copyright © 2015 John Wiley & Sons, Ltd.  相似文献   

14.
This paper is concerned with the problem of the fault detection (FD) filter design for discrete‐time switched linear systems with mode‐dependent average dwell‐time. The switching law is mode‐dependent and each subsystem has its own average dwell‐time. The FD filters are designed such that the augmented switched systems are asymptotically stable, and the residual signal generated by the filters achieves a weighted l2‐gain for some disturbances and guarantees an H ? performance for the fault. By the aid of multiple Lyapunov functions combined with projection lemma, sufficient conditions for the design of the FD filters are formulated by linear matrix inequalities, furthermore, the filters gains are characterized in terms of the solution of a convex optimization problem. Finally, an application to boost convertor is given to illustrate the effectiveness and the applicability of the proposed design method. Copyright © 2013 John Wiley & Sons, Ltd.  相似文献   

15.
The objective of this paper is to develop a method for fault detection and approximation of linear impulsive systems exposed to actuator faults. Utilizing proposed sliding mode observer, states of the impulsive system are estimated. It is proved that estimation error dynamical system is asymptotically stable between jumps. In addition, an upper bound of the state estimation errors at jump instants has been derived explicitly. State estimations are used to reconstruct the fault signal. Furthermore, an upper bound of the fault estimation errors is obtained. Proficiency of the proposed method is evaluated under different fault scenarios using numerical simulations. Copyright © 2015 John Wiley & Sons, Ltd.  相似文献   

16.
This paper presents a circuit modeling procedure for Ultra‐wideband (UWB) Tx‐Rx antenna systems based on frequency domain S‐parameters. The modeling used an existing two‐port network's model consisting of four SPICE analog behavioral modules. The accuracy of the model has been validated by comparing its transient response with the measurement result using an oscillograph. This model can be used for the co‐design of the UWB Tx‐Rx antenna system with transmitters and receivers in circuit simulators. In the study, Tx‐Rx antenna systems using planar bow‐tie antenna and horn antenna with ultra‐wide bandwidths are used as examples. Copyright © 2010 John Wiley & Sons, Ltd.  相似文献   

17.
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