Development of high‐efficiency large‐area screen‐printed solar cells on direct kerfless epitaxially grown monocrystalline Si wafer and structure

This paper demonstrates the potential of epitaxially grown Si wafers with doped layers for high‐efficiency solar cells. Boron‐doped 239 cm² 180–200 µm thick 2 Ω‐cm wafers were grown with and without 15 µm thick p⁺ layer, with a doping in the range of 10¹⁷~10¹⁸ cm⁻³. A layer transfer process involving porous Si layer to lift off epi‐Si wafers from the reusable substrate was used. The pp⁺ wafers were converted into n⁺pp⁺ passivated emitter rear totally diffused (PERT) cells by forming an oxide‐passivated POCl₃‐diffused n⁺ emitter at the front, and oxide/nitride‐passivated epitaxially grown p⁺ BSF at the entire back, with local screen‐printed contacts. To demonstrate and quantify the benefit of the epi‐grown p⁺ layer, standard passivated emitter and rear cells (PERCs) with local BSF and contacts were also fabricated on p‐type epi‐Si wafers as well on commercial‐grade Cz wafers. Sentaurus 2D device model was used to assess the impact of the epi‐grown p⁺ layer, which showed an efficiency gain of ~0.5% for this PERT structure over the traditional PERC. This was validated by the cell results, which showed an efficiency of ~20.1% for the PERC, and ~20.3% for the PERT cell using epi‐Si wafers. Experimental data showed higher FF in PERT cells, largely because of the decrease in lateral resistance on the rear side. Efficiency gain, a result of higher FF, was greater than the recombination loss in the p⁺ layer because of the lightly doped thick p⁺ epi‐grown region used in this study. Copyright © 2016 John Wiley & Sons, Ltd.     

Fine line printed silicon solar cells exceeding 20% efficiency

Silicon solar cells with passivated rear side and laser‐fired contacts were produced on float zone material. The front side contacts are built up in two steps, seed and plate. The seed layer is printed using an aerosol jet printer and a silver ink. After firing this seed layer through the silicon nitride layer, the conductive layer is grown by light induced plating. The contact formation is studied on different emitter sheet resistances, 55 Ω/sq, 70 Ω/sq, and on 110 Ω/sq. These emitters are passivated with a PECVD silicon nitride layer which also acts as an anti‐reflection coating. Even on the 110 Ω/sq emitters it was possible to reach a fill factor of 80·1%. The electrical properties i.e., the contact resistance of the front side contacts are studied by transfer length model (TLM) measurements. On a cell area of 4 cm² and emitter sheet resistance of 110 Ω/sq, a record efficiency of 20·3% was achieved. Excellent open‐circuit voltage (V_oc) and short‐circuit current (j_sc) values of 661 mV and 38·4 mA/cm² were obtained due to the low recombination in the 110 Ω/sq emitter and at the passivated rear surface. These results show impressively that it is possible to contact emitter profiles with a very high efficiency potential using optimized printing technologies. Copyright © 2008 John Wiley & Sons, Ltd.     

Large area tunnel oxide passivated rear contact n‐type Si solar cells with 21.2% efficiency

This paper reports on the implementation of carrier‐selective tunnel oxide passivated rear contact for high‐efficiency screen‐printed large area n‐type front junction crystalline Si solar cells. It is shown that the tunnel oxide grown in nitric acid at room temperature (25°C) and capped with n⁺ polysilicon layer provides excellent rear contact passivation with implied open‐circuit voltage iV_oc of 714 mV and saturation current density J_0b′ of 10.3 fA/cm² for the back surface field region. The durability of this passivation scheme is also investigated for a back‐end high temperature process. In combination with an ion‐implanted Al₂O₃‐passivated boron emitter and screen‐printed front metal grids, this passivated rear contact enabled 21.2% efficient front junction Si solar cells on 239 cm² commercial grade n‐type Czochralski wafers. Copyright © 2016 John Wiley & Sons, Ltd.     

High efficiency large area n‐type front junction silicon solar cells with boron emitter formed by screen printing technology

In this paper, we report on commercially viable screen printing (SP) technology to form boron emitters. A screen‐printed boron emitter and ion‐implanted phosphorus back surface field were formed simultaneously by a co‐annealing process. Front and back surfaces were passivated by chemically grown oxide capped with plasma‐enhanced chemical vapor deposition silicon nitride stack. Front and back contacts were formed by traditional SP and firing processes with silver/aluminum grid on front and local silver back contacts on the rear. This resulted in 19.6% efficient large area (239 cm²) n‐type solar cells with an open‐circuit voltage V_oc of 645 mV, short‐circuit current density J_sc of 38.6 mA/cm², and fill factor of 78.6%. This demonstrates the potential of this novel technology for production of low‐cost high‐efficiency n‐type silicon solar cells. Copyright © 2014 John Wiley & Sons, Ltd.     

Evaluation of advanced p‐PERL and n‐PERT large area silicon solar cells with 20.5% energy conversion efficiencies

In this paper, we evaluate p‐type passivated emitter and rear locally diffused (p‐PERL) and n‐type passivated emitter and rear totally diffused (n‐PERT) large area silicon solar cells featuring nickel/copper/silver (Ni/Cu/Ag) plated front side contacts. By using front emitter p‐PERL and rear emitter n‐PERT, both cell structures can be produced with only a few adaptations in the entire process sequence because both feature the same front side design: homogeneous n⁺ diffused region with low surface concentration, SiO₂/SiN_x:H passivation, Ni/Cu/Ag plated contacts. Energy conversion efficiencies up to 20.5% (externally confirmed at FhG‐ISE Callab) are presented for both cell structures on large area cells together with power‐loss analysis and potential efficiency improvements based on PC1D simulations. We demonstrate that the use of a rear emitter n‐PERT cell design with Ni/Cu/Ag plated front side contacts enables to reach open‐circuit voltage values up to 676 mV on 1–2 Ω cm n‐type CZ Si. We show that rear emitter n‐PERT cells present the potential for energy conversion efficiencies above 21.5% together with a strong tolerance to wafer thickness and bulk resistivity. Copyright © 2014 John Wiley & Sons, Ltd.     

Optimizing annealing steps for crystalline silicon solar cells with screen printed front side metallization and an oxide‐passivated rear surface with local contacts

Silicon solar cells that feature screen printed front contacts and a passivated rear surface with local contacts allow higher efficiencies compared to present industrial solar cells that exhibit a full area rear side metallization. If thermal oxidation is used for the rear surface passivation, the final annealing step in the processing sequence is crucial. On the one hand, this post‐metallization annealing (PMA) step is required for decreasing the surface recombination velocity (SRV) at the aluminum‐coated oxide‐passivated rear surface. On the other hand, PMA can negatively affect the screen printed front side metallization leading to a lower fill factor. This work separately analyzes the impact of PMA on both, the screen printed front metallization and the oxide‐passivated rear surface. Measuring dark and illuminated IV‐curves of standard industrial aluminum back surface field (Al‐BSF) silicon solar cells reveals the impact of PMA on the front metallization, while measuring the effective minority carrier lifetime of symmetric lifetime samples provides information about the rear side SRV. One‐dimensional simulations are used for predicting the cell performance according to the contributions from both, the front metallization and the rear oxide‐passivation for different PMA temperatures and durations. The simulation also includes recombination at the local rear contacts. An optimized PMA process is presented according to the simulations and is experimentally verified. The optimized process is applied to silicon solar cells with a screen printed front side metallization and an oxide‐passivated rear surface. Efficiencies up to 18.1% are achieved on 148.8 cm² Czochralski (Cz) silicon wafers. Copyright © 2009 John Wiley & Sons, Ltd.     

Laser ablation of SiO2 for locally contacted Si solar cells with ultra‐short pulses

We apply ultra‐short pulse laser ablation to create local contact openings in thermally grown passivating SiO₂ layers. This technique can be used for locally contacting oxide passivated Si solar cells. We use an industrially feasible laser with a pulse duration of τ_pulse ∼ 10 ps. The specific contact resistance that we reach with evaporated aluminium on a 100 Ω/sq and P‐diffused emitter is in the range of 0·3–1 mΩ cm². Ultra‐short pulse laser ablation is sufficiently damage free to abandon wet chemical etching after ablation. We measure an emitter saturation current density of J_0e = (6·2 ± 1·6) × 10⁻¹³ A/cm² on the laser‐treated areas after a selective emitter diffusion with R_sheet ∼ 20 Ω/sq into the ablated area; a value that is as low as that of reference samples that have the SiO₂ layer removed by HF‐etching. Thus, laser ablation of dielectrics with pulse durations of about 10 ps is well suited to fabricate high‐efficiency Si solar cells. Copyright © 2007 John Wiley & Sons, Ltd.     

Economic feasibility of bifacial silicon solar cells

Bifacial solar cells and modules are a promising approach to increase the energy output of photovoltaic systems, and therefore decrease levelized cost of electricity (LCOE). This work discusses the bifacial silicon solar cell concepts PERT (passivated emitter, rear totally diffused) and BOSCO (both sides collecting and contacted) in terms of expected module cost and LCOE based on in‐depth numerical device simulation and advanced cost modelling. As references, Al‐BSF (aluminium back‐surface field) and PERC (passivated emitter and rear) cells with local rear‐side contacts are considered. In order to exploit their bifacial potential, PERT structures (representing cells with single‐sided emitter) are shown to require bulk diffusion lengths of more than three times the cell thickness. For the BOSCO concept (representing cells with double‐sided emitter), diffusion lengths of half the cell thickness are sufficient to leverage its bifacial potential. In terms of nominal LCOE, BOSCO cells are shown to be cost‐competitive under monofacial operation compared with an 18% efficient (≙ p_MPP = 18 mW/cm²) multicrystalline silicon (mc‐Si) Al‐BSF cell and a 19% mc‐Si PERC cell for maximum output power densities of p_MPP ≥ 17.3 mW/cm² and p_MPP ≥ 18.1 mW/cm², respectively. These values assume the use of $10/kg silicon feedstock for the BOSCO and $20/kg for the Al‐BSF and PERC cells. For the PERT cell, corresponding values are p_MPP ≥ 21.7 mW/cm² and p_MPP ≥ 22.7 mW/cm², respectively, assuming the current price offset (≈50%, at the time of October 2014) of n‐type Czochralski‐grown silicon (Cz‐Si) compared with mc‐Si wafers. The material price offset of n‐type to p‐type Cz‐Si wafers (≈15%, October 2014) currently accounts for approximately 1 mW/cm², which correlates to a conversion efficiency difference of 1%_abs for monofacial illumination with 1 sun. From p‐type mc‐Si to p‐type Cz‐Si (≈30% wafer price offset, October 2014), this offset is approximately 2.5 mW/cm² for a PERT cell. When utilizing bifacial operation, these required maximum output power densities can be transformed into required minimum rear‐side illumination intensities for arbitrary front‐side efficiencies η_front by means of the performed numerical simulations. For a BOSCO cell with η_front = 18%, minimum rear‐side illumination intensities of ≤ 0.02 suns are required to match a 19% PERC cell in terms of nominal LCOE. For an n‐type Cz‐Si PERT cell with η_front = 21%, corresponding values are ≤ 0.11 suns with 0.05 suns being the n‐type to p‐type material price offset. This work strongly motivates the use of bifacial concepts to generate lowest LCOE. Copyright © 2016 John Wiley & Sons, Ltd.     

Rapid thermal processing of next generation silicon solar cells

Rapid and potentially low‐cost process techniques are analyzed and successfully applied towards the fabrication of high‐efficiency mono‐ and multicrystalline Si solar cells. First, a novel dielectric passivation scheme (formed by stacking a plasma silicon nitride film on top of a rapid thermal oxide layer) is developed that serves as antireflection coating and reduces the surface recombination velocity (S_eff) of the 1˙3 Ω‐cm p‐Si surface to approximately 10 cm/s. The essential feature of the stack passivation scheme is its ability to withstand short 700 – 850°C anneal treatments used to fire screen printed (SP) contacts, without degradation in S_oeff. The stack also lowers the emitter saturation current density (J_oe) of 40 and 90 Ω/□ emitters by a factor of three and 10, respectively, compared to no passivation. Next, rapid emitter formation is accomplished by diffusion under tungsten halogen lamps in both belt line and rapid thermal processing (RTP) systems (instead of in a conventional infrared furnace) . Third, a combination of SP aluminium and RTP is used to form an excellent back surface field (BSF) in 2 min to achieve an effective back surface recombination velocity (S_eff) of 200 cm/s on 2˙3 Ω‐cm Si. Finally, the above individual processes are integrated to achieve: (1) >19% efficient solar cells with emitter and Al‐BSF formed by RTP and contacts formed by vacuum evaporation and photolithography, (2) 17% efficient manufacturable cells with emitter and Al‐BSF formed in a belt line furnace and contacts formed by SP. Copyright © 2000 John Wiley & Sons, Ltd.     

20.7% efficient ion‐implanted large area n‐type front junction silicon solar cells with rear point contacts formed by laser opening and physical vapor deposition

In this work, we report on ion‐implanted, high‐efficiency n‐type silicon solar cells fabricated on large area pseudosquare Czochralski wafers. The sputtering of aluminum (Al) via physical vapor deposition (PVD) in combination with a laser‐patterned dielectric stack was used on the rear side to produce front junction cells with an implanted boron emitter and a phosphorus back surface field. Front and back surface passivation was achieved by thin thermally grown oxide during the implant anneal. Both front and back oxides were capped with SiN_x, followed by screen‐printed metal grid formation on the front side. An ultraviolet laser was used to selectively ablate the SiO₂/SiN_x passivation stack on the back to form the pattern for metal–Si contact. The laser pulse energy had to be optimized to fully open the SiO₂/SiN_x passivation layers, without inducing appreciable damage or defects on the surface of the n⁺ back surface field layer. It was also found that a low temperature annealing for less than 3 min after PVD Al provided an excellent charge collecting contact on the back. In order to obtain high fill factor of ~80%, an in situ plasma etching in an inert ambient prior to PVD was found to be essential for etching the native oxide formed in the rear vias during the front contact firing. Finally, through optimization of the size and pitch of the rear point contacts, an efficiency of 20.7% was achieved for the large area n‐type passivated emitter, rear totally diffused cell. Copyright © 2014 John Wiley & Sons, Ltd.     

Process development and comparison of various boron emitter technologies for high‐efficiency (~21%) n‐type silicon solar cells

This paper shows for the first time a comparison of commercial‐ready n‐type passivated emitter , rear totally diffused solar cells with boron (B) emitters formed by spin‐on coating, screen printing, ion implantation, and atmospheric pressure chemical vapor deposition. All the B emitter technologies show nearly same efficiency of ~20%. The optimum front grid design (5 busbars and 100 gridlines), calculated by an analytical modeling, raised the baseline cell efficiency up to 20.5% because of reduced series resistance. Along with the five busbars, rear point contacts formed by laser ablation of dielectric and physical vapor deposition Al metallization resulted in another 0.4% improvement in efficiency. As a result, 20.9% efficient n‐type passivated emitter, rear totally diffused cell was achieved in this paper. Copyright © 2016 John Wiley & Sons, Ltd.     

Industrially feasible,dopant‐free,carrier‐selective contacts for high‐efficiency silicon solar cells

Dopant‐free, carrier‐selective contacts (CSCs) on high efficiency silicon solar cells combine ease of deposition with potential optical benefits. Electron‐selective titanium dioxide (TiO₂) contacts, one of the most promising dopant‐free CSC technologies, have been successfully implemented into silicon solar cells with an efficiency over 21%. Here, we report further progress of TiO₂ contacts for silicon solar cells and present an assessment of their industrial feasibility. With improved TiO₂ contact quality and cell processing, a remarkable efficiency of 22.1% has been achieved using an n‐type silicon solar cell featuring a full‐area TiO₂ contact. Next, we demonstrate the compatibility of TiO₂ contacts with an industrial contact‐firing process, its low performance sensitivity to the wafer resistivity, its applicability to ultrathin substrates as well as its long‐term stability. Our findings underscore the great appeal of TiO₂ contacts for industrial implementation with their combination of high efficiency with robust fabrication at low cost. Copyright © 2017 John Wiley & Sons, Ltd.     

Metallization‒induced recombination losses of bifacial silicon solar cells

In this study, we investigate the metallization‒induced recombination losses of high efficiency bifacial n‒type and p‒type crystalline Si solar cells. From the experimental data, we found that the most efficiency limiting parameter by the screen‒printed metallization is the open‒circuit voltage (V_OC) of the cells. We investigated the mechanism responsible for this loss by varying the metallization fraction on either side of the cell and determined the local enhancement in the dark saturation current density beneath the metal contacts (J_0(met)). Under optimum fabrication conditions, the J_0(met) at metal‒p⁺ (boron) emitter interfaces was found to be significantly higher compared with the values obtained for metal‒n⁺ emitters. A two‒dimensional simulation model was used to get further insight into the recombination mechanism leading to these V_OC losses. The model assumes that metal contacts penetrate (or etch) into the diffused region following the firing process and depassivate the interface. Applying this model to our n‒type solar cells with a boron p⁺ emitter, we demonstrated that the simple loss of passivated area beneath the metal contact cannot explain the degradation observed in the V_OC of the cell without considering a significant etching or metal penetration into the emitter region. Copyright © 2014 John Wiley & Sons, Ltd.     

>16% thin‐film epitaxial silicon solar cells on 70‐cm2 area with 30‐µm active layer,porous silicon back reflector,and Cu‐based top‐contact metallization

We demonstrate the use of a copper‐based metallization scheme for the specific application of thin‐film epitaxial silicon wafer equivalent (EpiWE) solar cells with rear chemical vapor deposition emitter and conventional POCl₃ emitter. Thin‐film epitaxial silicon wafer equivalent cells are consisting of high‐quality epitaxial active layer of only 30 µm, beneath which a highly reflective porous silicon multilayer stack is embedded. By combining Cu‐plating metallization and narrow finger lines with an epitaxial cell architecture including the porous silicon reflector, a J_sc exceeding 32 mA/cm² was achieved. We report on reproducible cell efficiencies of >16% on >70‐cm² cells with rear epitaxial chemical vapor deposition emitters and Cu contacts. Copyright © 2011 John Wiley & Sons, Ltd.     

Understanding of the annealing temperature impact on ion implanted bifacial n‐type solar cells to reach 20.3% efficiency

Ion implantation has the advantage of being a unidirectional doping technique. Unlike gaseous diffusion, this characteristic highlights strong possibilities to simplify solar cell process flows. The use of ion implantation doping for n‐type PERT bifacial solar cells is a promising process, but mainly if it goes with a unique co‐annealing step to activate both dopants and to grow a SiO₂ passivation layer. To develop this process and our SONIA cells, we studied the impact of the annealing temperature and that of the passivation layers on the electrical quality of the implanted B‐emitter and P‐BSF. A high annealing temperature (above 1000 °C) was necessary to fully activate the boron atoms and to anneal the implantation damages. Low J_0BSF (BSF contribution to the saturation current density) of 180 fA/cm² was reached at this high temperature with the best SiO₂ passivation layer. An average efficiency of 19.7% was reached using this simplified process flow (“co‐anneal process”) on large area (239 cm²) Cz solar cells. The efficiency was limited by a low FF, probably due to contaminations by metallization pastes. Improved performances were achieved in the case of a “separated anneals” process where the P‐BSF is activated at a lower temperature range. An average efficiency of 20.2% was obtained in this case, with a 20.3% certified cell. Copyright © 2014 John Wiley & Sons, Ltd.     

Progress on large area n‐type silicon solar cells with front laser doping and a rear emitter

We report on the progress of imec's n‐type passivated emitter, rear totally diffused rear junction silicon solar cells. Selective laser doping has been introduced in the flow, allowing the implementation of a shallow diffused front surface field and a reduction of the recombination current in the contact area. Simplifications have been implemented towards a more industrial annealing sequence, by replacing expensive forming gas annealing steps with a belt furnace annealing. By applying these improvements, together with an advanced texturing process and emitter passivation by atomic layer deposition of Al₂O₃, 22.5% efficient cells (three busbars) have been realized on commercial 156 · 156 mm² Czochralski‐Si. This result has been independently confirmed by ISE CalLab. Copyright © 2016 John Wiley & Sons, Ltd.     

High‐efficiency (19%) screen‐printed textured cells on low‐resistivity float‐zone silicon with high sheet‐resistance emitters

High‐efficiency 4 cm² screen‐printed (SP) textured cells were fabricated on 100 Ω/sq emitters using a rapid single‐step belt furnace firing process. The high contact quality resulted in a low series resistance of 0·79 Ωcm², high shunt resistance of 48 836 Ωcm², a low junction leakage current of 18·5 nA/cm² (n₂ = 2) yielding a high fill factor (FF) of 0·784 on 100 Ω/sq emitter. A low resistivity (0·6 Ωcm) FZ Si was used for the base to enhance the contribution of the high sheet‐resistance emitter without appreciably sacrificing the bulk lifetime. This resulted in a 19% efficient (confirmed at NREL) SP 4 cm² cell on textured FZ silicon with SP contacts and single‐layer antireflection coating. This is apparently higher in performance than any other previously reported cell using standard screen‐printing approaches (i.e., single‐step firing and grid metallization). Detailed cell characterization and device modeling were performed to extract all the important device parameters of this 19% SP Si cell and provide guidelines for achieving 20% SP Si cells. Copyright © 2005 John Wiley & Sons, Ltd.     

All‐screen‐printed back‐contact back‐junction silicon solar cells with aluminum‐alloyed emitter and demonstration of interconnection of point‐shaped metalized contacts

In the following, high‐efficiency back‐contact back‐junction silicon solar cells with aluminum‐alloyed emitter are described. First, the theoretical background for the cell concept is explained. To that purpose, the bulk lifetime and the front surface field characteristics are considered. Three different process sequences for the phosphorus‐diffused profiles on the front and back surfaces are depicted: One exhibits a shallow field, and two sequences have deeper, driven‐in profiles. For realizing high efficiencies, such cell structures must meet several prerequisites, such as firing‐stable front and rear passivations, and functional small screen‐printed Al structures. Furthermore, it must be possible to create contacts on the Si surfaces using the driven‐in P‐profiles. With such a structure, cell efficiencies of 20.0% are reached. An analysis of the series resistance and area‐weighted recombination is performed. The results are compared with the measured cell parameters. Two‐dimensional simulations show the efficiency potential when decreasing the width of the backside field and when a cell structure, which would inhibit a passivated aluminum‐alloyed p⁺‐emitter, is created. Also, an advanced concept is demonstrated where a point array of both polarities on the cell backside is interconnected externally on module level. To that purpose, the cell is soldered to a printed wiring circuit board by using a reflow soldering process. Copyright © 2013 John Wiley & Sons, Ltd.     

Impact of the injection‐level‐dependent lifetime on Voc,FF, ideality m,J02, and the dim light response in a commercial PERC cell

The injection‐level‐dependent (ILD) lifetime of the silicon wafer impacts many characteristics of the final photovoltaic cell. While efficiency is commonly understood to be impacted by the silicon bulk lifetime (at the maximum power point injection level), this work demonstrates the wide ranging impacts of ILD lifetime on the V_oc, the fill factor (FF), the diode ideality factor m, and the dim light response. Instead of a two‐diode model, we utilize a boundary + ILD bulk lifetime model to analyze a commercial passivated emitter rear contact (PERC) cell featuring an AlO_x dielectric rear passivation. The ILD lifetime is directly measured and used to calculate the bulk recombination current across injection levels. With this boundary + ILD lifetime model, we demonstrate the role of the ILD lifetime on many cell parameters in this PERC cell. For most high efficiency commercial p‐type monocrystalline solar cells, the typically lower bulk lifetime at the maximum power point versus the lifetime at the open circuit point reduces the measured FF and pseudo‐FF. This work illustrates that for a commercial PERC cell with AlO_x rear passivation, the ILD lifetime is the primary mechanism behind reduced FF, ideality factors greater than 1, and the source of the J₀₂ term in the two‐diode model. The crucial implications of this work are not only to better understand commercial PERC cell loss mechanisms but also to encourage a focus on different metrics in cell diagnostics. One such metric is the V_oc at 0.1 or 0.05 suns. Copyright © 2016 John Wiley & Sons, Ltd.