半导体集成电路用表面钝化膜的研究

对高性能高可靠性集成电路来说，表面钝化已成为不可缺少的工艺措施之一。本文分析了目前应用最广泛的几种无机表面钝化膜（SiO2,Al2O3和Si3N4)的特点，并指出氮化硅薄膜是半导体集成电路中最具应用前景的表面钝化材料，发展低温的热化学气相沉积（CVD）工艺来沉积氮化硅表面钝化膜是集成电路发展的必然趋势，而开发新的能满足低温沉积氮化硅薄膜的硅源，氮源前驱体是解决这一难题的有效方法，并对这些前驱体物质的设计原则进行了阐述。     

多孔石英基体上CVD法沉积氮化硅涂层的工艺、结构与性能研究

以甲硅烷(20％甲硅烷+80％氢气)和氨气作为反应前驱体,选择孔隙率为20％左右的多孔石英陶瓷基体,采用CVD法在多孔石英基体表面制备了氮化硅涂层.研究了沉积反应温度、反应压力、反应气体配比以及沉积时间等工艺参数对附着力的影响,确定了CVD法制备氮化硅涂层的最佳工艺参数,通过对所得涂层及复合材料进行抗弯强度和介电性能的表征,探讨了氮化硅涂层对多孔石英基体力学性能和介电性能的影响.     

乙酰丙酮基1,2-双(二苯基膦)乙烷镍的合成、热性质及其作为化学气相沉积前驱体的应用研究

本文以乙酰丙酮镍和1,2-双(二苯基膦)乙烷为原料合成了乙酰丙酮基1,2-双(二苯基膦)乙烷镍配合物，通过元素分析、熔点以及热重分析仪对所合成配合物的化学成分、挥发性、热稳定性以及运输行为进行了测定分析。此外，以该化合物为前驱体，通过薄膜沉积实验对其作为CVD前驱体的应用性进行了评价，并对所沉积薄膜的形貌、化学组成及晶型结构进行了研究。研究结果表明所制备的薄膜成分为NiO，成膜连续均匀，具有较高的纯度，说明其具有作为CVD前驱体应用于制备镍基薄膜的可行性。     

CVD法氮化硅薄膜制备及性能

氮化硅薄膜是一种重要的薄膜材料,具有优秀的光电性能,钝化性能和机械性能,将在微电子,光电和材料表面改性领域获得广泛应用,本文着重评述了制备氮化硅薄膜的几种化学相沉积方法和一些性能。     

分子吸收光谱在半导体薄膜化学气相沉积中的应用

在化学气相沉积(CVD)生长半导体薄膜过程中,反应前体的浓度测量对于了解反应机理至关重要。紫外-可见吸收光谱和红外光谱是测量半导体薄膜CVD生长中分子浓度的主要工具,特别是可以实现气体浓度的原位测量。本文介绍了CVD中紫外-可见吸收光谱的测量系统,以及它们在测量Ⅲ～Ⅴ族气体浓度和确定在不同条件下化学反应路径中的应用。包括常见金属有机物等气体的吸收特征,紫外-可见吸收光谱在不同温度和压力下CVD过程中InN、GaN薄膜生长中的应用。本文也介绍了红外光谱分析方法在CVD中的应用,包括不同条件下TMG和NH₃气相反应机理的分析、SiC薄膜的元素成分分析以及GaN薄膜的气相反应速率的确定。     

B-C陶瓷CVD制备工艺参数优化

CVD法制备B-C陶瓷的沉积效率对于自愈合陶瓷基复合材料(CMC-SH)的最终性能关系重要.本文结合BP神经网络和遗传算法,建立了B-C陶瓷CVD工艺参数优化方法.首先应用BP神经网络对其试验数据进行训练,训练后的网络作为映射工艺参数与性能指标之间的复杂非线性关系的数学模型,并用该网络预测的性能输出作为目标函数求解的方法,以沉积温度、沉积时间、前驱体BCl3/CH4比例和前驱体H2/CH4比例为设计变量,采用遗传算法对变量进行优化,从而实现平均增重率和沉积速度确定的工艺参数的优化.本文将BP神经网络与遗传算法有机结合起来建立B-C陶瓷CVD制备工艺参数优化系统,以期获得最佳的B-C陶瓷沉积效率.     

一种氨基吡啶铈(Ⅲ)配合物的合成及其应用研究

合成了氨基吡啶铈(Ⅲ)配合物并通过核磁和元素分析对其进行了表征;通过热重分析(TGA)对其热稳定性,挥发性和蒸汽压等热性质进行了研究,以期适用于化学气相沉积(CVD)技术的应用。最后,通过热型CVD技术制备出了Ce O2薄膜,表明氨基吡啶铈(Ⅲ)配合物可以作为一种新型的CVD前驱体。     

CVD碳化硅薄膜对炭纤维表面结构和性能的影响

以三氯甲基硅烷(CH3SiCl3,MTS)为碳化硅源,采用化学气相沉积(CVD)的方法,在去胶炭纤维表面沉积一层碳化硅薄膜。采用SEM及N2等温吸附观察的方法,分析了薄膜处理对炭纤维表面结构的影响。结果表明:CVD碳化硅薄膜能够修复炭纤维表面的微孔和裂纹等缺陷,使纤维表面更光滑,可以改变纤维的表面结构特性,使炭纤维的BET比表面积和BJH累积孔体积降低,从而降低炭纤维表面吸附能力。采用单丝拉伸试验机进行力学分析,通过干烧对比实验发现:在CVD过程中,考虑沉积气氛对纤维损伤的影响,炭纤维在CVD碳化硅薄膜修复后,抗拉强度和弹性模量分别提高了6.7%和8.2%。     

氮化硅薄膜的制备技术

氮化硅薄膜是一种重要的精细陶瓷薄膜材料,具有优秀的光电性能、钝化性能、稳定性能和机械性能,在微电子、光电和材料表面改性等领域有着广阔的应用前景。本文综述了几种制备氮化硅薄膜的方法。     

在金刚石薄膜上生长微米／纳米结构氧化锌

金刚石是非常重要的宽禁带半导体材料,n-型氧化锌与p-型金刚石的结合成为半导体研究的热点.该研究实现了金刚石薄膜上生长六角纤锌矿结构氧化锌(ZnO)微米/纳米结构.生长初期或ZnO饱和蒸气压较低时,ZnO晶粒多沉积在金刚石薄膜的晶界和棱边处,随着沉积时间的增加或反应气氛中气态ZnO浓度的增加,会有大量微米/纳米结构的ZnO生成,并覆盖整个金刚石薄膜表面.对ZnO在金刚石薄膜表面生长机制及反应气氛对金刚石的钝化作用进行了分析.     

The use of PEEK nanorod arrays for the fabrication of nanoporous surfaces under high temperature: SiN(x) example

Large area silicon nitride (SiN(x)) nanoporous surfaces are fabricated using poly(ether-ether-ketone) (PEEK) nanorod arrays as a template. The procedure involves manipulation of nanoporous anodic aluminum oxide (AAO) templates in order to form an ordered array of PEEK nanopillars with high temperature resistant characteristics. In this context, self-ordered AAO templates are infiltrated with PEEK melts via the "precursor film" method. Once the melts have been crystallized in the porous structure of AAO, the basis alumina layer is removed, yielding an ordered array of PEEK nanopillars. The resulting structure is a high temperature and chemical resistant polymeric nanomold, which can be utilized in the synthesis of nanoporous materials under aggressive conditions. Such conditions are high temperatures (up to 320 °C), vacuum, or extreme pH. For example, SiN(x) nanopore arrays have been grown by plasma enhanced chemical vapor deposition at 300 °C, which can be of interest as mold for nanoimprint lithography, due to its hardness and low surface energy. The SiN(x) nanopore array portrays the same characteristics as the original AAO template: 120 nm diameter pores and an interpore distance of 430 nm. Furthermore, the aspect ratio of the SiN(x) nanopores can be tuned by selecting an AAO template with appropriate conditions. The use of PEEK as a nanotemplate extends the applicability of polymeric nanopatterns into a temperature regime up to now not accessible and opens up the simple fabrication of novel nanoporous inorganic surfaces.     

ZnO薄膜的制备及应用研究进展

ZnO作为一种新型的宽禁带半导体材料,具有很好的化学稳定性和热稳定性,抗辐射损伤能力强,在光电器件、压电器件、表面声波器件等诸多领域有着很好的应用潜力。本文主要介绍制备ZnO薄膜的技术和方法,并简要的介绍了ZnO薄膜的应用进展。     

The Large-Area,Solution-Based Deposition of Single-Crystal Organic Semiconductors

Although solution processing has been hailed as a more industrially relevant route for the deposition of organic semiconductors to be used in devices, the quality and performance of solution-deposited thin films of these materials have not been able to reach that of vapor-grown single crystals until recently. Single crystals and single-crystalline films benefit from the absence of grain boundaries and the reduction of crystalline defects that impede effective charge transport through the solid. Although solution-phase deposition techniques for high-quality single-crystal growth have been reported, high-throughput, large-area deposition methods for single-crystalline films remain challenging. However, a shift toward this direction has emerged in recent years and has produced a diversity of techniques to grow, deposit, and pattern organic semiconductor single crystals and thin films. In this review, we survey the physical basis for a variety of solution-based single-crystal growth and deposition methods and discuss their advantages and shortcomings in the hopes of inspiring new ways to approach these challenges.     

Properties of SiO2 thin films prepared by anodic oxidation under UV illumination and rapid photothermal processing

Anodic oxidation under ultraviolet (UV) illumination and rapid photothermal processing technique used for high quality oxide preparation in terms of device surface passivation and gate or tunnel dielectrics are reported. A number of samples of SiO₂ thin films were prepared using this technique. It is shown that anodic oxidation under UV illumination followed by rapid photothermal processing (450 °C, 15 s) in the inert ambient yields the best optimization of the SiO₂ thin films properties. Avoiding high temperature process should result in a better performance of the semiconductor devices. Anodic oxidation under UV illumination at low temperature and post-oxidation photothermal processing can be a possible alternative to the furnace growth silicon oxide; not only because of the low temperature process, but also because this technology essential improves the oxides properties.     

2402树脂的改性及烷基酚-甲醛树脂的合成

主要围绕热敏CTP版材用酚醛树脂的合成及成像性能进行了研究。首先,2402树脂用苯酚、甲醛进行改性,得到碱溶性好、成像性能优的成膜树脂。其二,利用邻甲酚、对甲酚、对叔丁基酚及其混合物在不同催化剂下,合成主链醚化的酚醛树脂或末端带羟甲基的酚醛树脂。主链醚化树脂用于阳图热敏CTP版材具有酸解活性的成膜树脂;高分子链末端带有羟甲基,在预烘过程中,羟甲基可发生交联固化作用,弱碱显影得到阴图图像,其成像性能较好。     

RF sputter deposition of poly(tetrafluoroethylene) films as masking materials for silicon micromachining

Polymers have been studied extensively because of their wonderful array of properties. Their properties can be tailored by many means and can be made useful in many ways. Polymers can be crosslinked or branched and can provide different properties, such as conduction and passivation. This study dealt with the RF sputter deposition of poly(tetrafluoroethylene) (PTFE) films with the aim of using them as masking materials during the fabrication of various micromachined structures. The films were deposited on silicon substrates at different plasma powers (100, 150, and 200 W) for a constant deposition time (60 min). To test the masking properties, the deposited films were immersed in a 20 wt % aqueous KOH solution at 80°C for 60 min. The films showed lower contact angles and interfacial tension, and this indicated good adhesion of the films to the silicon substrates. Good adhesion is an essential quality of masking materials during micromachining. The structural properties of the as‐deposited and etched films were studied with Fourier transform infrared and X‐ray photoelectron spectroscopy. These indicated that the bonding groups and binding energies of C? F and C? CF matched the reported values well. Furthermore, the presence of C? F and C? CF bonds, even after the etching of silicon substrates in highly alkaline KOH solutions for 60 min, showed that the PTFE films remained unchanged in the etchant and, therefore, could function as good masking materials during the fabrication of micromachined structures. © 2003 Wiley Periodicals, Inc. J Appl Polym Sci 91: 1183–1192, 2004     

金属纳米线的制备及其在电子材料中的应用

随着电子器件向集成化、柔性化的发展,传统锡铅焊料、氧化铟锡薄膜等电子材料已经不能满足导电、导热、柔性等性能的要求。金属纳米线具备优异的光电性能和独特的一维结构,以其为关键成分的新材料成为传统电子材料最具潜力的替代品。金属纳米线产业链的发展涉及原料、设备、工艺与应用多方面,但关键技术在于金属纳米线的大规模、低成本、绿色高效制备。综述了近年来金属纳米线的主要制备方法,包括物理气相沉积法、化学气相沉积法、模板法、溶剂热法以及多元醇法,并对金属纳米线在导电胶、透明导电薄膜、热界面材料等电子材料的最新应用进展进行了概述。     

SnO2 and CeO2-doped SnO2 materials obtained by sol–gel alkoxide route

Tin dioxide-based materials have interesting electrical and optical properties being used as gas sensor, catalysts and inorganic ion-exchanger. In this paper a study on the preparation of the SnO₂ and CeO₂-doped SnO₂ powders and films by a sol–gel method, starting from the corresponding metal alkoxides, has been performed. The stabilized tin and tin with cerium organic sols were used for deposition of the thin films on glass and silicon single crystal. Powders were obtained after thermal treatment of the gels formed by the gelation of the solutions in air, at room temperature. The films have been deposited by dip coating on glass and silicon wafers and were characterized by X-ray diffraction and atomic force microscopy and the powders by DTA/TG analysis, X-ray diffraction, IR spectroscopy and specific surface area analysis.     

(Sn_(1-x),Ni_(2x))O_2纳米颗粒膜的制备及半导体性能

为提高SnO2的半导体性能,以分析纯SnCl2.2H2O和NiCl2.6H2O为主要原料,控制不同n(Ni2+)/n(Sn2+),利用溶胶凝胶-浸渍提拉法制备了(Sn1-x,Ni2x)O2纳米颗粒膜及半导体元件。用XRD、AFM对样品的结构、形貌进行了分析,并测试了(Sn1-x,Ni2x)O2元件的半导体性能。结果表明,(Sn1-x,Ni2x)O2纳米颗粒膜表面椭球形颗粒排列致密,尺寸约30 nm,(Sn1-x,Ni2x)O2为金红石型结构,但Ni2+代替了SnO2晶格中的部分Sn4+,使其晶胞参数a轴长平均减小0.000 4 nm,c轴长平均减小0.000 3 nm;随n(Ni2+)/n(Sn2+)由0.006增大到0.03,(Sn1-x,Ni2x)O2的晶粒尺寸由约45 nm减小至约18 nm;随温度由30℃上升至150℃,n型(Sn1-x,Ni2x)O2半导体元件的电阻约减小至其10%,而纯净SnO2元件的电阻仅约减小至其15%;随n(Ni2+)/n(Sn2+)的增大,离子化杂质散射增强,(Sn1-x,Ni2x)O2内部载流子迁移率下降,元件在150℃左右的电阻也由4.8 kΩ增大至12.1 MΩ,提高了元件的半导体性能。