A new twisted differential line structure on high-speed printed circuit boards to enhance immunity to crosstalk and external noise

Differential signaling has become a popular choice for high-speed interconnection schemes on Printed Circuit Boards (PCBs), offering superior immunity to external noise. However, conventional differential transmission lines on PCBs have problems, such as crosstalk and radiated emission. To overcome these, we propose a Twisted Differential Line (TDL) structure on a multilayer PCB. Its improved immunity to crosstalk noise and the reduced radiated emission has been successfully demonstrated by measurement. The proposed structure is proven to transmit 3 Gbps digital signals with a clear eye-pattern. Furthermore, it is subject to much less crosstalk noise and achieves a 13 dB suppression of radiated emission.     

PCB板级双绞互连结构减小感性和容性串扰噪声

非屏蔽双绞线已经被广泛的运用于网络的互联中,双绞的结构能够提高对串扰和辐射发射的抵抗能力。在高速数字电路的PCB板上差分信号变得越来越多。随着上升时间的加快,差分信号的信号完整性问题变得越来越重要。最近,一种新的双绞差分传输线被引入到布线中。文章通过理论和仿真分析了这种双绞差分线结构如何减小串扰和辐射发射。     

使用双绞差分结构减小印刷电路板上的串扰和辐射发射

随着发展的需要,高速数字电路PCB板上信号速度越来越快,由于差分信号有较强的抗干扰能力,因此用的得越来越普遍。但是,随着上升时间的进一步减小,差分信号的信号完整性问题也变得越来越重要。由于双绞的结构在一定程度上使得干扰相互抵消,从而提高系统对串扰和辐射发射的抵抗能力,因此,近两年来有一种新的双绞差分传输线被引入到布线中。本文从理论上分析了双绞差分线结构减小串扰和辐射发射的机理,并且通过建模仿真验证了其正确性．     

Altered phase velocity lines for low crosstalk microstrip interconnection of high-speed digital circuits: design and experimental validation

Altered phase velocity lines are a novel kind of parallel microstrip lines for high-speed interconnection of digital circuits, on which the crosstalk is reduced by the different phase velocities of propagation on the adjacent lines. In this paper, a design method is proposed to optimize the geometry sizes of the altered phase velocity lines. The measured results of a prototype altered phase velocity pair designed by the proposed method are presented to validate the design method. And the effects of the process variation are simulated to analyze the robustness of the prototype in fabrication. The altered phase velocity lines outperform the symmetric parallel microstrip lines in terms of the lower far-end crosstalk (FrdCtk) and the lower dielectric loss. This technique reduces the FrdCtk in the pair of the microstrip transmission lines and does not significantly improve the near-end crosstalk. The prototype works at the speed of 2 Gbps for low crosstalk digital signal transmission, while it can transmit the high-speed clock signal at 10.5 GHz, so the altered phase velocity lines are a useful supplementary to the existing low crosstalk interconnection concepts in the scenario that the parallel microstrips have to be placed closely on printed circuit board.     

耦合传输线信道传输矩阵建模及串扰抵消效果分析

针对高速互连系统中传输线上的串扰问题,基于电磁耦合理论,研究了耦合传输线信道传输矩阵的性质,建立了以下两种情况的耦合传输线信道传输矩阵模型及其矩阵分解形式,分别是：（1）考虑受扰线两边各一条相邻微带线对受扰线的串扰;（2）考虑受扰线两边各两条相邻微带线对受扰线的串扰.给出了上述两种情况下基于耦合传输线信道传输矩阵分解形式的串扰抵消方案,并利用仿真工具ADS对其进行了验证.结果表明：信号抖动和失真大幅下降,串扰抵消效果良好,并且第二种情况下的串扰抵消效果优于第一种情况.该结果说明了在基于耦合传输线信道传输矩阵进行串扰抵消时,考虑两边各两条相邻微带线的串扰效果较好,对保持高速信号完整性具有一定的实际应用价值.     

宇航用千兆LVDS传输线等长试验研究

LVDS(低压差分信号)技术广泛地应用于对低抖动、信号完整性和共模特性要求较高的系统中。为了确保LVDS信号传输的完整性,对宇航用千兆LVDS传输线(差分线对两绝缘线)等长与否对所传输信号的衰减以及对内延时差的影响进行了试验研究。研究结果发现:两差分传输线非等长是宇航用千兆LVDS传输线中差分信号传输质量下降的主要原因之一,而控制等长的重要工序为对绞,控制手段为张力一致;在传输2Gb/s LVDS信号时,宇航用千兆LVDS传输线中两差分传输线的长度偏差应小于1.6mm。     

非平行微带线间的串扰抵消研究

非平行微带线是印刷电路板(PCB)上不可避免的互连结构。针对PCB 上非平行微带线间的串扰问题,用平行微带线近似非平行微带线,把平行耦合微带线间的串扰抵消方法应用到非平行耦合微带线中,提出了利用耦合传输线信道传输矩阵方法来进行远端串扰抵消,在对非平行耦合传输线信道传输矩阵进行特征值分解的基础上构建串扰抵消电路。仿真了非平行微带线间夹角分别为q=3°、5°、10°时的串扰,结果表明,该方法可以有效改善非平行微带线上信号眼图的质量,串扰抵消效果良好。     

Stretchable Twisted‐Pair Transmission Lines for Microwave Frequency Wearable Electronics

Stretchable electrical interconnects based on serpentines combined with elastic materials are utilized in various classes of wearable electronics. However, such interconnects are primarily for direct current or low‐frequency signals and incompatible with microwave electronics that enable wireless communication. In this paper, design and fabrication procedures are described for stretchable transmission line capable of delivering microwave signals. The stretchable transmission line has twisted‐pair design integrated into thin‐film serpentine microstructure to minimize electromagnetic interference, such that the line's performance is minimally affected by the environment in close proximity, allowing its use in thin‐film bioelectronics, such as the epidermal electronic system. Detailed analysis, simulations, and experimental results show that the stretchable transmission line has negligible changes in performance when stretched and is operable on skin through suppressed radiated emission achieved with the twisted‐pair geometry. Furthermore, stretchable microwave low‐pass filter and band‐stop filter are demonstrated using the twisted‐pair structure to show the feasibility of the transmission lines as stretchable passive components. These concepts form the basic elements used in the design of stretchable microwave components, circuits, and subsystems performing important radio frequency functionalities, which can apply to many types of stretchable bioelectronics for radio transmitters and receivers.     

An efficient crosstalk parameter extraction method for high-speedinterconnection lines

A proposal is presented for an effective extraction method for crosstalk model parameters of high-speed interconnection lines. In the extraction procedure, mutual capacitance and mutual inductance of the coupled interconnection lines are extracted based on S-parameter measurement, time-domain-reflectometry (TDR) measurement and subsequent microwave network analysis. The extraction method is useful for characterizing homogeneous guiding structures, where the propagation of coupled transverse electromagnetic (TEM) modes is supported. In contrast to previous extraction methods, the suggested procedure requires fewer on-wafer probing steps and does not need matched terminations in the test device for high-frequency probing. The extracted models can be readily used with simulation program with integrated circuit emphasis (SPICE) circuit simulation. The procedure can also be used for modeling the crosstalk in packaging structures and multichip modules (MCMs). The proposed procedure has been successfully applied to the crosstalk model extraction of on-chip interconnection lines. Crosstalk model parameters were obtained for different line structures, spaces, and widths. Finally, the validity and reliability of the extracted models were examined by comparing a SPICE circuit simulation using the extracted crosstalk model parameters with high-speed time-domain crosstalk measurement. A close agreement was observed in the amplitude and pulse shape between the simulation and the measurement, showing the accuracy and usefulness of the proposed extraction method     

Investigation of Crosstalk and Coupling Effects of Incident Plane Waves in Orthogonal Microstrips in High-Speed Integrated Circuits Using Full-Wave and Quasi-Static Methods

The crosstalk and coupling of the external fields on orthogonal microstrip transmission lines in different layers have significant effects on signal quality in MMIC and PCBs. In this paper the crosstalk is analyzed in detail using both full-wave and quasi-static methods. The used full wave method is mixed potential integral equation method of moment (MPIEMoM). Because of the weak coupling between lines, the effect of the incident plane-wave is studied by applying transmission line theory in a scattered voltage formulation uses quasi-TEM propagation model for each interconnection and the exact distribution of the incident electric field within the layers. Afterward, by using the predetermined lumped circuit model of the cross-region, the effect of coupling between two lines is calculated and then applied to terminal voltages in 1–20 GHz frequency range which results in the final terminal voltages.     

微米级平行互连线的测试结构设计

研究分析无串扰传输理想模型的条件,根据高速高密度电路板中微米级、亚毫米级互连线电磁串扰特性研究需要,首次提出微米级平行互连线的测试结构设计。经射频电路理论分析推导了测试结构对系统串扰没有影响。构建了有、无测试结构的微米级平行互连线物理模型,仿真分析后,加工制作有测试结构的微米级平行互连线电路板。研究结果表明,当数字基带信号传输频率在0~3 GHz 范围时,无测试结构仿真电路模型、有测试结构仿真电路模型、有测试结构的实验电路板,三者串扰特性吻合;微米级平行互连线的测试结构设计合理,具有工程参 考价值。     

On-chip crosstalk mitigation for densely packed differential striplines using via fence enclosures

The measured crosstalk characteristics for close-packed via fence enclosed differential stripline structures in a standard digital CMOS process are reported. The transmission lines achieve a packing pitch of 16 /spl mu/m of interconnect width per differential pair. The nearest neighbour far-end differential crosstalk is measured to be better than -43 dB and the near-end differential crosstalk is better than -37 dB below the drive signal at frequencies up to 20 GHz for 600 /spl mu/m lines. This is sufficient for use in high-density, high-speed analogue and digital integrated circuits.     

Microwave frequency crosstalk model of redistribution line patterns on wafer level package

As the operating frequency of systems increases above the gigahertz frequency range, the electrical performance of a package becomes more critical. Wafer level package (WLP) is a promising solution for future high-speed packaging needs. Because the length of the interconnection lines on the WLP is limited to die size, the WLP has a minimum number of electrical parasitic elements. Because the crosstalk generates significant unwanted noise in nearby lines, causing problems of skew, delay, logic faults, and radiated emission, the crosstalk phenomena is drawing more attention than ever among the electrical characteristics of the WLP. Consequently, the modeling of the crosstalk parameters of the WLP is very important when used in high-speed systems. In this paper, we first report the crosstalk model parameters of the WLP, especially for the redistribution layer. These can be easily embedded into SPICE circuit simulation. The model is represented by the distributed lumped circuit elements, such as the mutual capacitance and the mutual inductance. The crosstalk model was extracted from two-step on-wafer S-parameter measurements and was fitted to the measurements made at up to 5 GHz.     

A novel high-speed interface circuit saving wiring equipment

A high-speed integrated interface circuit is described, which is capable of transmitting and receiving full duplex digital signals on a twisted pair line. Thus two independent messages may be transmitted on one line at the same time. A push-pull transmitter and a differential amplifier as receiver provide a common-mode rejection of more than 1 V in either the positive or negative direction. Output signals and input threshold are compatible with ECL F100K. Compared to conventional interface transceivers this approach has the following advantages: (1) the needed number of lines and connectors is halved; (2) only one type of circuit is necessary, because both transmitter and receiver are housed in one package; (3) the reduced number of line pins leaves space for more transceiver circuits in one package.     

Binder MIMO Channels

This paper introduces a multiple-input multiple-output channel model for the characterization of a binder of telephone lines. This model is based on multiconductor transmission line theory, and uses parameters that can be obtained from electromagnetic theory or measured data. The model generates frequency-dependent channel/binder transfer function matrices as a function of cable type, geometric line-spacing and twist-length parameters, and source--load configurations. The model allows the extraction of the magnitude and the phase of individual near end crosstalk, far end crosstalk, split-pair, and phantom transfer functions from the transfer function matrix of the binder. These individual crosstalk transfer functions are often found to be very sensitive to small imperfections in the binder. Examples of category 3 twisted pair American telephone lines and ldquoquadrdquo telephone cables are also presented.     

Sensitivity of Crosstalk in Twisted-Pair Circuits to Line Twist

The prediction of crosstalk induced in an unbalanced twisted pair by an adjacent transmission line is investigated. The induced voltage at one end of the twisted pair is shown, experimentally, to be extremely sensitive to twist for low-impedance loads and relatively insensitive to twist for high-impedance loads. Ex- perimental results are given which show that a slight rotation of one end of the twisted pair ( no more than 1800) can cause a change of as much as 35 dB in the induced voltage. The consequence of these results is that, in a practical situation, one would therefore not be able to predict this crosstalk for low-impedance loads with any con- sistency. A simple model explaining these results is given.     

Performance evaluation of a multichannel transceiver system forADSL and VHDSL services

The authors study the performance of a multichannel modulation method for asymmetric digital subscriber lines (ADSLs) and very high-speed digital subscriber lines (VHDSLs). In the ADSL case, over all unloaded North American subscriber lines in the test set, a unidirectional 1.536 Mb/s data rate service from the end office to the customer premises is possible on a single twisted pair at an error rate of 10^-7 with at least a 6 dB margin used coded multichannel modulation with sufficient transmit power. In the VHDSL case, data rates in excess of 100 Mb/s can be transmitted reliably, at an error rate of 10^-7, using uncoded multichannel modulation on a single twisted pair over a distance ⩽150 ft with a sufficiently high sampling rate (≈24 MHz) and transmit power. It is shown that a cost-effective multichannel transceiver design suggested for high-speed digital subscriber line (HDSL) service will also work well for ADSL and VHDSL services with only minimal modifications     

高密度封装中互连结构差分串扰建模与分析

针对传统模型存在较大分析误差的问题,提出高密度封装中互连结构差分串扰建模与分析.在对互连结构差分传输线耦合关系分析的基础上,建立了四线差分结构串扰模型.运用该模型对互连结构差分串扰中的电阻、电容以及电感进行等效分析,解决高密度封装中互连结构差分串扰问题.经试验证明,此次建立模型平均误差为0.042,满足抑制高密度封装中...     

双绞传输线电磁兼容特性的FDTD分析

将曲线坐标系中的时域有限差分法（FDTD）拓展到空间为任意媒质情形，然后针对双绞传输线的特殊结构综合运用曲线坐标系、圆柱坐标系、旋转坐标系和子域连接法进行空间网格划分、FDTD建模，并通过求解双绞传输线和平行传输线的特性阻抗对该建模的准确度进行了验证，最后在空间线源激励下对双绞线和平行线的电磁兼容特性进行了比较，可以看出双绞线对空间电磁场的耦合能力远远低于平行线。     

高速高密度PCB的RE问题

随着数字产品的时钟频率越来越高,信号上升时间（下降时间）越来越短,PCB的RE越来越严重,已逐步成为影响产品EMC性能的重要因素之一,PCB设计过程中必须采取综合措施抑制RE。从高速高密度PCB设计的角度,总结了PCB级RE的主要来源,分析了PCB级RE的基本规律,给出了PCB级RE的抑制对策。讨论与结论对高速高密度P...