High-temperature thin-film diamond field-effect transistorfabricated using a selective growth method

Selective growth of boron-doped homoepitaxial diamond films was achieved using sputtered SiO₂ as a masking layer. The hole mobility of selectively grown films varied between 210 and 290 cm² /V-s for hole concentration between 1.0×10¹⁴ and 6.9×10¹⁴ cm^-3. The technique was used to fabricate a thin-film diamond field-effect transistor operational at 300°C. The channel resistance of the device is an exponential function of temperature. In combination with the selective growth method, this device can be used as a starting point for the development of high-temperature diamond-based integrated circuits     

A low-voltage tunneling-based silicon microaccelerometer

This paper describes the design, fabrication, and testing of a low-voltage tunneling-based silicon microaccelerometer. The device has been successfully batch-fabricated by the boron etch-stop dissolved wafer process. A 4 h, 1100°C oxygen, post-diffusion annealing process has been developed to eliminate the stress gradient in and warpage of thin (≈3 μm) heavily-boron-doped silicon microstructures. Using a simple discrete readout circuit, the device with an active area of 400×400 μm² provides a measured sensitivity of 1.66×10⁴ ppm/g (133 mV/g), bandwidth of 2 kHz in air, and a full scale range of 30 g with a nonlinearity of 0.6%. The measured noise spectrum exhibits a typical 1/f behavior and drops from 1.75 mg/√Hz (at 50 Hz) to 0.25 mg/√Hz (at 2 kHz), corresponding to a minimum detectable acceleration of 22.8 mg. The variations of the offset output voltage and device sensitivity are ±40 mV (≈0.5%) and ±0.65 mV/g (≈0.49%) in continuous operation over thirty days. The temperature coefficient of offset (TCO) and temperature coefficient of sensitivity (TCS) are -600 ppm/°C and 1200 ppm/°C, respectively     

The effect of 1300-1380°C anneal temperatures and materialcontamination on the characteristics of CMOS/SIMOX devices

The characteristics of CMOS transistors fabrication on silicon implanted with oxygen (SIMOX) materials were measured as a function of the silicon superficial layer contamination levels. In addition, postimplant anneal temperatures of 1300°C, 1350°C, and 1380°C were examined. It is found that the transistor leakage currents as well as the integrity of the gate oxide and implanted SIMOX oxide are functions of the carbon content in the starting material. Leakage currents below 1.0×10^-12 A/μm of channel width have been measured when the carbon concentration is reduced to 2×10¹⁸/cm². In addition, the integrity of the transistor gate dielectric, SIMOX implanted oxide, and oxygen precipitate density are seen to be a function of the postimplant anneal temperature. A gate dielectric breakdown field of 10 MV/cm has been achieved when the postimplant temperature is increased to 1380°C     

Effects of trap-state density reduction by plasma hydrogenation inlow-temperature polysilicon TFT

The reduction of trap-state densities by plasma hydrogenation in n-channel polysilicon thin-film transistors (poly-TFTs) fabricated using a maximum temperature of 600°C has been studied. Hydrogenated devices have a mobility of ~40 cm²/V×5, a threshold voltage of ~2 V, an inverse subthreshold of ~ 0.55 V/decade, and a maximum on/off current ratio of 5×10⁸. The effective channel length decreases by ~0.85 μm after a short hydrogenation which may be attributed to the activation of donors at trap states near the source/drain junctions. Trap-state densities decrease from 1.6×10¹² to 3.5×10¹¹ cm^-2 after hydrogenation, concomitant with the reduction of threshold voltage. Using the gate lengths at which the trap-state densities deviate from the long-channel values as markets for the leading edge of passivation, the apparent hydrogen diffusivity is found to be 1.2×10^-11 cm²/s at 350°C in the TFT structure     

Infrared imaging using uncooled focal plane arrays of unreticulated10-μm potassium tantalum niobate films

Potassium tantalum niobate (KTN) films, 10-μm thick, with a nominal Curie temperature of -20°C were formed on polished platinum-coated sacrificial yttria substrates by metalorganic deposition (MOD). These KTN films were used to fabricate focal plane arrays consisting of 128×128 pixels with each pixel on 50-μm centers and 50-μm². Using f/1 optics and a 2.5-V/μm ² detector bias, a noise equivalent temperature (NEΔT) of 0.65°C was obtained for the best 1% of the pixels when the detector and blackbody source operated at 25°C     

High-performance, 0.1 μm InAlAs/InGaAs high electron mobilitytransistors on GaAs

This letter describes the material characterization and device test of InAlAs/InGaAs high electron mobility transistors (HEMTs) grown on GaAs substrates with indium compositions and performance comparable to InP-based devices. This technology demonstrates the potential for lowered production cost of very high performance devices. The transistors were fabricated from material with room temperature channel electron mobilities and carrier concentrations of μ=10000 cm² /Vs, n=3.2×10¹² cm^-2 (In=53%) and μ=11800 cm²/Vs, n=2.8×10¹² cm^-2 (In=60%). A series of In=53%, 0.1×100 μm² and 0.1×50 μm² devices demonstrated extrinsic transconductance values greater than 1 S/mm with the best device reaching 1.074 S/mm. High-frequency testing of 0.1×50 μm² discrete HEMT's up to 40 GHz and fitting of a small signal equivalent circuit yielded an intrinsic transconductance (g_m,i) of 1.67 S/mm, with unity current gain frequency (f_T) of 150 GHz and a maximum frequency of oscillation (f_max) of 330 GHz. Transistors with In=60% exhibited an extrinsic g_m of 1.7 S/mm, which is the highest reported value for a GaAs based device     

Metal migration into polysilicon emitter after very high currentstress

TEM analyses show metal migration into the polysilicon emitter of a bipolar transistor after high current stress. At the edges of the polysilicon emitter where the current density was expected to be the highest, a metal filament was seen penetrating into the edge of the polysilicon emitter after stressing at a current density of 16.3 mA/μm² for 1.68×10⁵ s at 90°C. The metal penetration into polysilicon offers a possible cause for an electrical measurement reported by D.D. Tang et al. (1990), in which a slight lowering of the emitter contact resistance occurs after the same stress     

A high-gain monolithic D-band InP HEMT amplifier

This paper describes a three-stage monolithic amplifier that exhibits a small-signal gain of 30 dB at 140 GHz. The amplifier employs AlInAs/GaInAs/InP high electron mobility transistor devices with 0.1×150 μm² gate periphery, is implemented with coplanar waveguide circuitry fabricated on an InP substrate, and occupies a total area of 2 mm². Gain exceeding 10 dB was measured on-wafer from 129 to 157 GHz. This is the highest reported gain per stage for a transistor amplifier operating at these frequencies     

Stable single-mode operation of an 850-nm VCSEL with a higher ordermode absorber formed by shallow Zn diffusion

We report that an 850-nm vertical-cavity surface-emitting laser with a planar higher order mode absorber, formed by shallow Zn diffusion (<0.3 μm), operated at stable single-mode over the entire drive current range. A device with a 5×5 μm² absorber aperture and a 5×5 μm² oxide confined active region showed a ~0.8 mA threshold and a mode suppression ratio of 40 dB. The modeling indicates that the higher order modes will be suppressed strongly due to the much larger threshold gain, compared to that of the fundamental mode as long as the Zn diffusion depth outside the 5×5 μm² absorber aperture is over ~0.2 μm, which agrees well with the experimental results     

Fully-planar AlGaAs/GaAs HBT's achieved by selective CBE regrowth

This paper describes a novel fully planar AlGaAs/GaAs heterojunction bipolar transistor (HBT) technology using selective chemical beam epitaxy (CBE). Planarization is achieved by a selective regrowth of the base and collector contact layers. This process allows the simultaneous metallization of the emitter, base and collector on top of the device. For the devices with an emitter-base junction area of 2×6 μm² and a base-collector junction area of 14×6 μm², a current gain cut off frequency of 50 GHz and a maximum oscillation frequency of 30 GHz are achieved. The common emitter current gain h_FE is 25 for a collector current density J_c of 2×10⁴ A/cm²     

Surface-emitting multiple quantum well distributed feedback laserwith a broad-area grating coupler

A surface-emitting laser diode with a 100×200 μm² grating coupler was fabricated. Narrow beam divergence angles of 2°×0.32° and a maximum output power of 210 mW were obtained     

Heterojunction bipolar transistor utilising AlGaSb/GaSb alloysystem

A heterojunction bipolar transistor (HBT) has been fabricated using the AlGaSb/GaSb material system for the first time. The HBT structure of 100×100 μm² emitter size was made by mesa-etching the molecular-beam-epitaxially grown layers. The device exhibits a current gain as high as 160 at room temperature     

Generation of accurate on-chip time constants and stabletransconductances

A method for generating accurately known on-chip time constants and less accurate but stable transistor transconductances over process, power-supply, and temperature variations is presented. The technique uses a constant-g_m bias circuit, which has a resistor that is tuned with a fully integrated CMOS phase-locked loop (PLL) locked to an external frequency reference (normally present in most systems). Other on-chip analog circuits biased using the same constant-g_m bias circuit are also stabilized. The PLL uses a charge-pump structure with three control loops (two digital and one analog) having overlapping ranges with hysteresis to minimize tuning glitches in the steady state. The PLL has a lock range of 135 to 300 MHz, and displays an RMS jitter of 15.6 ps. The transconductances generated from the circuit display a 2.2% variation for a 60°C change in temperature, and a 1.3% variation for a 10% variation in power-supply voltage. The design has been fabricated in a 0.35-μm CMOS process, using an active area of 1200×1200 μm² and draws 5.8 mA from a 3.3-V supply     

Study on hydrogenation of polysilicon thin film transistors by ionimplantation

Hydrogenation of polysilicon (poly-Si) thin film transistors (TFT's) by ion implantation has been systematically studied. Poly-Si TFT performance was dramatically improved by hydrogen ion implantation followed by a forming gas anneal (FGA). The threshold voltage, channel mobility, subthreshold swing, leakage current, and ON/OFF current ratio have been studied as functions of ion implantation dose and FGA temperature. Under the optimized conditions (H⁺ dose of 5×10¹⁵ cm^-2 and FGA temperature at 375°C), NMOS poly-Si TFT's fabricated by a low temperature 600°C process have a mobility of ~27 cm ²/V·s, a threshold voltage of ~2 V, a subthreshold swing of ~0.9 V/decade, and an OFF-state leakage current of ~7 pA/μm at V_DS=10 V. The avalanche induced kink effect was found to be reduced after hydrogenation     

High-frequency submicrometerAl0.48In0.52As/In0.53Ga0.47As heterostructure bipolar transistors

The high speed scaling of an Al_0.48In_0.52As/In_0.53Ga_0.47 As submicrometer heterostructure bipolar transistor (HBT) is presented. Transistors with emitter dimensions of 0.5×11 and 3.5×3.5 μm² exhibit unity current-gain cutoff frequencies of 63 and 70 GHz, respectively. Emitter current density greater than 3.3×10⁵ A/cm² is demonstrated in a submicrometer AlInAs/InGaAs HBT. The analysis shows that the device speed is limited by the parasitic collector charging time     

Fabrication of high-performance AlxGa1-xAs/InyGa1-yAs/GaAs resonant tunneling diodes using amicrowave-compatible technology

A microwave-compatible process for fabricating planar integrated resonant tunneling diodes (RTDs) is described. High-performance RTDs have been fabricated using Al_xGa_1-xAs/In_y Ga_1-yAs/GaAs strained layers. Peak-to-valley current ratios (PVRs) of 4.8:1 with simultaneous peak current densities of 4×10⁴ A/cm² have been achieved at room temperature for diodes of area 9 μm². Accurate measurements of reflection gain versus frequency between 1.5 and 26.5 GHz in the negative differential region indicate that the present technology is promising for millimeter-wave integrated circuits including self-oscillating mixers, frequency multipliers, and detectors     

Two-dimensional magnetic microsensor with on-chip signal processingfor contactless angle measurement

The reported CMOS microsystem is the key element for accurate angle measurements. In combination with a permanent magnet, it is used for various wear free angular positioning control systems for automotive and industrial applications covering the full 360° range. The integrated system includes a two-dimensional (2-D) magnetic microsensor (30×30 μm² active area), offset compensation, and signal conditioning circuitry. A novel approach for the angle calculation is presented using an on-board incremental ADC. A bitstream representing the angular position of the applied permanent magnet is provided at the system output. The system achieves a 1° angular resolution with 9 mW power consumption and a permanent magnet of 100 mT. The chip is fabricated in a generic 2-μm, double-poly, double-metal CMOS process and covers an area of 2.6×4.1 mm²     

A low-power high-gain transresistance BiCMOS pulse amplifier forcapacitive detector readout

A low-power, high-gain amplifier for detector readout is discussed. The amplifier is balanced, fully differential in circuit topology, and symmetrical in layout, making it radiation tolerant and relatively insensitive to varying magnetic fields in the large detector. Before irradiation, the circuit has a measured differential gain of 110 mV/4 fC, an average 10/90% rise time t_10/90% of 19 ns, a noise figure of 433⊕93·(C_t)^1.08 electrons, e^-, and a power consumption of 750 μW. To keep the core amplifier stable, a low-power super-low gain-bandwidth (SL-GBW) amplifier with a small area is used and also discussed. The SL-GBW amplified has a transition frequency f_T of 38 kHz (including the gain stage, A), a power consumption of 150 nW, a phase margin (PM) of ≈70°, an area of 300×36 μm², and a minimum current per transistor of 7 nA, which is far above the leakage current after irradiation. The complete circuit was implemented in the radiation hard SOI-SIMOX BiCMOS-PJFET technology of DMILL     

High-temperature, high-voltage operation of pulse-doped diamondMESFET

The fabrication and operation of a pulse-doped diamond metal-semiconductor field-effect transistor (MESFET) is presented showing a usable source drain voltage of 70 V and no breakdown up to 100 V at 350°C operating temperature. A channel sheet concentration of 8.5×10¹² cm^-2 could be fully modulated leading to a maximum transconductance of 0.22 mS/mm, although full activation of the boron acceptor had not been reached. For an optimized device structure, with reduced gate length below 0.25 μm and full activation, more than 10 W/mm RF-power density can be predicted     

Size dependence of the magnetic and electrical properties of thespin-valve transistor

The electrical and magnetic properties of the spin-valve transistor (SVT) are investigated as a function of transistor size. A new fabrication process, designed to study the size dependence of the SVT properties, uses: silicon-on-insulator (SOI) wafers, a combination of ion beam and wet etching and a negative tone photoresist (SU8) as an insulating layer. The Si/Pt emitter and Si/Au collector Schottky barrier height do not depend on the transistor dimensions. The parasitic leakage current of the Si/Au collector is, however, proportional to its area. The relative collector current change with magnetic field is 240%, independent of size, while the transfer ratio starts to decrease for SVTs with an emitter area below 25 × 25 μm². The maximum input current is found to be limited by the maximum current density allowed in the base (1.7 × 10⁷ A/cm²), which is in agreement with the maximum current density for spin valves