Effect of driving forces on atom motion

There are many kinds of driving forces that can bias atom motions in the solid phase. Only the influences of the thermal gradient (thermomigration) and of electric current (electromigration) are treated here. For thermomigration, consideration is given to the action of electron and phonon fluxes and to the “intrinsic” driving force arising from the atom jump process itself. Of the many manifestations of electromigration, attention will be given to anisotropy of the effect in non-cubic single crystals, especially in some of the hexagonal metals. The electromigration of interstitials, both those of the traditional type (conforming to Hägg's rule) and the systems of monovalent solutes in polyvalent matrices (fast diffusers), is another interesting area. The electromigration of the hydrogen isotopes as interstitials in metals has rised some questions of particular interest. Finally, a few comments on the behavior of electromigration in thin films are presented. The emphasis will be on the influence of grain boundary resistivity and the symmetry properties of the interface.     

Out-of-Equilibrium Singlet-Triplet Kondo Effect in a Single C60 Quantum Dot

We have used an electromigration technique to fabricate a C₆₀ single-molecule transistor (SMT). Besides describing our electromigration procedure, we focus and present an experimental study of a single molecule quantum dot containing an even number of electrons, revealing, for two different samples, a clear out-of-equilibrium Kondo effect. Low temperature magneto-transport studies are provided, which demonstrates a Zeeman splitting of the finite bias anomaly.     

The use of early resistance and early tcr changes to predict the reliability of on-chip interconnects

A new method is presented to evaluate the resistance to electromigration of on-chip interconnects. The method is based on the high resolution in-situ electrical resistance technique. During high temperature and high current density stress measurements, two types of processes occur simultaneously: structure-relaxation and electromigration. In order to study these processes separately, the experimental conditions are adapted. The electrical resistance and TCR is measured before and after structure-relaxation and/or electromigration. Using Matthiessen's rule, it is possible to separate the contribution of the resistivity variation from the variation in geometry. The first process causes a decrease of the resistivity, whereas the second causes an increase. The influence of Cu-addition and deposition temperature is also investigated. Correlation of the resistivity variations with conventional mean time to failure (MTTF) data is demonstrated. As a consequence, with our short-time method, predictions of the resistance to electromigration of on-chip interconnects can be made after typical test times of 24 to 48 hours.     

Barrier layer effect of titanium-tungsten on the electromigration in sputtered copper films on polyimide

Titanium-tungsten is employed as the diffusion barrier in a Cu/barrier/polyimide/Si system. The electromigration damage (EMD) of Cu with a TiW barrier is investigated utilizing an empirical formula. Two activation energies are obtained suggesting a surface electromigration mechanism at low temperature (140–190 °C) and a combined migration mechanism at high temperature (190–230 °C). The presence of the TiW barrier layer improves the high temperature electromigration resistance. The effects of the TiW barrier on the microstructure and electrical properties of Cu metallization are discussed.     

Temperature measurements of metal lines under current stress byhigh-resolution laser probing

Accelerated reliability tests of aluminum interconnections with respect to electromigration are often performed by high current density stressing of particular structures designed to promote failures of this kind. In order to derive predictions of the interconnect lifetime under normal operating conditions, it is essential to know the temperature of the test structure when high current-density stressing conditions are applied. In this paper, we present the first experimental temperature measurements with two high spatial resolution laser probes of metal lines. The two optical probes provide an indirect access to the temperature of the metal line. The calibration of the probes for temperature measurements is performed by comparison to electrical temperature measurements. The probes have a lateral resolution of 1 μm. Two types of test structures, used in accelerated electromigration analysis, are studied. The measurements are compared with two theoretical simulations. Good agreement is obtained only when a particular value of the thermal conductivity of the submicrometer oxide insulation layer of the metal line is used. This is not surprising, since the thermal properties of submicrometer layers are size dependant. Our experimental method provides an elegant way to determine these parameters     

Verification of unzipping models of electromigration in gold nanocontacts by in situ high-resolution transmission electron microscopy

We observed in situ the electromigration process of gold (Au) nanocontacts (NCs) by high-resolution transmission electron microscopy. The structural dynamics of the interior and surfaces of the NCs were investigated at the atomic level. In particular, we directly verified the evidence of the unzipping model of electromigration with the in situ observation of surface-edge movement. The fundamental parameters of NCs, i.e., conductance and tensile force, were also measured during in situ lattice imaging of electromigration. Atoms migrating from the negative electrode accumulated at the most constricted regions of the NCs, leading to expansion. As a result, the NCs were compressed by the two electrodes. We demonstrated the magnitude of the force acting on the NCs during electromigration. The critical voltage of electromigration was approximately 80 mV, and the current density at the critical voltage was 60 TA m(-2). We found that Au nanogaps could be fabricated by applying this bias voltage to Au NCs.     

Effect of interfacial condition on electromigration for narrow and wide copper interconnects

The sub-micron damascene interconnects, electromigration is mainly due to the diffusion at the interfaces of Cu with liner or dielectric capping layer. Many reports have shown that Cu/capping dielectric is the dominant interface. Experiments were performed to study the effect of the interfacial conditions of Cu/capping dielectric material on electromigration for narrow and wide Cu lines. The results revealed significant differences in electromigration behavior of via-fed upper and lower layer damascene test structures. For upper layer test structure, the capping layer and plasma surface treatment significantly dominated EM performance for different line width structures. In the case of lower layer test structure, the electromigration time to failure was found to be influenced by the capping layer and via process, and it remained unaffected by the plasma surface treatment for the narrow Cu line. For the wide line width (3X), electromigration performance was influenced by the current crowding on via-bottom.     

Liquid phase electro epitaxy growth kinetics of GaAs—A three-dimensional numerical simulation study

A three-dimensional numerical simulation study for the liquid phase electro epitaxial growth kinetic of GaAs is presented. The kinetic model is constructed considering (i) the diffusive and convective mass transport, (ii) the heat transfer due to thermoelectric effects such as Peltier effect, Joule effect and Thomson effect, (iii) the electric current distribution with electromigration and (iv) the fluid flow coupled with concentration and temperature fields. The simulations are performed for two configurations namely (i) epitaxial growth from the arsenic saturated gallium rich growth solution, i.e., limited solution model and (ii) epitaxial growth from the arsenic saturated gallium rich growth solution with polycrystalline GaAs feed. The governing equations of liquid phase electro epitaxy are solved numerically with appropriate initial and boundary conditions using the central difference method. Simulations are performed to determine the following, a concentration profiles of solute atoms (As) in the Ga-rich growth solution, shape of the substrate evolution, the growth rate of the GaAs epitaxial film, the contributions of Peltier effect and electromigration of solute atoms to the growth with various experimental growth conditions. The growth rate is found to increase with increasing growth temperature and applied current density. The results are discussed in detail.     

Electromigration effect on Sn-58 % Bi solder joints with various substrate metallizations under current stress

The electromigration behavior of low-melting temperature Sn-58Bi (in wt%) solder joints was investigated with a high current density between 3 and 4.5 × 10³ A/cm² between 80 and 110 °C. In order to analyze the impact of various substrate metallizations on the electromigration performance of the Sn-58Bi joint, we used representative substrate metallizations including electroless nickel immersion gold (ENIG), electroless nickel electroless palladium immersion gold (ENEPIG), and organic solderability preservatives (OSP). As the applied current density increased, the time to failure (TTF) for electromigration decreased regardless of the temperature or substrate metallizations. In addition, the TTF slightly decreased with increasing temperature. The substrate metallization significantly affected the TTF for the electromigration behavior of the Sn-58Bi solder joints. The substrate metallizations for electromigration performance of the Sn-58Bi solder are ranked in the following order: OSP-Cu, ENEPIG, and ENIG. Due to the polarity effect, current stressing enhanced the fast growth of intermetallic compounds (IMCs) at the anode interface. Cracks occurred at the Ni₃Sn₄ + Ni₃P IMC/Cu interfaces on the cathode sides in the Sn-58Bi/ENIG joint and the Sn-58Bi/ENEPIG joint; this was caused by the complete consumption of the Ni(P) layer. Alternatively, failure occurred via deformation of the bulk solder in the Sn-58Bi/OSP-Cu joint. The experimental results confirmed that the electromigration reliability of the Sn-58Bi/OSP-Cu joint was superior to those of the Sn-58Bi/ENIG or Sn-58Bi/ENEPIG joints.     

Analysis of electromigration effects within various types of aluminum test structures

Advances in integrated circuit fabrication technology over the past two decades have resulted in integrated circuits with smaller device dimensions and larger area and complexity. This evolution of technology highlights electromigration as a major reliability problem in silicon VLSI circuits. Emphasis is placed on the scope and detail of the electromigration test structures themselves, and on the analysis of electromigration effects within various types of aluminum test structures.     

电场对Au/SiO_2及Au-Ag/SiO_2表面结构与原子迁移特性的影响

利用扫描俄歇微探针（SAM）和原子力显微镜（AFM）研究了SiO2衬底上在外加直流电场作用下沉积的Au薄膜及Au－Ag复层薄膜的表面形貌、结构变化及电迁移扩散行为。结果表明：①在衬底表面施加水平方向电场辅助沉积制备的Au薄膜其表面显示出平整的椭球形晶粒，并沿外电场方向呈织构取向。与未加电场的热蒸发沉积膜相比，具有较为均匀、有序的表面微观结构。②SiO2表面Au-Ag复层薄膜在直流电场作用下，Au，Ag物种同时向负极方向作走向迁移扩散，这与Au－Ag复层薄膜在Si（111）表面电迁移时Au，Ag分别向两极扩散的特点不同，反映了衬底性质对表面原子电迁移的影响。③Au－Ag复膜在电迁移过程中还发生了表面原子聚集状态的变化，原来沉积排布的细小晶粒在电迁移扩散过程中出现不均匀长大，导致薄膜表面粗糙度显著增加。     

Electromigration of grain boundaries in aluminum

The electromigration of grain boundaries has been investigated with aluminum wires (99.999% purity, 1 mm in diameter) in the temperature range 340°–540°C under a current stress of 6×10³ A cm^-2. Grain boundary migration in aluminum is found to be reduced or enhanced by the currents stress when the grain boundary migrates in or against the current direction, respectively. The effects of additions of copper, silicon and zirconium to aluminum on the electromigration of the grain boundaries have also been examined. The contribution of electromigration to normal grain boundary migration is found to be increased by the addition of solutes. The results are discussed on the basis of the impurity drag mechanism of grain boundary migration.     

Modeling electromigration and the void nucleation in thin-film interconnects of integrated circuits

The modern tendency for increasing the productivity of microelectronic devices at the expense of the size shrinkage and the development of densely packed multilevel microelectronic structures stipulates the rising concern for the reliability of integrated circuits. The damage of integrated circuits is mainly caused by electromigration in thin-film interconnects. The current-induced redistribution of vacancies and the action of vacancy sinks/sources lead to heterogeneous volume deformations, which, in turn, cause the rise of mechanical stresses. The interconnect failure is initiated by the nucleation of voids taking place on the crystalline structure heterogeneities like triple points, inclusions, etc. or in the plug region of multilevel metallizations. In the latter case the interconnect damage is also caused by the edge depletion. Mechanical stresses induced by electromigration strongly influence the nucleation process. In the present work we propose a general 3D model for electromigration and the rise of mechanical stresses in a passivated aluminum interconnect. A system of differential equations describing electromigration and induced deformation of an interconnect is derived. We also propose a kinetic model for the void nucleation, elaborated on the basis of the classical theory of the new phase nucleation. Integral equations for the time to the void nucleation are deduced. Based on these models numerical calculations for the void formation in a triple point of the interconnect crystalline structure and for both failure mechanisms in the plug region have been carried out. The times to nucleation and characteristic sizes of voids are calculated as functions of temperature and electric current density. The results obtained agree well with experimental data.     

Imaging electromigration during the formation of break junctions

Using a scanning electron microscope, we make real-time movies of gold nanowires during the process of electromigration. We confirm the importance of using a small series resistance when employing electromigration to make controlled nanometer-scale gaps suitable for molecular-electronics studies. We are also able to estimate the effective temperature experienced by molecular adsorbates on the nanowire during the electromigration process.     

Room-temperature single-electron transistors using alkanedithiols

We have fabricated single-electron transistors by alkanedithiol molecular self-assembly. The devices consist of spontaneously formed ultrasmall Au nanoparticles linked by alkanedithiols to nanometer-spaced Au electrodes created by electromigration. The devices reproducibly exhibit addition energies of a few hundred meV, which enables the observation of single-electron tunneling at room temperature. At low temperatures, tunneling through discrete energy levels in the Au nanoparticles is observed, which is accompanied by the excitations of molecular vibrations at large bias voltage.     

Interfacial evolution in Sn–58Bi solder joints during liquid electromigration

For Sn–58Bi low temperature solder alloy, local molten induced from electromigration Joule heating might change the atomic diffusion and interfacial behavior. In this paper, the diffusion behavior and interfacial evolution of Cu/Sn–58Bi/Cu joints were studied under liquid–solid (L–S) electromigration in molten solder and were compared with the interfacial behaviors in solid–solid (S–S) electromigration in solid solder. L–S or S–S electromigration was realized by applying a current density of 1.0?×?10⁴ A/cm² to molten solder at 150 °C or solid solder at 25 °C, respectively. During S–S electromigration, Bi atoms were driven towards anode side under electromigration induced flux and then accumulated to form Bi-rich layer near anode interface with current stressing time increasing. During L–S electromigration, Bi atoms were reversely migrated from anode to cathode to produce Bi segregation at cathode interface, while Cu atoms were rapidly dissolved into molten solder from cathode and migrated to form large amounts of Cu₆Sn₅ rod-like phases near anode interface. The reversal in the direction of Bi atoms may be attributed to the reversal in the direction of electromigration induced flux and correspondingly the change on effective charge number of Bi atoms from negative to positive.     

Can amorphization take place in nanoscale interconnects?

The trend of miniaturization has highlighted the problems of heat dissipation and electromigration in nanoelectronic device interconnects, but not amorphization. While amorphization is known to be a high pressure and/or temperature phenomenon, we argue that defect density is the key factor, while temperature and pressure are only the means. For nanoscale interconnects carrying modest current density, large vacancy concentrations may be generated without the necessity of high temperature or pressure due to the large fraction of grain boundaries and triple points. To investigate this hypothesis, we performed in situ transmission electron microscope (TEM) experiments on 200 nm thick (80 nm average grain size) aluminum specimens. Electron diffraction patterns indicate partial amorphization at modest current density of about 10(5) A cm(-2), which is too low to trigger electromigration. Since amorphization results in drastic decrease in mechanical ductility as well as electrical and thermal conductivity, further increase in current density to about 7 × 10(5) A cm(-2) resulted in brittle fracture failure. Our molecular dynamics (MD) simulations predict the formation of amorphous regions in response to large mechanical stresses (due to nanoscale grain size) and excess vacancies at the cathode side of the thin films. The findings of this study suggest that amorphization can precede electromigration and thereby play a vital role in the reliability of micro/nanoelectronic devices.     

Voltage-pulse-induced electromigration

We propose and demonstrate a voltage-pulse-induced electromigration technique, in which electromigration in a gold nanowire is induced for a short period of about 10?μs by applying a voltage pulse. A local temperature analysis and a controlled electromigration experiment in the presence of voltage pulses indicate successful control of this voltage-pulsed-induced electromigration. We also measured the current-voltage characteristics of the nanowire after the application of each single voltage pulse to investigate the stochastic behavior of electromigration. A pulse duration shorter than the thermal relaxation time of the nanowire would allow us to separately control the local temperature and driving force for electromigration.     

Electromigration Failure of Metal Lines

With the scaling down process of microcircuits in semiconductor devices, the density of electric current in interconnecting metal lines increases, and the temperature of the device itself rises. Electromigration is a phenomenon that metallic atoms constructing the line are transported by electron wind. The damage induced by electromigration appears as the formation of voids and hillocks. The growth of voids in the metal lines ultimately results in electrical discontinuity. Our research group has attempted to identify a governing parameter for electromigration damage in metal lines, in order to clarify the electromigration failure and to contribute to circuit design. The governing parameter is formulated based on the divergence of the atomic flux by electromigration, and is denoted by AFD. The prediction method for the electromigration failure has been developed by using AFD. The AFD-based method makes it possible to predict the lifetime and failure site in universal and accurate way. In the actual devices, the metal lines used in the integrated circuit products are covered with a passivation layer, and the ends of the line are connected with large pads or vias for current input and output. Also, the microstructure of metal line distinguishes the so-called bamboo structured line from polycrystalline line depending on the size of metallic grains relative to the line width. Considering the damage mechanisms depending on such line structure, our research group has made a series of studies on the development of the prediction method. This article is dedicated to make a survey of some recent achievements for realizing a reliable circuit design against electromigration failure.     

Surface electromigration of sputtered copper patterned using ion milling or chemical mechanical polishing

Electromigration characteristics of sputtered copper patterned both by ion milling and, more recently, by chemical mechanical polishing (CMP) have been studied. Comparison was made with the electromigration characteristics of sputtered aluminum. Standard unpassivated copper lines, patterned by ion milling, and stressed at 300 °C and 2MAcm^-2 in a N₂ ambient, exhibited a mean-time-to-failure (MTF) of 90 h, compared with only 20 h for aluminum lines of similar dimensions. CMP of the electromigration test structures proved quite challenging because of the large contact pads. Benzotriazole (BTA), used as a passivating agent in the polish process, is effective in preventing copper corrosion. However, the MTF obtained for copper lines patterned by CMP is only approximately 60 h. This is attributed to a reduction in surface diffusion caused by scratches from the alumina abrasive particles. Copper grain size plays an important role in electromigration. The longest electromigration resistance test period was achieved on copper composed of small grains. A decrease in lifetime was also found to be caused by oxidation of the samples. However, a passivating layer of spin-on-glass (SOG) further increased the MTF to greater than 100 h.