Fully Monolithic Cellular Buck Converter Design for 3-D Power Delivery

A fully monolithic interleaved buck dc-dc point-of-load (PoL) converter has been designed and fabricated in a 0.18-mm SiGe BiCMOS process. Target application of the design is 3-D power delivery for future microprocessors, in which the PoL converter will be vertically integrated with the processor using wafer-level 3-D interconnect technologies. Advantages of 3-D power delivery over conventional discrete voltage regulator modules (VRMs) are discussed. The prototype design, using two interleaved buck converter cells each operating at 200 MHz switching frequency and delivering 500 mA output current, is discussed with a focus on the converter power stage and control loop to highlight the tradeoffs unique to such high-frequency, monolithic designs. Measured steady-state and dynamic responses of the fabricated prototype are presented to demonstrate the ability of such monolithic converters to meet the power delivery requirements of future processors.      

A 233-MHz 80%-87% efficient four-phase DC-DC converter utilizing air-core inductors on package

We demonstrate an integrated buck dc-dc converter for multi-V/sub CC/ microprocessors. At nominal conditions, the converter produces a 0.9-V output from a 1.2-V input. The circuit was implemented in a 90-nm CMOS technology. By operating at high switching frequency of 100 to 317 MHz with four-phase topology and fast hysteretic control, we reduced inductor and capacitor sizes by three orders of magnitude compared to previously published dc-dc converters. This eliminated the need for the inductor magnetic core and enabled integration of the output decoupling capacitor on-chip. The converter achieves 80%-87% efficiency and 10% peak-to-peak output noise for a 0.3-A output current and 2.5-nF decoupling capacitance. A forward body bias of 500 mV applied to PMOS transistors in the bridge improves efficiency by 0.5%-1%.     

单片集成直流-直流转换器的效率提高方法

采用SMIC 0.13μm CMOS工艺,设计实现了开关频率达到250 MHz,单片集成的降压型电源转换器。为了提高电源转换效率,该转换器中的片上电感采用非对称性设计方法,提高了电感的品质因数。采用了高密度片上滤波电容来稳定输出电压,同时对单位电容尺寸的优化设计减小了电容的等效串联电阻以及输出电压纹波。测试结果表明,芯片输入电压为3.3 V,当输出2.5 V电压时,峰值效率达到了80%,最大输出电流达到270 mA;当输出1.8 V电压时,峰值效率达到了70%,最大输出电流达到400 mA。     

Integrated on-chip 0.35 μm BiCMOS current-mode DC–DC buck converter

A current-mode DC–DC buck converter with a fully integrated power module is presented in this article. The converter is implemented using BiCMOS technology in amplifier and power MOSFET in a current sensor. The current sensor is realised by the power lateral double-diffused MOSFET with the aspect ratio much larger than that of a matched p-MOSFET. In addition, BiCMOS technology is applied in the error amplifier for an accurate current sensing and a fast transient response. The DC–DC converter is fabricated with 0.35?µm BiCMOS process. Experimental results show that the fully integrated converter operates at 1.3?MHz switching frequency with a supply voltage of 5?V. The output DC voltage is obtained as expected and the output ripple is controlled to be within 2% with a 30?µH off-chip inductor and 100?µF off-chip capacitor.     

Fully Integrated High-Voltage Front-End Interface for Ultrasonic Sensing Applications

This paper concerns the design and implementation of a fully integrated high-voltage (HV) front-end transducer for ultrasonic sensing applications. This includes a programmable HV dc-dc converter (HVDC), a drive amplifier, and a tuneable pulse generator. The HVDC is based on a multistage two-phase voltage doubler and static level up shifters. The drive amplifier is composed of a static level-up stage and a Class-D switching output stage. Post-layout simulation and experimental silicon results are reported for two HVDC stages and a drive amplifier, which were fabricated using a 0.8-mum CMOS/DMOS process and having a supply voltage of 5 V/400 V. The measurement results confirm the validation of the HV circuit implementation and its design optimization. An output voltage of up to 200 V was obtained from the HVDC. Also, the drive amplifier generates spikes up to 148 V, with rise and fall times of 69 and 58 ns, respectively. The peak current flowing through the transducer element can be as high as 200 mA     

Dual-bridge DC-DC converter: a new topology characterized with no deadtime operation

Two new topologies characterized by no deadtime and small valued filter inductor, the Dual-Bridge dc-dc converter and the Dual-Bridge dc-dc converter with ZVS, are presented and analyzed. Compared to the conventional Full-Bridge converter, the dc-dc converters with the proposed topologies have lower input current ripple, less stress on power switching components and smaller output filter inductor. Simple self-driven synchronous rectification can be used in the new topologies for high efficiency implementation. Prototype dc-dc converters have been tested for the verification of the principles. Both simulations and experiments verify the feasibility and advantages of the new topologies. The advantages and disadvantages of the topologies are discussed.     

基于耦合电感的四相交错Buck变换器研究

基于耦合电感的四相交错Buck变换器是由4个同步Buck变换器通过磁耦合技术并联组成。在分析其工作原理、软开关条件以及设计耦合电感的基础上,以TMS320F28035作为控制核心,搭建了一台16 kW的实验样机。实验结果表明,该变换器在移相（PS）PWM控制策略下,开关管电流应力小,电流纹波明显减小,可在全负载范围内实现零电压开关（ZVS）,适用于低压大电流、大功率应用场合。     

一种新型基于二次型Buck变换器的交错并联LED驱动电源

为了减小输出电流纹波,提出了一种基于二次型Buck变换器的交错并联LED驱动电源。主电路由一个二次型Buck变换器和一条新增支路构成,这条新增支路包括一个开关管、二极管、电感和电容,优化了原有的拓扑结构,实现了高功率因数和恒流输出。采用交错并联技术,有效减小了滤波电感和输出电流纹波,纹波大小仅为输出电流峰峰值的0.18%。最后通过实验样机详细验证了理论分析的正确性。     

Interleaved ZVS Converter With Ripple-Current Cancellation

In this paper, an interleaved soft-switching converter with ripple-current cancellation is presented to achieve zero- voltage-switching (ZVS) turn-on and load current sharing. In order to achieve ZVS turn-on, an active snubber is connected in parallel with the primary winding of the transformer. The energy stored in the transformer leakage inductance and magnetizing inductance can be recovered so that the peak voltage stress of switching devices is limited. The resonance at the transition interval is used to realize ZVS turn-on of all switches. In order to achieve three-level pulsewidth-modulation (PWM) scheme, an addition fast-recovery diode is used in the converter. Three-level PWM scheme can reduce the ac ripple current on the output inductor such that the output inductor can be reduced. The current-doubler rectifier is adopted in the secondary side of the transformer to reduce the transformer secondary-winding current and output voltage ripple by canceling the current ripple of two output inductors. The output voltage is controlled at the desired value using the interleaved PWM scheme. These features make the proposed converter suitable for the dc-dc converter with high output current. The operation principles, steady state analysis, and design equations of the proposed converter are provided in detail. Finally, experiments based on a 600-W (12 V/50 A) prototype are provided to verify the effectiveness and feasibility of the proposed converter.     

A novel winding-coupled buck converter for high-frequency, high-step-down DC-DC conversion

This paper analyzes the fundamental limitations of the buck converter for high-frequency, high-step-down dc-dc conversion. Further modification with additional coupled windings in the buck converter yields a novel topology, which significantly improves the efficiency without compromising the transient response. An integrated magnetic structure is proposed for these windings so that the same magnetic cores used in the buck converter can be used here as well. Furthermore, it is easy to implement a lossless clamp circuit to limit the device voltage stress and to recover inductor leakage energy. This new topology is applied for a 12V-to-1.5V/25A voltage regulator module (VRM) design. At a switching frequency of 2MHz, over 80% full-load efficiency is achieved, which is 8% higher than that of the conventional buck converter.     

An improved topology of inductor-switching DC-DC converter

An improved version of an inductor-switching fast-response dc-dc converter is presented that will provide the requirements and features of the new generation of microprocessor and digital systems. Lower output voltage, higher output current, and smaller output voltage ripple requirements have greatly increased the difficulty of the power supply design. To further increase the problem, power-saving "stop-clock" modes of the microprocessor has demanded faster and more stable transient response from the dc-dc converter. A novel method of inductor switching is applied to a dc-dc converter, and it provides the prominent features of current amplification and absorption during the heavy burden of load transients. The design and simulation of the concept is verified by experiment with a 12-V input and 3.3-V/30-A output converter.     

一种应用于48V-1V系统的隔离型混合模式降压变换器

提出了一种应用于48 V-1 V系统的隔离型混合模式降压变换器,利用飞电容和变压器实现高转换比应用下的高转换效率。混合变换器结合了开关电容变换器和开关电感变换器,其中飞电容承担了部分电压降,实现了功率开关管电压应力的降低。由于开关节点处的电压摆幅较小,开关损耗随之减小;通过使用更低压的功率开关管,实现功率开关管导通损耗减小。在此基础上,隔离型混合模式降压变换器通过时序控制可以实现软开关,进而实现功率开关管开关损耗减小,使得整体效率提升。在隔离型混合模式降压变换器中,飞电容还具有隔直电容的作用,可以防止变压器偏磁。在典型应用下,即在48 V输入电压、1 V输出电压、500 kHz开关频率下,峰值效率为94.84%。     

High-accuracy current sensing circuit with current compensation technique for buck–boost converter

A novel on-chip current sensing circuit with current compensation technique suitable for buck–boost converter is presented in this article. The proposed technique can sense the full-range inductor current with high accuracy and high speed. It is mainly based on matched current mirror and does not require a large proportion of aspect ratio between the powerFET and the senseFET, thus it reduces the complexity of circuit design and the layout mismatch issue without decreasing the power efficiency. The circuit is fabricated with TSMC 0.25 µm 2P5M mixed-signal process. Simulation results show that the buck-boost converter can be operated at 200 kHz to 4 MHz switching frequency with an input voltage from 2.8 to 4.7 V. The output voltage is 3.6 V, and the maximum accuracy for both high and low side sensing current reaches 99% within the load current ranging from 200 to 600 mA.     

High efficiency,high switching speed,AlGaAs/GaAs P-HEMT DC–DC converter for integrated power amplifier modules

This paper presents a high efficiency, high switching frequency DC–DC buck converter in AlGaAs/GaAs technology, targeting integrated power amplifier modules for wireless communications. The switch mode, inductor load DC–DC converter adopts an interleaved structure with negatively coupled inductors. Analysis of the effect of negative coupling on the steady state and transient response of the converter is given. The coupling factor is selected to achieve a maximum power efficiency under a given duty cycle with a minimum penalty on the current ripple performance. The DC–DC converter is implemented in 0.5 μm GaAs p-HEMT process and occupies 2 × 2.1 mm² without the output network. An 8.7 nH filter inductor is implemented in 65 μm thick top copper metal layer, and flip chip bonded to the DC–DC converter board. The integrated inductor achieves a quality factor of 26 at 150 MHz. The proposed converter converts 4.5 V input to 3.3 V output for 1 A load current under 150 MHz switching frequency with a measured power efficiency of 84%, which is one of the highest efficiencies reported to date for similar current/voltage ratings.     

Nonisolation Soft-Switching Buck Converter With Tapped-Inductor for Wide-Input Extreme Step-Down Applications

In this paper, a new zero-voltage switching (ZVS) buck converter with a tapped inductor (TI) is proposed. This converter improves the conventional tapped inductor critical conduction mode buck converters that have the ZVS operation range determined by the TI turn ratios. It includes another soft switching range extension method, the current injection method, which gives an additional design freedom for the selection of the turn-ratios and enables the optimal design of the winding ratio of the TI so that the efficiency may be maximized. This soft-switching buck converter is suitable for wide input range step-down applications. The principle of the proposed scheme, analysis of the operation, and design guidelines are included. Experimental results of the 100-W prototype dc-dc converter are given for hardware verification also. Finally, based on the proposed soft-switching technique, a new soft-switching topology family is derived.     

两级式电流馈电推挽变换器的设计

与传统的两级式电压馈电推挽变换器相比,两级式电流馈电推挽变换器省去了前级降压式变换电路（BUCK）的输出电容和后级推挽的输出电感,因而在低压大电流多路输出的应用场合具有较大优势。文章介绍了该变换器的工作原理和主要参数设计,并进行了实验验证。实验表明：该变换器具有输入电压范围宽、开关管电压应力小的优点。     

Autotuning of Digitally Controlled DC–DC Converters Based on Relay Feedback

This paper proposes a simple autotuning technique for digitally controlled dc-dc converters. The proposed approach is based on the relay feedback method and introduces perturbations on the output voltage during converter soft-start. By using an iterative procedure, the tuning of proportional-integral-derivative parameters is obtained directly by including the controller in the relay feedback and by adjusting the controller parameters based on the specified phase margin and control loop bandwidth. A nice property of the proposed solution is that output voltage perturbations are introduced while maintaining the relay feedback control on the output voltage. The proposed algorithm is simple, requires small tuning times, and it is compliant with the cost/complexity constraints of integrated digital integrated circuits. Simulation and experimental results of a synchronous buck converter and of a dc-dc boost converter confirm the effectiveness of the proposed solution     

Stacked-Chip Implementation of On-Chip Buck Converter for Distributed Power Supply System in SiPs

An on-chip buck converter which is implemented by stacking chips and suitable for on-chip distributed power supply systems is proposed. The operation of the converter with 3-D chip stacking is experimentally verified for the first time. The manufactured converter achieves a maximum power efficiency of 62% for an output current of 70 mA and a voltage conversion ratio of 0.7 with a switching frequency of 200 MHz and a 2 times2 mm on-chip LC output filter. The active part and the passive LC output filter are implemented on separate chips fabricated in 0.35-mum CMOS and connected with metal bumps. The use of glass epoxy interposer to increase the maximum power efficiency up to 71.3% is also discussed.     

PCB integrated inductors for low power DC/DC converter

This paper discusses the use of printed circuit board (PCB) integrated inductors for low power DC/DC buck converters. Coreless, magnetic plates and closed core structures are compared in terms of achievable inductance, power handling and efficiency in a footprint of 10 /spl times/ 10 mm/sup 2/. The magnetic layers consist of electroplated NiFe, so that the process is fully compatible with standard PCB process. Analytic and finite element method (FEM) methods are applied to predict inductor performance for typical current waveforms encountered in a buck converter. Conventional magnetic design procedures are applied to define optimum winding and core structures for typical inductor specifications. A 4.7 /spl mu/H PCB integrated inductor with dc current handling of up to 500 mA is presented. This inductor is employed in a 1.5 W buck converter using a commercial control integrated circuit (IC). The footprint of the entire converter measures 10 /spl times/ 10 mm/sup 2/ and is built on top of the integrated inductor to demonstrate the concept of integrated passives in power electronic circuits to achieve ultra flat and compact converter solutions.     

Dynamic hysteresis band control of the buck converter with fast transient response

A dynamic hysteresis control of the buck converter for achieving high slew-rate response to disturbances is proposed. The hysteresis band is derived from the output capacitor current that predicts the output voltage magnitude after a hypothesized switching action. Four switching criteria are formulated to dictate the state of the main switch. The output voltage can revert to the steady state in two switching actions after a large-signal disturbance. The technique is verified with the experimental results of a 50 W buck converter.