Microprocessor teaching laboratory

This paper discusses some of the practical facilities needed for teaching the programming of microprocessors, and describes a method being implemented in the Computer Science Department of Strathclyde University.     

Microprocessor Applications

This special issue of Computer presents five papers covering as many major areas of microcomputer applications: high-level languages development for microcomputer applications, special-purpose microcomputers, computer peripherals and instrumentation, microcomputer networks, and distributed process control.     

Microprocessor Architecture

This marks the second issue of Computer devoted to the Asilomar Workshop on Microprocessors. As with the first such issue (January 1976), no attempt has been made to cover the workshop in toto (a summary report appeared in the July 1976 Computer). Rather, the goal has been to spotlight a few of the more interesting developments and philosophies that were explored during the April 1976 workshop.     

Microsystems Microprocessor Networks

The phenomenal growth of the microprocessor business over the last two years has been well covered in the technical literature. Extrapolating from this growth, typical predictions of future trends have suggested that by 1980, microprocessor complexity will increase five to ten times while the speed of the chip will triple.¹It seems reasonable to expect this performance at approximately today's microprocessor prices. If instruction set efficiency is assumed to show a direct correspondence with chip complexity, these chips can be expected to be 15 to 30 times as capable in a given application.     

Microprocessor design verification

The verification of a microprocessor design has been accomplished using a mechanical theorem prover. This microprocessor, the FM8502, is a 32-bit general-purpose, von Neumann processor whose design-level (gate-level) specification has been verified with respect to its instruction-level specification. Both specifications were written in the Boyer—Moore logic, and the proof of correctness was carried out with the Boyer—Moore theorem prover.     

Microprocessor training equipment

Effective microprocessor training courses are necessary if maximum benefits are to be achieved from the new technology. These courses sholud contain a large fraction of practical hands-on exercises using equipment that resembles as closely as possible that used in design and development laboratories. This article summarizes the tasks that must be carried out in microprocessor training equipment available. The aim is to enable the correct decisions about equipment to be made when setting up a training laboratory.     

Microprocessor code compactness

A study of code compactness in competing microprocessor architectures is reported. The architectures covered are the RCA 1802, the Intel 8080, the Motorola 6800 and the Fairchild F8. The pros and cons of benchmarking are discussed and a specific benchmark used in this paper is introduced: a utility program of about 1000 bytes. An analysis of the results is given in terms of branch instructions, call instructions, pointer manipulating instructions, and data manipulating instructions. These results will be correlated with the architectural features of the respective microprocessors. Special attention is given to the RCA architecture, since it is less well known than the others yet could outperform them in terms of code compactness.     

Microprocessor Architecture and Systems

A Workshop on Microprocessor Architecture and Systems was held on May 6-7, 1976, at Northwestern University under the sponsorship of the Technical Committee on Computer Architecture and the Technical Committee on Minis and Micros of the IEEE Computer Society. No formal theme was established, and no summary positions were presented by the attendees, but the following conclusions appeared to emerge:     

Microprocessor memory management units

This tutorial describes the current crop of commercial memory management units (MMUs) for 32-bit microprocessors. The discussion includes both complex- and reduced-instruction-set computers (CISCs and RISCs). The rationale, principles, and issues related to hardware support for memory management and virtual memory are reviewed. The design and features of high-end microprocessor MMUs are reviewed and compared with respect to a common set of criteria. Special attention is paid to Unix requirements and multiprocessor, multiple MMU considerations. The MMUs covered are Intel 80386, i486, and i860; Motorola's 68851 (MMU for the 68020), 68030, 68040, and 88200 (MMU for the 88000 series); the Fujitsu MB86920 (Sparc MMU); and the MIPS R2000/R3000     

Microprocessor Design and Application

During the past year, as more and more microprocessors (as well as information about microprocessors) have become available, the competition for the market has become fierce. The potential user now has a choice of many CPU's varying widely in computing power and price. The price of the low-cost CPU's even in small volume is now below $10 and for the powerful microprocessors ranges from $50 to $100. As the price of the microprocessor decreases toward the $2 to $12 range, the cost of the microcomputer system resides predominantly in the memory and I/O circuitry. This means that additional processors can be added and computing power can be given to applications which might have been uneconomical in the past. This issue of Computer deals with some of the problems that must be dealt with in applying these incredibly low-cost computing elements.     

一种Java—DSP微处理器系统

为了满足当前新型信息设备对其核心微处理器的特殊需求,将Java和DSP组成Java-DSP微处理器系统是微处理器系统设计的一个新趋势。给出了一种微处理器系统的体系结构,并详细论述了其各个组成部分的结构和技术特点。