质子注入型光子晶体垂直腔面发射激光器制备

在光子晶体垂直腔面发射激光器中采用质子注入工艺,使台面工艺变成纯平面工艺,降低了光子晶体结构制备难度,简化了器件制备,提高了器件的均匀性。质子注入型光子晶体垂直腔面发射激光器中的光子晶体结构,在电流限制孔小于光子晶体缺陷孔时,仍能控制器件光束及模式特性,该结果可用于优化器件阈值电流,制备高性能低阈值电流基横模器件。实验所设计制备的器件,在注入电流小于12.5 mA时,阈值电流2.1 mA,出光功率大于1 mW,远场发射角小于7,有效验证了光子晶体结构在质子注入型面发射激光器中的光束改善及模式控制作用。     

GaAs基VCSEL干法刻蚀技术研究综述

GaAs基垂直腔面发射激光器(Vertical-Cavity Surface-Emitting Laser, VCSEL)自1977年问世以来,凭借阈值电流较低、光束质量很高、可集成到二维阵列、易单模激射等优势被广泛应用于各个领域,但是其尺寸过小而在制造中难以精确控制精度、等离子体刻蚀时易对掩膜和侧壁造成形貌损伤、刻蚀过程中生成副产物过多等问题,影响了应用范围和提高了制造难度。如何保持高刻蚀速率并尽可能地减小刻蚀损伤成为了目前的研究热点问题。分析了GaAs基VCSEL干法刻蚀技术的研究现状与技术难点,并展望了未来的发展趋势。     

VCSEL的偏振特性随注入电流变化的实验研究

注入电流是影响VCSEL偏振特性的重要因素。谊论文通过实验，测量了VCSEL的出射光偏振特性随着注入电流的变化。观察到了两次偏振转换的过程，即随着注入电流的升高出射偏振光由椭圆偏振光——圆偏振光——椭圆偏振光——圆偏振光——椭圆偏振光的过程，并且在变化的过程中电流的变化范围很小。     

外腔面发射激光器GaAs基质的酸性腐蚀

外腔面发射激光器的GaAs基质厚度大,热导率低,严重阻碍有源区热量的扩散,影响激光器功率的提高。为了去除激光器的GaAs基质,采用硫酸系酸性腐蚀,通过改变腐蚀液浓度和腐蚀温度来比较腐蚀液对GaAs基质的腐蚀影响,并采用原子力显微镜照片表征了腐蚀表面的粗糙度。结果表明,当腐蚀液的体积比V（H2SO4）:V（H2O2）:V（H2O）=1:5:10,腐蚀温度为30℃时,腐蚀速率适中,为5.2μm/min,腐蚀表面粗糙度2.7nm,腐蚀总体效果较为理想。较好的GaAs基质腐蚀效果为外腔面发射激光器衬底去除腐蚀阻挡层的选择性腐蚀提供了基本的保障。     

光注入光反馈下VCSEL非线性输出特性分析

为了研究光注入和光反馈对垂直腔面发射激光器(VCSEL)非线性输出特性的影响,基于自旋反转模型(SFM),利用MATLAB数值仿真二者共同作用下VCSEL的非线性输出特性.研究结果表明:在光注入和光反馈同时作用下,VCSEL输出可以实现稳态、单周期、多周期、混沌等非线性行为.通过合理选择注入强度,可实现对VCSEL输出行为的控制.     

互注入VCSEL非线性及同步特性的理论研究

考虑到瓦注入耦合特有的非线性效应,建立了互注入式垂直腔面发射激光器（VCSEL）的理论模型,推导了系统注入锁定范围的解析表达式,理论研究了互注入的同步类型以及注入延时对系统非线性行为的影响。结果表明：在激光器参数相同的理想情况下,系统能实现完全同步,此时注入延时会影响VCSEL的运行状态;当存在参数偏差或噪声时,系统能实现延时同步,此时注入延时对同步质量的影响呈阶梯状。仿真结果验证了所推导的锁定范围表达式的正确性,发现注入锁定范围与注入量的平方根成难比。     

椭圆偏振光注入下VCSELs的偏振开关特性研究

本文基于自旋反转模型,理论研究了椭圆偏振光注入下垂直腔面发射激光器(VCSELs)的偏振开关特性。研究结果表明:在X偏振模占主导的VCSELs中,采用椭圆偏振光注入时,随着注入偏转角度θ的增大,VCSELs发生偏振开关所需的最小注入系数(ηin min)值将呈现减小的趋势;当注入偏转角度θ值固定时,随着注入光与VCSELs中心频率之间的频率失谐量从负值变化到正值,ηin min值总体呈现出先减小后增大的趋势,而ηin min的极小值出现在了注入光的频率靠近VCSELs的Y偏振模频率的附近。因此,改变注入偏转角度及注入频率失谐量均可以实现对VCSELs的偏振开关的有效调控。     

电注入连续波蓝光GaN基垂直腔面发射激光器

1 引言 半导体激光器主要有边发射和垂直腔面发射(VCSEL)2种形式.边发射的半导体激光器发出的光是多模激光,法布里一铂罗腔长度达数十微米,发出的光束发散角大,为不对称的椭圆光束;垂直腔面发射激光器(VCSEL)的谐振腔长度只有几个波长,可以发出单模激光,发散角小,光束圆形对称,其光束质量远高于边发射激光器.     

一种新型环形上DBR刻蚀微结构VCSEL及其空心光束（英文）

设计了带有质子注入高阻区的刻蚀微结构面发射半导体激光器结构,使得从出光口到上DBR形成环形波导,进而直接产生空心激光束输出。使用FDTD软件计算了刻蚀微结构VCSEL的光场分布,得到的环形模式图样在不同模式数目下都能保持空心光束的特性。制备了室温下激射波长为848 nm的微结构VCSEL,并测试其输出特性。阈值电流为0.27 A,峰值功率最高可达170 mW。不同电流下的近场图都显示出非常明显的空心环形光斑,远场光强分布曲线也符合空心光束的特性。该新型VCSEL技术为空心光束甚至阵列器件的发展提供了一种新的方法。     

Fabrication of 3-terminal transferred-electron logic devices by proton bombardment for device isolation

Proton bombardment has been used to convert n GaAs into high-resistivity material. This technique is used for isolating coplanar transferred-electron logic (t.e.l.) devices. The d.c. transfer characteristics of these devices show about 20% current drop. Preliminary experiments indicate that the device propagation delay is of the order of 50 ps.     

Reliability issues in III–V compound semiconductor devices: optical devices and GaAs-based HBTs

This paper reviews the current status of reliability issues in III–V optical devices, semiconductor lasers and light emitting diodes, and GaAs-based heterojunction bipolar transistors (HBTs). First, material issues in III–V alloy semiconductors and our current understanding of degradation in III–V semiconductor lasers and light emitting diodes are systematically presented. Generation of defects and thermal instability are among these issues for these systems. Defects introduced during crystal growth are classified into two types: interface defects and bulk defects. Defects belonging to the former type are stacking faults, V-shaped dislocations, dislocation clusters, microtwins, inclusions, and misfit dislocations, and the latter group includes precipitates and dislocation loops. Defects in the substrate can also be propagated into the epi-layer. Structural imperfections due to thermal instability are also found. They are quasi-periodic modulated structures due to spinodal decomposition of the crystal either at the liquid–solid interface or growth surface, and atomic ordering which also occurs on the growth surface through migration and reconstruction of the deposited atoms. Three major degradation modes of optical devices, rapid degradation, gradual degradation, and catastrophic failure, are discussed. For rapid degradation, recombination-enhanced dislocation climb and glide are responsible for degradation. Differences in the ease with which these phenomena occur in different heterostructures are presented. Based on the results, dominant parameters involved in the phenomena are discussed. Gradual degradation takes place presumably due to recombination enhanced point defect reaction in GaAlAs/GaAs-based optical devices. This mode is also enhanced by the internal stress due to lattice mismatch. However, we do not observe this mode in InGaAsP/InP-based optical devices. Catastrophic failure is found to be due to catastrophic optical damage at a mirror or at a defect in GaAlAs/GaAs double-heterostructure (DH) lasers, but not in InGaAsP/InP DH lasers. In each degradation mode, the role of defects in the degradation and methods of elimination of degradation are discussed. Secondly, we review the current status of two major reliability issues in GaAs-based HBTs, particularly InGaP/GaAs HBTs: degradation in current gain (β) and variation of turn-on voltage (V_be). In the case of AlGaAs/GaAs HBTs, the β gradually decreased, then drastically degraded. After degradation, the device exhibits an increase in base current I_b, which has an ideality factor n≈2 in the Gummel plot. The activation energy for the degradation was estimated to be 0.6 ± 0.1 eV. On the other hand, in InGaP/GaAs HBTs, much higher reliability than in AlGaAs/GaAs HBTs was achieved although the degradation mode is similar. The estimated E_a and time to failure for InGaP/GaAs HBTs are 2.0 ± 0.2 eV and 10⁶ h at T_j = 200°C, respectively, which are the highest values ever reported. We also review previously proposed degradation mechanisms for GaAs-based HBTs: hydrogen reactivation, microtwin-like defect formation, dark defect formation and carbon precipitation. TEM observation of a degraded InGaP/GaAs HBT indicated that there are at least two possible degradation mechanisms: formation of carbon precipitates in the base region and migration of metallic impurities from the base electrode to the base region. The second issue is concerned with the exponential increase in V_be with operating time. The mechanism for the increase in V_be has been clarified based on reactivation of passivated carbon acceptors in the base region during operation. If the device suffers from H⁺ isolation, V_be rapidly decreases at the initial stage, then exponentially increases. The first stage of V_be variation can be explained by the fact that a high density of hydrogen atoms migrating from the isolation region to the intrinsic base region, passivate the carbon atoms at the initial stage. From these results, one can expect that the use of He⁺ as an implant instead of H⁺ can solve this problem.     

Novel structure of GaAs-based interdigital-gated HEMT plasma devices for solid-state THz wave amplifier

Theoretical analysis of potential distribution in the interdigital-gated high electron mobility transistor (HEMT) plasma wave device was carried out. The dc I–V characteristics of capacitively coupled interdigital structure showed that uniformity of electric field under the interdigital gates was improved compared to the dc-connected interdigital gate structure. Admittance measurements of capacitively coupled interdigital gate structure in the microwave region of 10–40 GHz showed the conductance modulation by drain–source voltage. These results indicate the existence of plasma wave interactions.     

GaAs基通孔刻蚀的崩边形成机理研究

在砷化镓(GaAs)集成无源器件(Integrated Passive Device, IPD)的制作工艺中,通孔刻蚀是一道重要环节。蚀刻孔边缘的GaAs会被蚀刻,由此引发崩边并对器件性能及可靠性造成不利影响。本文中,用于通孔蚀刻的GaAs厚度不小于200 μm,通孔边缘没有被蚀刻的痕迹,以实现金属导线的平滑连接。采用光阻和金属来充当掩膜,有效解决了单一光阻因厚度过高而变形或者厚度薄导致GaAs衬底被蚀刻的问题。通过优化工艺,在光阻厚度为32 μm、金属掩膜厚度为0.5 μm、金属蚀刻时间为60 s以及感应耦合等离子体(Inductively Couple Plasma, ICP)蚀刻4000 s的条件下,得到了孔深为200 μm且通孔边缘平整的形貌。分析了 GaAs 崩边形成的主要原因与机理,并通过优化工艺解决了200 μm通孔的崩边问题,从而提高了器件性能及可靠性。     

Cross-sectional nanoprobing fault isolation technique on submicron devices

With continuous scaling on CMOS device dimensions, it is becoming increasingly challenging for conventional failure analysis (FA) methods to identify the failure mechanism at the circuit level in an integrated chip. Scanning Electron Microscopy (SEM) based nanoprobing is becoming an increasingly critical tool for identifying non-visual failures via electrical characterization in current electrical FA metrology for fault isolation since 2006 Toh et al. (2007), Shen et al. (2007), Ng et al. (2012) . Currently, most of the nanoprobing fault isolation is nanoprobe in top-down planar direction, such as nanoprobe on via, contact and metal line. This paper focused on fault isolation of sub-micron devices by nanoprobing on a cross-sectional plane. This is a new application area; it is very useful for sample that cannot perform fault isolation with conventional top-down planar nanoprobing, especially on non-volatile memory that with single transistor memory array that arrange in a vertical direction, such as Magnetic Random Access Memory (MRAM), Phase-Change Random Access Memory (PC-RAM), flash memory and etc.     

电学性能不反常的本征GaAs基InSb异质外延研究

采用三步工艺进行了GaAs基InSb的异质外延生长并结合实验数据和文献资料研究了生长温度和速率、InSb层的厚度、低温缓冲层质量和双In源工艺对材料Hall电学性能等的影响。发现温度和生长速率对室温载流子迁移率和本征载流子浓度影响不太大;晶体XRD FWHM随膜厚的增加而逐渐地减小;低温缓冲层的界面质量和厚度对表面形貌具有一定的影响,低温缓冲层的界面厚度不应小于30 nm,ALE低温缓冲层的方法可以降低局部表面粗糙度;实验发现在优化的工艺参数基础上采用双In源生长工艺可以生长出电学性能不发生反常的理想本征InSb异质外延薄膜材料。获得2μm厚GaAs基InSb层在300 K和77 K的Hall迁移率分别为3.6546×104 cm^2 V^-1 s^-1和7.9453×104 cm^2 V^-1 s^-1,本征载流子迁移率和电子浓度随温度的变化符合理论公式的预期。     

HEMT器件质子辐射效应仿真

GaN基高电子迁移率晶体管(HEMT)器件具有抗高频、耐高温、大功率、抗辐射等特性,在核反应堆、宇宙探测等辐射环境中具有广阔的应用前景。借助SRIM软件仿真1.8 MeV质子辐射对不同AlGaN势垒层纵向尺寸下的常规耗尽型器件内部产生空位密度的影响,并观察空位密度随深度的变化规律。在最优AlGaN势垒层厚度条件下,通过仿真对比5种不同栅氧层材料的MIS-HEMT器件,发现氮化铝(AlN)栅氧层材料具有相对较好的抗辐射效果。     

Proton implantation isolation for microwave monolithic circuits

We show that proton implantation isolation effectively reduces RF losses for microwave monolithic integrated circuits and that the degree of effectiveness is a function of the induced damage depth. RF losses are mostly due to the current conduction in semiconducting active or buffer layer.     

Large Q-factor improvement for spiral inductors on silicon using proton implantation

We have improved the Q-factor of a 4.6 nH spiral inductor, fabricated on a standard Si substrate, by more than 60%, by using an optimized proton implantation process. The inductor was fabricated in a 1-poly-6-metal process, and implanted after processing. The implantation increased the substrate impedance by /spl sim/ one order of magnitude without disturbing the inductor value before resonance. The S-parameters were well described by an equivalent circuit model. The significantly improved inductor performance and VLSI-compatible process makes the proton implantation suitable for high performance RF ICs.     

Analysis of high-power devices using proton beam induced currents

Ion beam induced charge microscopy (IBIC microscopy), a new technique which utilizes a focused beam of high energy (several MeV) protons, has been used to analyse various semiconductor structures, e.g. microelectronic circuits, radiation detectors, solar cells and CVD diamond thin films [1, 2]. Here we report the first attempt to investigate high power devices with this technique. It is demonstrated that IBIC analysis allows the characterisation of layers of different doping types located several tenths of microns below the sample surface using an ion beam energy of 2 MeV. The devices investigated are high-power light-triggered thyristors.