A low power current-reuse LC-VCO with an adaptive body-biasing technique

This work presents a low-power low-phase noise current-reuse LC voltage controlled oscillator (VCO) with an adaptive body-biasing technique that enhances the reliability of the proposed circuit under process, voltage, and temperature (PVT) variations. Furthermore, the supply voltage and power consumption of the proposed VCO are reduced by the start-up oscillation condition that is provided by the adaptive body-biased circuit. This property is in fact very interesting from the power management perspective. The proposed VCO works at carrier frequency of 1.8 GHz and draws the power of only 306 µW from a 0.9 V supply. It achieves phase noise of −123.36 dBc/Hz at 1 MHz offset and provides a figure-of-merit (FoM) of −193.61 dBc/Hz. The post-layout simulation results of designed VCO in 0.18 µm standard CMOS technology confirm the effectiveness of the proposed circuit.     

Floating active inductor based Class-C VCO with 8 digitally tuned sub-bands

A fully integrated floating active inductor based voltage-controlled oscillator (VCO) is presented. The active inductor employs voltage differencing transconductance amplifier (VDTA) as a building block. The designed VCO achieves frequency tuning by varying the bias current through the VDTA and utilizes a Class-C topology for improving the phase noise performance. The inductor-less VCO is designed and implemented in a 45-nm CMOS process and its performance is estimated using Virtuoso ADE of Cadence. Operating at a supply voltage of ±1 V, the proposed VCO consumes 0.44–1.1 mW corresponding to the oscillation frequency of 1.1–1.8 GHz thereby exhibiting a tuning range of 48.27%. The phase noise of the VCO lies in the range of −94.12 to −98.37 dBc/Hz at 1 MHz offset resulting in a FOM of −172.14 to −176.69 dBc/Hz.     

A low-noise, 900-MHz VCO in 0.6-μm CMOS

This paper describes a low-noise, 900-MHz, voltage-controlled oscillator (VCO) fabricated in a 0.6-μm CMOS technology. The VCO consists of four-stage fully differential delay cells performing full switching. It utilizes dual-delay path techniques to achieve high oscillation frequency and obtain a wide tuning range. The VCO operates at 750 MHz to 1.2 GHz, and the tuning range is as large as 50%. The measured results of the phase noise are -101 dBc/Hz at 100-kHz offset and -117 dBc/Hz at 600-kHz offset from the carrier frequency. This value is comparable to that of LC-based integrated oscillators. The oscillator consumes 10 mA from a 3.0-V power supply. A prototype frequency synthesizer with the VCO is also implemented in the same technology, and the measured phase noise of the synthesizer is -113 dSc/Hz at 100-kHz offset     

S波段低相噪同轴介质压控振荡器设计

运用串联反馈振荡器理论设计了一个工作于S波段的低相噪同轴介质压控振荡器。首先分析了同轴介质谐振器的理论以及串联反馈振荡器的工作原理,然后在高频电磁仿真软件HFSS和ADS中进行仿真和设计。为了实现电调谐,将变容管合理地加入振荡器,最终设计完成了一个S波段的低相噪同轴介质压控振荡器。通过对实物成品的测量和调试表明,此压控振荡器达到了预定的技术指标,各项性能良好。测试结果:工作频率为2.075~2.250 GHz,调谐范围为1.75 GHz,输出功率≥11 dBm,谐波抑制度≥23 dBc,相位噪声优于-133 dBc/Hz@100kHz。     

Design of Sub-1 mW CMOS LC VCO based on current reused topology with Q-enhancement and body-biased technique

A CMOS LC voltage controlled oscillator (VCO) based on current reused topology with low phase noise and low power consumption is presented for IEEE 802.11a (Seller et al. A 10 GHz distributed voltage controlled oscillator for WLAN application in a VLSI 65 nm CMOS process, in: IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 3–5 June, 2007, pp. 115–118.) application. The chip1 is designed with the tail current-shaping technique to obtain the phase noise −116.1 dBc/Hz and power consumption 3.71 mW at the operating frequency 5.2 GHz under supply voltage 1.4 V. The second chip of proposed VCO can achieve power consumption Sub 1 mW and is still able to maintain good phase noise. The current reused and body-biased architecture can reduce power consumption, and better phase noise performance is obtained through raising the Q value. The measurement result of the VCO oscillation frequency range is from 5.082 GHz to 5.958 GHz with tuning range of 15.8%. The measured phase noise is −115.88 dBc/Hz at 1 MHz offset at the operation frequency of 5.815 GHz. and the dc core current consumption is 0.71 mA at a supply voltage of 1.4 V. Its figure of merit (FOM) is −191 dBc/Hz. Two circuits were taped out by TSMC 0.18 μm 1P6M process.     

一种Ku波段宽调谐范围高输出功率的InGaP/GaAs HBT VCO

本文介绍了一种采用InGaP/GaAs HBT工艺实现的全集成应用于Ku波段的压控振荡器(VCO)。该VCO采用Colpitts结构,以达到宽调谐范围,并且该VCO取得了较高的输出射频功率。测试结果表明：该VCO的振荡频率为12.82 GHz～14.97 GHz,调谐范围为15.47%,输出射频功率为0.31 dBm～6.46 dBm,在载频13.9 GHz处相位噪声为-94.9 dBc/Hz@1 MHz。在5 V单电源直流偏置下该VCO的功耗为52.75 mW,其芯片尺寸为0.81 mm×0.78 mm。最后,本文对VCO的品质因数FOM指标进行了讨论。     

基于电感电容振荡器的电荷泵锁相环的设计

设计并实现了一种采用电感电容振荡器的电荷泵锁相环,分析了锁相环中鉴频/鉴相器(PFD)、电荷泵(CP)、环路滤波器(LP)、电感电容压控振荡器(VCO)的电路结构和设计考虑。锁相环芯片采用0.13μm MS&RF CMOS工艺制造。测试结果表明,锁相环锁定的频率为5.6～6.9 GHz。在6.25 GHz时,参考杂散为-51.57 dBc;1 MHz频偏处相位噪声为-98.35 dBc/Hz;10 MHz频偏处相位噪声为-120.3 dBc/Hz;在1.2 V/3.3 V电源电压下,锁相环的功耗为51.6 mW。芯片总面积为1.334 mm2。     

应用于IMT-A和UWB系统的0.13μm CMOS宽带压控振荡器设计

基于TSMC 0.13μm CMOS工艺设计并实现了应用于IMT-Advanced和UWB系统的双频段宽带频率合成器中的电感电容压控振荡器(LC-VCO)。此压控振荡器的设计采用了开关电流源、开关交叉耦合对和噪声滤波等技术,以优化电路的相位噪声,功耗,振荡幅度,调谐范围等性能。为达到宽的调谐范围,核心电路采用了4比特可重构的开关电容调谐阵列。整个芯片包括焊盘面积为1.11′0.98 mm₂。测试结果表明,在1.2V电源电压下,两个频段压控振荡器所消耗的电流分别为3mA和4.5mA,压控振荡器的调谐范围为3.86~5.28GHz和3.14~3.88GHz。在振荡频率3.5GHz和4.2GHz上,1MHz频偏处,压控振荡器的相位噪声分别为-123dBc/Hz与-119dBc/Hz。     

A Differentially-Tuned Voltage ControlledOscillator Using Symmetric Transformer

This letter proposes a new voltage controlled oscillator (VCO) topology that cancels common-mode noise by adoption of differential tuning varactor. To suppress common mode noise effectively, a symmetric three-coil transformer is proposed as a differential tuning resonator. The measured phase noise shows -128.7 dBc/Hz at 1 MHz offset frequency from the 1.2 GHz oscillation frequency. Over the whole frequency range, common-mode noise rejection is larger than 36 dB. Measured tuning range of the proposed VCO is about 204 MHz from the 1.18 GHz to 1.38 GHz while dissipating 1.2 mA at 1.8 V power supply.     

A low-power 2/5.8-GHz dual-wide-band CMOS LC-VCO with switched-inductor technique

A fully integrated dual-band LC voltage control oscillator, designed in a 0.18-µm CMOS technology for 5.8-GHz/2.0-GHz wireless communication applications, is described. The frequency band switching is accomplished with switched-inductor technique. The dual-band oscillator can be operated in 5.38–6.23?GHz and 1.78–2.07?GHz with 15% frequency tuning range. Two different inductors are used for the frequency band switching. Frequency tuning is implemented by varying the capacitance of a MOS varactor. The measured phase noise is ?109?dBc/Hz @ 1?MHz and ?112?dBc/Hz @ 1?MHz for frequency at 5.8?GHz and 2?GHz, respectively. This oscillator is fabricated in UMC's 0.18-µm one-poly-six-metal 1.8?V process. The power dissipation of this dual-band VCO is 11.7 and 9.3?mW for oscillation frequency of 2?GHz and 5.8?GHz, respectively.     

Power efficient Ka-band low phase noise VCO in 0.13 μm CMOS

A 27 GHz cross-coupled LC voltage controlled oscillator (VCO) using a standard 0.13 mum CMOS technology is presented. The VCO using a high-Q LC resonator with a micro-strip inductor (mu-strip L) provides a phase noise of -113 dBc/Hz at a 1 MHz offset frequency. The figure - of-merit (FoM) is -194.6 dBc/Hz. To obtain high output power, it also uses a common source amplifier as a buffer and it shows the output power of -3.5 dBm at an oscillation frequency of 26.89 GHz. This is believed to be the lowest phase noise and FoM with the highest output power of a millimetre-wave VCO in CMOS technology.     

基于基片集成波导谐振器的压控振荡器设计

设计了一种基于基片集成波导谐振器的X波段压控振荡器。首先分析了串联反馈式振荡器以及基片集成波导谐振器的理论,然后在高频电磁仿真软件ADS中进行仿真和设计,并通过将变容管合理地引入谐振器,实现了电调谐的目的。最终设计完成了一个工作于X波段的基片集成波导压控振荡器。此压控振荡器与传统的介质压控振荡器(DRO)相比,具有稳定性高、平面化以及成本低的优点。由于采用了ADS中的联合仿真功能进行振荡器的设计,仿真结果的准确性得到了提高,减小了实物的调试工作量。测试结果为:工作频率为7 GHz,调谐范围为30 MHz,输出功率≥7 dBm,谐波抑制度≥22 dBc,相位噪声优于-106 dBc/Hz@100 kHz。     

Design of wide-band CMOS VCO for multiband wireless LAN applications

In this paper, a general design methodology of low-voltage wide-band voltage-controlled oscillator (VCO) suitable for wireless LAN (WLAN) application is described. The applications of high-quality passives for the resonator are introduced: 1) a single-loop horseshoe inductor with Q > 20 between 2 and 5 GHz for good phase noise performance; and 2) accumulation MOS (AMOS) varactors with C/sub max//C/sub min/ ratio of 6 to provide wide-band tuning capability at low-voltage supply. The adverse effect of AMOS varactors due to high sensitivity is examined. Amendment using bandswitching topology is suggested, and a phase noise improvement of 7 dB is measured to prove the concept. The measured VCO operates on a 1-V supply with a wide tuning range of 58.7% between 3.0 and 5.6 GHz when tuned between /spl plusmn/0.7 V. The phase noise is -120 dBc/Hz at 3.0 GHz, and -114.5 dBc/Hz at 5.6 GHz, with the nominal power dissipation between 2 and 3 mW across the whole tuning range. The best phase noise at 1-MHz offset is -124 dBc/Hz at the frequency of 3 GHz, a supply voltage of 1.4 V, and power dissipation of 8.4 mW. When the supply is reduced to 0.83 V, the VCO dissipates less than 1 mW at 5.6 GHz. Using this design methodology, the feasibility of generating two local oscillator frequencies (2.4-GHz ISM and 5-GHz U-NII) for WLAN transceiver using a single VCO with only one monolithic inductor is demonstrated. The VCO is fabricated in a 0.13-/spl mu/m partially depleted silicon-on-insulator CMOS process.     

Design of a 30 GHz rotary traveling wave oscillator with improved frequency tuning range in 0.18 μm CMOS technology

In this paper, the operation of rotary traveling wave oscillators is analyzed, the general oscillation condition is derived, and analytical formula for the oscillator loss is presented. Based on this analysis, switched transmission line is employed to extend the output frequency tuning range. Post-layout simulation shows a frequency tuning range of 3.1 GHz in the vicinity of 30 GHz. The proposed half-quadrature VCO exhibits a phase noise better than −102.2 dBc/Hz at 1 MHz offset frequency. The VCO provides an output power level ranging from −6 to −2.5 dBm with drawing 15.2 mA of dc current from a 1.8 V power supply.     

Design of 10 GHz eight-phase voltage controlled oscillator in 90 nm CMOS

A novel 10 GHz eight-phase voltage-controlled oscillator(VCO) architecture applied in clock and data recovery(CDR) circuit for 40 Gbit/s optical communications system is proposed.Compared with the traditional eight-phase oscillator,a new ring CL ladder filter structure with four inductors is proposed.The VCO is designed and fabricated in IBM 90nm complementary metal-oxide-semiconductor transistor(CMOS) technology.Measurement results show the tuning range is 9.2 GHz～11.0 GHz and the phase noise of-108.85 dBc/Hz at 1 MHz offset from the carrier frequency of 10 GHz.The chip area of VCO is 500 μm× 685 μm and the power dissipation is 17.4 mW with the 1.2 V supply voltage.     

A 5.7–6.0 GHz CMOS PLL with low phase noise and −68 dBc reference spur

This paper presents a 5.7–6.0 GHz Phase-Locked Loop (PLL) design using a 130 nm 2P6M CMOS process. We propose to suppress reference spur through reducing the current mismatch in charge pump (CP), controlling the delay time in phase frequency detector (PFD), and using a smaller VCO gain (KVCO). With a reference frequency of 32.768 MHz, chip measurement results show that the frequency tuning range is 5.7–6.0 GHz, the reference spur is −68 dBc, the phase noise levels are −109 dBc/Hz and −135 dBc/Hz at 1 MHz and 10 MHz offset respectively for 5.835 GHz. Compared with existing designs in the literature, this work’s reference spur is improved by at least 17% and its phase noise is the lowest. Under a 1.5 V supply voltage, the power dissipation with an output buffer of the PLL is 12 mW.     

Design of 1.9 GHz RF CMOS VCO

A voltage controlled oscillator (VCO) module is designed, which can be used for the third generation mobile communication (3G) system. The circuit is simulated by spectre radio frequency (RF) by TSMC 0.25 μm CMOS process. During the simulation, the performance parameters of the designed VCO are as follows: tuning range 1.804 GHz-2.039 GHz, phase noise - 136.457 dBc/Hz @1 MHz, - 146.045 dBc/Hz@3 MHz, supply voltage 2.5 V, voltage output rate of 0.8 V-2.6 V, power consumption 25 mW. The layout of the related circuit is drawn by the Virtuoso Layout Editor.     

一种带有升压电路的0.5V 3GHz低功耗LC VCO设计

采用标准的0.13μm CMOS工艺实现了0.5V电源电压,3GHz LC压控振荡器。为了适应低电压工作,并实现低相位噪声,该压控振荡器采用了NMOS差分对的电压偏置振荡器结构,去除尾电流,以尾电感代替,采用感性压控端,增加升压电路结构使变容管的一端升压,这样控制电压变化范围得到扩展。测试结果显示,当电源电压为0.5V,振荡频率为3.126GHz时,在相位噪声为-113.83dBc/Hz@1MHz,调谐范围为12%,核心电路功耗仅1.765mW,该振荡器的归一化品质因数可达-186.2dB,芯片面积为0.96mm×0.9mm。     

A 108-GHz InP-HBT monolithic push-push VCO with low phase noise andwide tuning bandwidth

This paper reports on what is believed to be the highest frequency bipolar voltage-controlled oscillator (VCO) monolithic microwave integrated circuit (MMIC) so far reported. The W-band VCO is based on a push-push oscillator topology, which employs InP HBT technology with peak f_T's and f_max's of 75 and 200 GHz, respectively. The W-band VCO produces a maximum oscillating frequency of 108 GHz and delivers an output power of +0.92 dBm into 50 Ω. The VCO also obtains a tuning bandwidth of 2.73 GHz or 2.6% using a monolithic varactor. A phase noise of -88 dBc/Hz and -109 dBc/Hz is achieved at 1- and 10-MHz offsets, respectively, and is believed to be the lowest phase noise reported for a monolithic W-band VCO. The push-push VCO design approach demonstrated in this work enables higher VCO frequency operation, lower noise performance, and smaller size, which is attractive for millimeter-wave frequency source applications     

A 580-μW 1.8–6 GHz Multiband Switched-Resonator SiGe VCO With 0.3-V Supply Voltage

This letter presents a fully integrated low-power low-voltage multiband switched-resonator differential cross-coupled voltage controlled oscillator (VCO) implemented in 0.18 SiGe-BiCMOS technology. The VCO operates with a supply voltage as low as 0.29 V, owing to the low knee-voltage provided by the technology, and consumes a total power of 580 muW. Utilizing a switched-resonator, the VCO covers a wide switched frequency range of 1.83-2.97 GHz and 4.36-6.17 GHz with measured phase noise of around 112.2 dBc/Hz with 0.29 V supply and 119.7 dBc/Hz with 1 V supply at 1 MHz offset. Since high-frequency bands experience higher phase noise than the low frequency bands, high- short microstrip line inductors have been used for the high-frequency bands. To the best of the authors' knowledge, the reported VCO achieves the widest switched frequency tuning range with lowest core supply voltage.