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1.
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We present a LC VCO design method of the multiple start-point global optimization. It is used to optimize VCO phase noise variation in different Process, supply voltage and temperature (PVT) conditions at the same time. Based on this method, we can design PVT tolerant LC VCO even without PVT compensation circuits. The design results of different foundry manufacturing process and oscillating frequency is shown to investigate the effect of this phase noise optimization method. The design method also can help to enhance manufacturing yield.  相似文献   

2.
针对个人电脑和通讯系统对频率合成器中振荡器的低相位噪声的要求,对基本的环形振荡器结构进行改进,设计了两种宽带低相位噪声CMOS环形压控振荡器(VCO),在800 MHz振荡频率、1 MHz频偏下,测试的相位噪声分别为-123 dBc/Hz和-110 dBc/Hz.两个VCO的调谐范围分别为450~1 017 MHz和559~935 MHz.  相似文献   

3.
设计了一种应用于GPS射频接收芯片的低功耗环形压控振荡器.环路由5级差分结构的放大器构成.芯片采用TSMC 0.18 μm CMOS工艺,核心电路面积0.25 mm×0.05 mm.测试结果表明,采用1.75 V电源电压供电时,电路的功耗约为9.2 mW,振荡器中心工作频率为62 MHz,相位噪声为-89.39 dBc/Hz @ 1 MHz,该VCO可应用于锁相环和频率合成器中.  相似文献   

4.
描述了以MC145152和MC1648芯片为核心,采用锁相频率合成技术来实现电压控制LC振荡器的设计思路、方法及指标测试。本系统可以产生高稳定度的正弦信号,输出频带在5~25 MHz范围内,并实时显示;输出频率的稳定度达到10-3以上。该系统在通信领域有广泛的应用前景。  相似文献   

5.
    
A synchronous oscillator using a high speed low-voltage emitter coupled logic (ECL) inverter has been reported. Using the positive feedback the locking range increases, compared to the oscillator without any positive feedback. A maximum improvement (increase) of percentage locking range of around 105% was obtained from circuit simulation as well as from practical circuit, using discrete components. Because the locking range is maximum at double the output frequency of the oscillator, this oscillator can be used as a high frequency divider circuit. The circuit requires a supply voltage of 2.1 V.  相似文献   

6.
报道了一种中心频率为2GHz的电感电容(LC)压控振荡器,其谐振回路由微机械可变电容和键合线电感构成。微机械可变电容采用与集成电路兼容的表面微机械工艺制造,在2GHz时其Q值约为32.6,当调节电压从0V增大到12V时,电容量变化范围为25%。通过键合技术将微机械可变电容与有源电路集成在一起,制备了MEMSVCO器件,测试结果表明,载波频率为2.004GHz时,VCO的单边带相位噪声为-103.5dBc/Hz@100kHz,输出功率为12.51dBm。调频范围约为4.8%。  相似文献   

7.
推-推压控振荡器的仿真设计   总被引:3,自引:0,他引:3  
在对构成推-推振荡器的基本振荡单元进行常规奇偶模分析的基础上,采用添加辅助信号源的方法,对合成后的频率调谐特性、输出功率及基波抑制特性进行了仿真模拟。并利用负载牵引法对二次谐波匹配网络进行了优化。根据仿真结果设计的X波段推-推压控振荡器,采用封装硅晶体管及砷化镓变容管,在1GHz调谐带宽内,输出功率2~8dBm。  相似文献   

8.
This paper describes a phase locked loop employing a low voltage VCO using modified ECL inverter cells. The VCO circuit employed, features a positive feed back scheme to improve the operating frequency. The phase detector used in the PLL also uses a positive feedback scheme to improve the locked range and to reduce supply voltage of operation of the entire circuit. An improvement of locked range of around 35% was obtained from circuit simulation (using PSPICE) as well as from practical circuit, using discrete components. The minimum supply voltage required here is 2.5 volts. Some biomedical applications of this PLL are also proposed.  相似文献   

9.
This paper presents a new design for a three-stage voltage-controlled differential ring oscillator embedded with a delay cell for a wide tuning range from 59 MHz to 2.96 GHz by adjusting the current level in the delay cell. The ring oscillator consists of a voltage-to-current converter, coder circuit, three-stage ring with delay cells, and current monitoring circuit to extend the tuning range of the proposed voltage-controlled oscillator. Each functional block has been designed for a minimum power consumption using the TSMC 0.18 μm CMOS technology. We simulate the performances of the proposed voltage-controlled oscillator in terms of phase noise, power consumption, tuning range, and gain. Our simulation results show that the proposed oscillator has the linear frequency–voltage characteristics over a wide tuning range. At each tuning range (mode), the calculated phase noise of the proposed ring oscillator at each tuning range (mode) was −87, −85, −81, and −79 dBc/Hz at a 1 MHz offset from the center frequency. The DC power of the proposed voltage-controlled oscillator consumed 0.86–3 mW under a 1.8 V supply voltage.  相似文献   

10.
相对于现在流行的FLASH型存储器,新型阻变存储器(resistive-RAM,RRAM)有很多优势,比如较高的存储密度和较快的读写速度。而针对RRAM的读写操作特性,提出了一种适用于新型阻变存储器的提供操作电压的电路。该方案解决了新型存储器需要外部提供高于电源电压的操作电压的问题,使得阻变存储器能应用于嵌入式设备。同时,对工艺波动和温度波动进行补偿,从而降低了阻变存储器的读写操作在较差的工艺和温度环境下的失败概率,具有很强的实际应用意义。该设计采用0.13μm标准CMOS 6层金属工艺在中芯国际(SMIC)流片实现,测试结果表明,采用此电路的RRAM能正确地进行数据编程和擦除等操作,测试结果达到设计要求。  相似文献   

11.
王蒙  杜惠平  向宏平 《电子科技》2006,(5):45-47,56
采用ADS仿真分析的方法,对多标准兼容的宽带压控振荡器中广泛采用的NMOS结构和互补结构的性能差异进行了比较,分析了采用一种改进型的开关电容阵列后对多标准兼容的宽带压控振荡器的性能的提高.  相似文献   

12.
胡心仪  林殷茵 《半导体技术》2015,40(10):754-758
随着集成电路的发展,工艺尺寸进一步微缩,工艺波动导致的器件波动对电路性能以及可靠性的影响越来越严重.版图邻近效应就是先进工艺下影响工艺波动的重要因素.为了应对先进工艺下版图邻近效应(LPE)的影响,代工厂需要确立器件波动最小且最优标准单元版图.如何精确测量相同标准单元的不同版图的器件波动具有很大的挑战.提出了一个高分辨率、高速且测试便利的器件波动检测电路,用来对6种优化LPE引入的器件波动影响的标准单元版图进行测试.电路在28 nm工艺上进行了流片验证,电路面积为690 μm×350 μm,并对全晶圆进行了测试.通过分析NMOS和PMOS的测试结果,对比了不同版图形式应对LPE影响的效果,进而为代工厂设计和优化标准单元版图,尽可能减小LPE引入的器件波动提供参考.  相似文献   

13.
研究了电压控制振荡器(VCO)的相位噪声与构成该振荡器的有源器件的低频噪声的关系,测试了SiBJT、AlGaAs/GaAs HBT和GaInP/GaAs HBT的低频噪声,并分析了各自低频噪声产生的原因,提出了选择GaInP/GaAs HBT VCO来实现微波固体振荡器低相位噪声化这一发展方向。  相似文献   

14.
对SYK801型声表面波压控振荡器(SAW VCO)在振动条件下的输出频谱性能进行了初步的探索和研究。介绍了这类型振荡器的振动灵敏度系数的表达式,初步分析影响振动灵敏度系数的主要因素,提出改善振动性能的技术措施。测试结果表明所采取的技术措施对改善振荡器的振动性能是有效的。  相似文献   

15.
This paper describes a 1.5-V low dropout regulator (LDO)-free ultra-low-power 2.4-GHz CMOS receiver for direct-powering through a coin battery. By effective merging the quadrature low noise amplifier (LNA), in phase and quadrature (I/Q) mixers, a voltage controlled oscillator (VCO) and a trans-impedance amplifier (TIA) in one cell, while removing the LDO, we fully utilize the available 1.5-V voltage supply for current-reuse between blocks, minimizing the dc current consumption. Specifically, a quadrature LNA operating as both common-source and common-drain provides the I/Q outputs in the signal path. Forward-body-bias applied to the transconductance stage of the I/Q mixers relaxes their voltage headroom consumption. Prototyped in 180-nm CMOS, the receiver exhibits a conversion gain (CG) of 23 dB, a noise figure (NF) of 13.8 dB and an input-referred 3rd-order intercept point (IIP3) of −14 dBm while consuming only 2 mA. The phase noise of the VCO is −118.5 dBc/Hz at 2.5 MHz offset. The low-cost technology and low current consumption renders the receiver suitable for Internet of Things (IoT) devices using the Bluetooth Low Energy (BLE) or ZigBee standards.  相似文献   

16.
采用TSMC 0.18μmCMOS工艺实现了全差分相位差为 450 的 LC低相位噪声环形压控振荡器电路。芯片面积 1.05 mm×1.00 mm。当仅对差分输出振荡信号的一端进行测试时, 自由振荡频率为5.81 GHz, 在5 MHz频偏处的相位噪声为-101.62 dBc/Hz。  相似文献   

17.
    
A fully integrated dual-band LC voltage control oscillator, designed in a 0.18-µm CMOS technology for 5.8-GHz/2.0-GHz wireless communication applications, is described. The frequency band switching is accomplished with switched-inductor technique. The dual-band oscillator can be operated in 5.38–6.23?GHz and 1.78–2.07?GHz with 15% frequency tuning range. Two different inductors are used for the frequency band switching. Frequency tuning is implemented by varying the capacitance of a MOS varactor. The measured phase noise is ?109?dBc/Hz @ 1?MHz and ?112?dBc/Hz @ 1?MHz for frequency at 5.8?GHz and 2?GHz, respectively. This oscillator is fabricated in UMC's 0.18-µm one-poly-six-metal 1.8?V process. The power dissipation of this dual-band VCO is 11.7 and 9.3?mW for oscillation frequency of 2?GHz and 5.8?GHz, respectively.  相似文献   

18.
    
Voltage-controlled oscillator (VCO) significantly influences power and performance in many analog and digital applications. In this era of portable electronics, power consumption has emerged as an important design metric. Intended subthreshold circuits have proven their ability to satisfy this demand of ultra low-power consumption of a multitude of applications such as RFID, microsensors, etc. Double-gate Fin-FET technology is a promising alternative to the CMOS technology for the subthreshold circuits because of its enhanced gate control, improved performance, scalability, and robustness. Therefore, this paper investigates the viability of DG FinFET Current Starved Voltage Controlled Oscillator (CSVCO) in the subthreshold regime. The results indicate the superior performance of DG FinFET-based CSVCO in regard to speed, PDP, EDP, and variability as compared to CMOS-based CSVCO. Seven different CSVCO configurations, viz.. SG, IG, hybrid, hybrid reverse, pignsg, psgnig and MIGFET, designed using different configurations of DG FinFET, are simulated using 32 nm FinFET Predictive Technology Model (PTM) in HSPICE at 150 mv power supply. The proposed pignsg CSVCO shows better results in terms of frequency obtained versus power expended giving least PDP of 1.25E-16J and better immunity to supply voltage and process variations compared to all other CSVCO configurations.  相似文献   

19.
95GHz低相噪锁相源技术研究   总被引:2,自引:1,他引:1  
基于毫米波锁相源相位噪声理论,明确指出采用低相位噪声的微波频率源可以有效改善毫米波锁相源相噪指标。利用低相位噪声的微波倍频源,结合谐波混频方式,设计出95GHz低相位噪声锁相频率源。测试结果表明,其相位噪声可以低至-90.44dBc/Hz@10kHz,验证了该设计方案的可行性。  相似文献   

20.
提出了一种基于负阻器件共振隧穿二极管(RTD)与MOSFET结合的新型压控振荡器(VCO),并利用了高级设计系统(ADS)软件对该振荡器的可行性进行了电路仿真,利用分立RTD、MOSFET器件实现了此种VCO,实际调频范围在20~26 MHz之间。RTD与三端器件的连接方式不同可呈现不同的调制I-V特性,这种调制特性对基于RTD的振荡电路的频率也会产生影响。通过深入研究这种调制对振荡电路频率产生的影响,得到多种不同于常规方法的电压控制频率方式,其中一些具有很好的线性度。因此该电路的研究对于RTD在高频、高速振荡电路中的进一步应用具有重要意义。  相似文献   

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