Double-island single-electron devices. A useful unit device forsingle-electron logic LSI's

We fabricated a single-electron device that is useful as a unit device for single-electron logic circuits. The device is a three-current-terminal device fabricated on a silicon-on-insulator (SOI) wafer, which includes two Si islands whose electric potential can be controlled by gates. Sub-50-nm Si islands were integrated in an area smaller than 0.02 μm² through self-aligned formation of the islands by pattern-dependent oxidation (PADOX) of a T-shaped wire. By PADOX, each island was embedded in one branch of the T-shaped wire. We show two electrical characteristics which demonstrate the usefulness of this device as a circuit element. First, current switching between two branches was performed at 30 K by using gate voltage to control the Coulomb blockade in each island. Second, a correlation between the two currents was observed because the two islands were integrated close to each other. The latter indicates a capacitive coupling between the islands, which opens up the possibility of one-by-one transfer of electrons in this device. These findings show that the proposed island-integration technique is applicable to making ultra-low-power and highly integrated single-electron circuits     

Design and simulation of octal-to-binary encoder using capacitive single-electron transistors (C-SETs)

This paper presents an octal-to-binary encoder that is designed using capacitive single-electron transistors (C-SETs). The design parameters are calculated by considering each C-SET as a switching device in pull-up configuration. Logic circuit is based on voltage state logic. The designed circuit was simulated using SIMON 2.0, which is based on Monte Carlo and master equation (MC-ME) methods. The simulation results verify the operation of octal-to-binary encoder.     

单电子物理学

单电子晶体管是几年前才发现的一种功能奇特的新型器件。围绕着这种器件工作机理的研究，逐渐发展了一门以库仑抑制模型为核心的崭新学科──单电子物理学。本文以单电子晶体管的发展为线索，介绍单电子物理学的主要内容及其研究现状。     

Silicon single-electron transistors with sidewall depletion gatesand their application to dynamic single-electron transistor logic

Novel single-electron transistors (SETs) with side-wall depletion gates on a silicon-on-insulator nanometer-scale wire are proposed and fabricated, using the combination of the conventional lithography and process technology. Clear Coulomb oscillation originated from the two electrically induced tunnel junctions and the single Si island between them is observed at 77 K. The island size dependence of the electrical characteristics shows the good controllability and reproducibility of the proposed fabrication method. Furthermore, the device characteristics are immune to gate bias conditions, and the position of Coulomb oscillation peak is controlled by the sidewall depletion gate voltage, without the additional gate electrode. Based on the current switching by sidewall gate voltage, the basic operation of the dynamic four-input multifunctional SET logic circuit is demonstrated at 10 K. The proposed SET offers the feasibility of the device design and optimization for SET logic circuits, in that its device parameters and circuit parameters are controllable by the conventional VLSI technology     

集成化单电子器件研究进展

传统MOSFET结构正以较快的发展速度接近其物理极限,而单电子器件将成为新型的高性能集成化器件结构。本文采用量子点及其库伦阻塞效应等概念对单电子器件的工作原理进行了系统分析,并介绍了单电子器件在存储器和高灵敏度静电计方面的应用,最后指出了单电子器件的新发展方向及所面临的问题。     

Single-electron random-number generator (RNG) for highly secure ubiquitous computing applications

Since the security of all modern cryptographic techniques relies on unpredictable and irreproducible digital keys generated by random-number generators (RNGs), the realization of high-quality RNG is essential for secure communications. In this report, a new RNG, which utilizes single-electron phenomena, is proposed. A room-temperature operating silicon single-electron transistor (SET) having nearby an electron pocket is used as a high-quality, ultra-small RNG. In the proposed RNG, stochastic single-electron capture/emission processes to/from the electron pocket are detected with high sensitivity by the SET, and result in giant random telegraphic signals (GRTS) on the SET current. It is experimentally demonstrated that the single-electron RNG generates extremely high-quality random digital sequences at room temperature, in spite of its simple configuration. Because of its small-size and low-power properties, the single-electron RNG is promising as a key nanoelectronic device for future ubiquitous computing systems with highly secure mobile communication capabilities.     

硅基单电子晶体管的制备

硅基单电子晶体管是一种极具潜力的新型量子器件。大多数硅基单电子晶体管的制备方法可以很好地与主流的CMOS工艺兼容。介绍了硅基单电子晶体管一些典型的具体制备工艺和方法以及该领域近年来的研究热点。     

Model of multi-island single-electron arrays based on the Monte Carlo method

A two-dimensional model of multi-island single-electron arrays, based on a numerical solution to the Poisson equation and the Monte Carlo method, is suggested. The adequacy of the model is shown by com-paring the I-V characteristics calculated for two different five-island structures with experimental data. This model was used to assess quantitatively a number of geometrical parameters of a single-electron device structure, which are difficult to determine experimentally.     

一种基于多输入单电子晶体管的比较器电路

基于多输入单电子晶体管(SET)的Ⅰ-Ⅴ特性和CMOS数字电路的设计思想,提出了一种由18个互补型SET和1个双栅极SET构成的1位比较器电路结构.该比较器优点为:利用一个双栅极SET的固有特性,使异或逻辑块得到了简化,减少了晶体管的数目;电压兼容性好,输入和输出高低电平都接近0.02 V和0 V;静态总功耗低(6.42 pW).仿真结果验证了电路的正确性.     

Complimentary single-electron/hole action of nanoscale SOI CMOS transistors

We propose a new device structure for room-temperature single-electron/hole transistors based on nanosize narrow-width fully depleted silicon-on-insulator (SOI) CMOS transistors. The floating body of SOI MOSFETs can become a Coulomb island, whose single charging energy is more than 30 meV, as the gate length and width of MOSFETs is less than 10 nm. As SOI MOSFETs are biased at accumulation, single-electron, or hole tunnels, are sent, one by one, from the source to the floating body and then to the drain via Zener tunneling process. N-channel SOI MOSFETs can have the functions of single-electron transistors (n-SETs) while p-channel MOSFETs can have the functions of single-hole transistors (p-SETs). SOI MOSFETs still behave as typical MOSFETs when biased at inversion. There is a gate voltage margin of 0.9 V to separate Coulomb blockade oscillations from CMOS normal operation.     

单电子晶体管的I-V特性数学模型及逻辑应用

基于正统单电子理论，提出了单电子晶体管的I-V特性数学算法改进模型。该模型的优点是：考虑了背景电荷的影响，可由实际物理参数直接获得，支持双栅极工作，便于逻辑电路的分析。研究了背景电荷和各物理参数对I-V特性及跨导的影响，讨论了双栅极单电子晶体管的逻辑应用：简化了“异或”逻辑电路，改进了二叉判别图电路的逻辑单元。     

点接触平面栅型硅单电子晶体管

设计了点接触平面栅型硅单电子晶体管,利用自对准技术实现了点接触平面栅,并通过给平面栅施加偏压实现了量子点。讨论了点接触平面栅型单电子晶体管与其通道宽度和平面栅上电压的关系。对一个具有70nm宽通道的器件,先在其表面栅上施加很小的正偏压,然后又在其平面栅上施加负偏压耗尽通道,最终的研究结果显示在通道中形成了单个量子点。     

Single-electron logic device with simple structure

A logic gate device is described that can be used to develop single-electron LSIs. The device consists of five capacitors and two tunnelling junctions. It accepts two binary inputs and produces NAND or NOR logic output by making use of the voltage shift in its tunnelling threshold caused by the input signals. Computer simulation of a sample subsystem, or a full adder, consisting of the device demonstrated that it operates correctly.     

3-D computer simulation of single-electron charging in siliconnanocrystal floating gate flash memory devices

The operation of a silicon nanocrystal quantum-dot based flash memory device is simulated numerically with emphasis on energy and charge quantization in the quantum-dot. The simulation involves the self-consistent solution of three-dimensional (3-D) Poisson and Schrodinger-like equations, with the Slater rule for determining the charging voltage. We also compute the capacitance-voltage characteristics of the device and derive the threshold voltage, V_T , variation with single-electron charging as a function of design parameters     

单电子器件

综述了单电子器件的研究进展,包括单电子器件的简要历史、研究现状、基本理论、工作性能及制作工艺,并且深入讨论了本领域今后的发展方向。     

Overview of nanoelectronic devices

This paper provides an overview of research developments toward nanometer-scale electronic switching devices for use in building ultra-densely integrated electronic computers. Specifically, two classes of alternatives to the field-effect transistor are considered: (1) quantum-effect and single-electron solid-state devices and (2) molecular electronic devices. A taxonomy of devices in each class is provided, operational principles are described and compared for the various types of devices, and the literature about each is surveyed. This information is presented in nonmathematical terms intended for a general, technically interested readership     

Voltage-Polarity-Independent and High-Speed Resistive Switching Properties of V-Doped SrZrO3 Thin Films

In this paper, nonpolar resistive switching behavior is reported for the first time in a SZO-based memory device. The electrode materials used which have different conductivities affect the resistive switching properties of the device. The Al/V:SZO-LNO/Pt device shows nonpolar switching behavior, whereas the Al/V:SZO/LNO device has bipolar switching property. The resistance ratios of these two devices are quite distinct owing to the difference between the resistance of low resistance states. The Al/V:SZO-LNO/Pt device with lower resistive switching voltages (mnplus7 V turn on and mnplus2 V turn off) and higher resistance ratio is more suitable for practical applications compared to the Al/V:SZO/LNO device. The switching speed of the Al/V:SZO-LNO/Pt device is 10 ns, which is the fastest speed that has ever been reported. The conduction mechanisms, nondestructive readout property, retention time, and endurance of this device are also reported in this paper.     

Room Temperature Single-Electron Transistor Featuring Gate-Enhanced on -State Current

A single-electron transistor operating at room temperature was successfully fabricated by an improved nanodamascene process. It consists in a gated titanium nanowire interspersed by two very closely spaced tunnel junctions constituting a Coulomb island. The improvement in the process concerns the presence of an individual control gate close to the island, paving the way toward the fabrication of single-electron circuits. Moreover, a final oxidizing plasma treatment was used to tune the tunnel junction capacitances and, thus, the device operating temperature. As expected, electrical characteristics showed Coulomb blockade at room temperature, with an unexpectedly high on-state current.      

Equivalent circuit models for resonant and PWM switches

The nonlinear switching mechanism in pulsewidth-modulated (PWM) and quasi-resonant converters is that of a three-terminal switching device which consists only of an active and a passive switch. An equivalent circuit model of this switching device describing the perturbations in the average terminal voltages and current is obtained. Through the use of this circuit model the analysis of pulsewidth modulated and quasiresonant converters becomes analogous to transistor circuit analysis where the transistor is replaced by its equivalent circuit model. The conversion ratio characteristics of various resonant converters and their relationship to a single function, called the quasi-resonant function, is easily obtained using the circuit model for the three-terminal switching device. The small-signal response of quasi-resonant converters to perturbations in the switching frequency and input voltage is determined by replacing the three-terminal switching device by its small-signal equivalent circuit model     

Single-electron logic device based on the binary decision diagram

The unit device consists of four tunnel junctions and operates as a two-way switch for single-electron transport. Any combinational logic can be implemented by connecting identical unit devices into a cascade to build the tree of a BDD graph. Several sample designs are presented for logic circuits of NAND, NOR, exclusive-OR, and AND-OR combinational logic. Computer simulation shows that the designed circuits perform the logic operations correctly