Signal processing with charge-coupled devices

The purpose of this paper is to discuss applications of charge-coupled devices in signal processing systems. Both analog and digital CCD concepts are considered. Recent developments in high-speed (∼100 MHz) CCD's are discussed, and the uses of high-speed CCD and surface-acoustic wave (SAW) devices together are considered. Examples of the applications of CCD's in electro-optical systems, secure voice communication systems, sonar systems and radar systems are given. Finally, projections for future uses of CCD's in signal processing systems are presented.     

GaAs CCD's with transparent (ITO) gates for imaging and optical signal processing

Sputtered indium tin oxide (ITO) film is used as the transparent Schottky gate material for GaAs CCD's. In addition the gigahertz clocking-rate capability of GaAs CCD's makes them attractive for high-speed optical signal processing applications. The operation of the GaAs CCD's with fixed-aperture mask over the transparent gates is reported here. Such structures are basic components of a GaAs CCD-based electrooptic processor (EOP).     

Charge handling capacity in charge coupled devices

In analog signal processing applications, the charge handling capacity of a charge coupled device (CCD) is an important parameter that determines the dynamic range. In this paper, approximate expressions for the signal handling capacity for surface-channel and buried-channel CCD's are derived and compared. The upper limit for the buried-channel charge capacity is imposed by the onset of surface electron accumulation.     

The use of submicrometer electron-beam lithography for fabricating 4-kbit CCD memory arrays

A 4-kbit CCD memory array has been fabricated using electron-beam lithography for the high-resolution patterns and projection lithography to define the low-resolution features. The basic CCD cell size is 3.2 µm × 4.2 µm consisting of a storage area 2.4 µm × 3.6 µm with a 0.8-µm barrier and a 0.6-µm channel stop. To make these small CCD's, as well as the associated short-channel MOSFET's, we modified the conventional MOS wafer processing. The new process for two-level polysilicon gates requires six electron-beam levels with a minimum resist feature of 0.3 µm. Alignment of the electron-beam patterns uses Ta benchmarks which we found to be compatible with MOS devices. Testing of the 4-kbit array and other shift resisters showed submicrometer channel-stops and barriers are feasible while maintaining low channel-to-channel crosstalk and charge-transfer efficiency greater than 0.9995. In addition, low capacitance output circuits defined by electron-beam lithography can detect the small number of charges in the high-resolution CCD's and amplify the signal sufficiently to recirculate the data.     

A gallium arsenide overlapping-gate charge-coupled device

We have developed a new CCD fabrication process for producing an overlapping gate structure which permits submicrometer control of the gap size while using conventional lithography. This process has been used to fabricate four-phase 16-stage Schottky barrier CCD's on GaAs with charge transfer inefficiencies of less than 2 × 10^-4at a 1-MHz clock rate, indicating that charge loss due to potential troughs between the gates has been essentially eliminated. This control of the gap permits the CCD channel to be of submicrometer thickness, which simplifies the integration of CCD's with high-speed devices requiring submicrometer channel thicknesses.     

Enhanced capacity CCD

This paper introduces a method for enhancing the charge capacity and lowering the leakage current in CCD's. The two-phase coplanar electrode structure is chosen as a vehicle for demonstrating the concept. The charge capacity enhancement is achieved by a combination of p-type and n-type implantations. This method of charge capacity enhancement relies on the increase of depletion capacitance in the storage well region of the CCD, as contrasted with other methods which increase the surface potential swing. A charge capacity analysis is undertaken and design constraints to provide maximum charge capacity are described. Results of measurements on the first test structure show 25-50-percent increase in charge capacity for buried-channel CCD's and 66-166-percent increase in charge capacity for surface-channel CCD's. A 2X-8X reduction in leakage current has been observed in these CCD's. The increased capacity and decreased leakage current should result in improved performance of CCD's in memory, signal processing, and imaging applications.     

An optical CCD convolver

Some experimental and practical considerations of performing convolution or transversal filtering with charge-coupled devices (CCD's) using optical inputs are described. The basic principle involves shining light from a signal-modulated light-emitting diode (LED) onto an optical mask which controls the amount of light reaching the various CCD electrodes. The experimental results for a 91-tap Hamming window are presented. The relative advantages of using this approach as a means of obtaining fixed tap-weight transversal filters are discussed in comparison with the split electrode CCD filter. It is shown that a compact lens free optical signal processor is possible, using standard imaging structures. Although there is a disadvantage in terms of the need for an LED and current driver, this may be outweighed in certain contexts by improvements in linearity, intermodulation, dynamic range, and the scale of processing which is possible.     

An optical CCD convolver

Some experimental and practical considerations of performing convolution or transversal filtering with charge-coupled devices (CCD's) using optical inputs are described. The basic principle involves shining light from a signal-modulated light-emitting diode (LED) onto an optical mask which controls the amount of light reaching the various CCD electrodes. The experimental results for a 91-tap Hamming window are presented. The relative advantages of using this approach as a means of obtaining fixed tap-weight transversal filters are discussed in comparison with the split electrode CCD filter. It is shown that a compact lens free optical signal processor is possible, using standard imaging structures. Although there is a disadvantage in terms of the need for an LED and current driver, this may be outweighed in certain contexts by improvements in linearity, intermodulation, dynamic range, and the scale of processing which is possible.     

Applications of CCD and switched capacitor filter technology

Since the earliest developments of charge transfer devices for signal processing functions, there has been a rapid evolution of the technology towards the capability of implementing complex signal processing functions on a single silicon substrate. Recently, switched capacitor filter technology has proven to be a complementary monolithic filter technology which is compatible with CCD's in fabrication. We review the operating principles of both filter technologies and present some recent developments in a number of signal process applications.     

Design and operation of a floating gate amplifier

A unique amplifier configuration is examined that fully exploits the intrinsically high signal-to-noise performance of charge-coupled devices (CCD's). In this amplifier, the signal charge is detected with a conducting `floating gate' embedded in the oxide between a bias electrode and the silicon substrate. The change of voltage on the floating gate produced by the signal charge in the CCD channel is then used to modulate the current flow in a metal-oxide-semiconductor (MOS) transistor. The signal charge remains isolated and can be moved downstream in the CCD channel; thus, it can be detected again by other similar structures. Computer analysis, test structure design, and experimental results of a floating gate amplifier (FGA) are presented.     

A CCD serial to parallel shift register

Charge-coupled devices have been well known for their serial-type applications. The authors report a new scheme whereby parallel outputs can be obtained from every bit of a serial CCD shift register without destroying the transferred charge and without the use of an external resetting pulse. The results of a 20-b 3/spl phi/ CCD shift register with parallel outputs are described. The work extends the applicability of CCD's to a less restricted area.     

Optimum scaling of buried-channel CCD's

The maximum charge packet size in a two-phase charge-coupled device (CCD) is limited by many constraints relating to the transfer efficiency requirement and control circuit limitations. The constraints are quantified and an optimization routine is developed for designing CCD's with maximum charge capacity per unit area under these constraints. The optimum charge capacity for scaled down CCD's is calculated and it is shown that the normal buried channel cannot be designed to have adequate charge capacity at small geometries. A novel low-voltage buried-channel structure is introduced which uses a shallow p-type surface implant to minimize surface trapping and increases the charge capacity per unit area 2.4× compared to the normal buried channel. The optimum charge packet size at ∼1-µm geometry for these CCD structures, based on these calculations, is shown to be inadequate for VLSI dynamic memory applications.     

Research on high-speed TDICCD remote sensing camera video signal processing

Video signal processing needs high signal-to-noise ratio (SNR) in high-speed time delay and integration charge coupled devices (TDICCD). To solve this problem, this article first analyzes the characteristics of the output video signal of a new type of high-speed TDICCD and its operation principle. Then it studies the correlation double sample (CDS) method of reducing noise. Following that a synthesized processing method is proposed, including correlation double sample, programmable gain control, line calibration and digital offset control, etc. Among the methods, XRD98L59 is a video signal processor for the charge coupled device (CCD). Application of this processor to one kind of high-speed TDICCD with eight output ports achieves perfect video images. The experiment result indicates that the SNR of the images reaches about 50 riB. The video signal processing for high-speed multi-channel TDICCD is implemented, which meets the required project index.     

Limitations of multilevel storage in charge-coupled devices

The feasibility of applying multilevel storage (MLS) in charge-coupled devices (CCD's) is demonstrated in this paper. The effect on the allowable number of levels of the different noise sources in the CCD, the input-signal power, the charge-handling capacity, and the effective bandwidth have been considered. Accurate noise measurements, by means of statistical correlation are presented. With eight levels of charge, three bits of data have been achieved in one storage cell with two-phase stepped-oxide double-polysilicon CCD's, and detected with an average error probability of 2 times 10^{-10}. Four bits of data in one storage cell could be achieved in similar devices with a charge-transfer inefficiency ofepsilon leq 1 times 10^{-3}with an average error probability of less than 9 times 10^{-8}.     

GaAs and related heterojunction charge-coupled devices

A Schottky-barrier gate GaAs charge-coupled device (CCD) technology is described. Experimental devices fabricated in this technology have operated with charge transfer efficiency >0.999/transfer and-have operated at clock frequencyf_{cl} = 500MHz. Implications of this technology in high-speed signal processing and in visible and near-infrared imaging are discussed.     

A novel wide dynamic range silicon photodetector and linear imaging array

A novel silicon solid-state photodetector structure utilizing the MOSFET subthreshold effect was conceived, developed, fabricated, and experimental results were obtained. This photodetector device, which can be integrated on the same chip with MOSFET circuits or CCD's, provides an analog voltage signal over a wide dynamic range. Fabricated photodetector devices and arrays showed experimentally, in the visible spectrum, an incoming radiation detection light intensity dynamic range of greater than 10⁷. In addition, the novel photodetector device was used to realize CCD and self-scanned MOSFET linear arrays. In this paper, we describe in detail the theory of the new photodetector device and its applications to form linear imaging arrays. Finally, we present experimental results obtained on developed and fabricated devices and arrays.     

A technique to measure trap characteristics in CCD's using X-rays

An important type of radiation damage in CCD's used for X-ray spectroscopy is the degradation of charge transfer efficiency (CTE). Traps associated with radiation-induced defects are the basic cause of the damage. Here, we describe a method to extract trap characteristics using small charge packets produced by individual X-ray photon interactions in rectangular imaging CCD's. The method applies the principles of trap occupancy to the framestore CCD configuration, and uses data from CCD's operating in their normal transfer mode. We have measured trap characteristics in radiation damaged CCD's in a range of operating temperatures from 170-200 K, and have found that these data compare well to the expected phosphorus-vacancy (P-V) trap characteristics     

Imaging devices using the charge-coupled concept

A unified treatment of the basic electrostatic and dynamic design of charge-coupled devices (CCD's) based on approximate analytical analysis is presented. Clocking methods and tradeoffs are discussed. Driver power dissipation and on-chip power dissipation are analyzed. Properties of noise sources due to charge input and transfer are summarized. Low-noise methods of signal extraction are discussed in detail. The state of the art for linear and area arrays is presented. Tradeoffs in area-array performance from a systems point of view and performance predictions are presented in detail. Time delay and integration (TDI) and the charge-injection device (CID) are discussed. Finally, the uses of the charge-coupled concept in infrared imaging are discussed.     

Application of charge-coupled devices to infrared detection and imaging

A review of infrared sensitive charge-coupled devices (IRCCD) is presented. Operational requirements of typical IRCCD applications are briefly introduced. IRCCD devices are divided into two major categories: a) Monolithic devices, which essentially extend the original CCD concept into the IR. Monolithic IRCCD's discussed include inversion-mode devices (with narrow bandgap semiconductor substrate), accumulation-mode devices (extrinsic wide bandgap semiconductor substrate), and Schottky-barrier devices (internal photoemission), b) Hybrid devices, in which the functions of detection and signal processing are performed in separate but integratable components by an array of IR detectors and a silicon CCD shift register unit. Hybrid IRCCD's discussed include both direct injection devices (in conjunction with photovoltaic IR detectors) and indirect injection devices (in conjunction with pyroelectric and photoconductive devices).     

Surface potential equilibration method of setting charge in charge-coupled devices

A method of setting charge in a charge-coupled device (CCD) is described whereby the input diode is suitably pulsed and an amount of charge is retained in a potential well under the first transfer electrode. It is shown that, within limits defined by the operating potentials of the device, the sizes of the generated charge packets are linearly dependent on the voltage difference between the first transfer electrode and the input gate. They are also independent of threshold voltage. The method has important applications in all CCD's where it is necessary to obtain a linear low noise charge input that is uniform from one device to another. The linearity has been demonstrated with a 64-element CCD which with a sinusoidal input shows second and third harmonics to be 40 dB down from the fundamental. Measured rms input noise was above the minimum theoretically achievable value but was still 80 dB down from the peak signal level. The electrode area was 2000 μm². For a comprehensive review on CCD's and input circuits, see [10].