Survey of material options and issues for thin film silicon solar cells

The high production cost of thick high-efficiency crystalline silicon solar cells inhibits widespread application of photovoltaic devices whereas the most developed of thin film cell technologies, that based on amorphous silicon, suffers inherent instability and low efficiency. Crystalline thin-film silicon solar cells offer the potential for a long-term solution for low cost but high-efficiency modules for most applications. This paper reviews the progress in thin-film silicon solar cell development over the last two decades, including progress in thin-film crystal growth, device fabrication, novel cell design, new material development, light trapping and both bulk and surface passivation. Quite promising results have been obtained for both large-grain (>100 μm) polycrystalline silicon material and the recently developed microcrystalline silicon materials. A novel multijunction solar cell design provides a new approach to achieving high-efficiency solar cells from very modest quality and hence low-cost material. Light trapping is essential for high performance from thin-film silicon solar cells. This can be realized by incorporating an appropriate texture on the substrate surface. Both bulk and surface passivation is also important to ensure that the photogenerated carriers can be collected effectively within the thin-film device. © 1998 John Wiley & Sons, Ltd.     

‘Wild Ideas’: Radiation-resistant silicon solar cells

Innovative cell structures for thin-film crystalline silicon solar cells should facilitate the achievement of relatively high performance from poor material quality. In particular, a design strategy based on heavily doped, multiple interleaved n- and p-type layers, in conjunction with the buried-contact solar cell approach, is presented. an example design is modelled to demonstrate the corresponding effective ‘radiation hardness’ and the ability to achieve high performance, even with poor minority carrier diffusion lengths expected at end-of-life (EOL) for a space cell. Results of modelling indicate that degradation in performance, sustained through typical space radiation damage, can be limited to approximately 5%. Using the same approach for terrestrial thin-film crystalline silicon cells fabricated from low-quality, low-cost material, eficiencies well above 16% should be feasible.     

Polycrystalline Silicon-Film™ Thin-film Solar Cells: Advanced Products

Thin-film polycrystalline silicon has the potential to achieve the cost reduction and performance improvement necessary for large-scale electricity markets. Reduced cost is achieved by capitalizing on the benefits of thin films grown on low-cost, large-area substrates. Improved efficiency is realized, in spite of reduced material quality, by incorporating enhanced optical absorption and back-surface passivation. The cornerstone of AstroPower's thin-film solar cell technology is the Silicon-Film™ process: a method for the manufacture of solar cell-quality, polycrystalline films of silicon on a variety of low-cost, supporting substrates. Three thin-film solar cell designs, based on this technology, are currently under development. This paper presents the key design features of these three products and briefly reviews the current status of the development of the key technologies that comprise the advanced thin-film solar cell products.     

Polycrystalline silicon thin-film solar cells: The future for photovoltaics?

Based on performance, material availability, consumer acceptance, life expectancy, environmental considerations and the potential for low cost, thin-film polycrystalline silicon solar cells are well placed to have a significant impact in the future. of key importance will be the achievement of performance targets, because module efficiencies of at least 15% are probably necessary in the long term for photovoltaics to have a significant impact in grid-connected applications. Strategies for achieving these performance levels with mediocre material quality and only moderate surface passivation and light trapping are presented. the challenges associated with the supporting substrate choice and layer depostion techniques and structures are discussed and the psesent practices reviewed. Important considerations include device performance, cost, throughput, device area and simplicity of fabrication and operation. Promising efficiencies in the vicinity of 15% have already been demonstrated using a number of different crystalline silicon layer-formation techniques. Novel device structures based on incorporation of narrow bandgap materials (Si/Ge alloys) or defect layers, quantum wells and the impurity photovoltaic effect are considered, with particular emphasis given to approaches that compensate for the current loss in thin-film cells. It appears increasingly likely that polycrystalline silicon thin-film solar cells will have an impact on the development of photovoltaics in the future and may in fact provide the means for the substantial cost reductions necessary for significant penetration into utility markets.     

Prerequisites to manufacturing thin-film photovoltaics

In order to compete with established crystalline silicon technologies, thin-film photovoltaics must achieve comparable performance with the promise of substantially lower cost. Low costs will only be achieved with manufacturing volumes of at least several MW_p per year. Due to the high investment required for such a factory, there are a number of prerequisites that must be demonstrated to reduce the risk of this investment. The product requirements must be clearly identified, and are likely to be dictated by the existing silicon technologies. The process must be shown to be capable of producing a high-efficiency, high-yield, stable product. Estimated manufacturing costs must be substantially lower than the costs projected for the crystalline silicon competition to justify the investment in an unproven technology. Once these prerequisites are satisfied, the increase in volume to a manufacturing scale remains a challenge due to the specialized nature of the equipment needed to perform these new processes. Nonetheless, many of these prerequisites have now been demonstrated and new thin-film manufacturing facilities are being constructed. © 1997 John Wiley & Sons, Ltd.     

Multielement self-scanned mosaic sensors

Self-scanned image sensors are making possible new types of television cameras and imaging devices based entirely upon solid-state components. Research on integrated image sensors has followed two experimental approaches: monolithic silicon and thin-film photoconductors. This article reviews the operation of the most common types of self-scanned sensors, indicating their relative advantages and disadvantages. Two new developments are a 256 × 256 element photoconductive sensor with integrated thin-film scanning decoders and a novel silicon photodiode sensor that may permit considerable reduction in element spacings.     

A common-gate CMOS inverter with n-channel amorphous silicon thin-film transistor formed on a crystalline PMOSFET

A common-gate complementary metal-oxide-semiconductor (CMOS) inverter consisting of an n-channel amorphous silicon (a-Si:H) thin-film transistor on top of 1.2 μm high Al gate of the crystalline silicon p-channel metal-oxide-semiconductor (PMOS) transistor has been achieved successfully. The success of this inverter demonstrates the feasibility of depositing 3500 Å thick amorphous silicon material on a surface with roughness in the order of 1.2 μm. It is found that growing an undoped amorphous silicon layer before the deposition of SiN_x insulator is necessary to avoid the permanent destruction of the underlying PMOS due to the stress imposed by the SiN_x. The vertical integration of crystalline silicon and amorphous silicon devices to form three-dimensional circuits is a promising technique for future applications in high density memory cell and neural network image sensors.     

The fabrication and characterization of EEPROM arrays on glassusing a low-temperature poly-Si TFT process

The fabrication and optimization of poly-Si thin-film transistors and memory devices on glass substrates at temperatures of 200°C-400°C is described, and the device characteristics and stability are discussed. The devices were formed using PECVD amorphous silicon, silicon dioxide, and silicon nitride films, and the crystallization of the amorphous silicon was achieved with an excimer laser. The performance of 16×16 EEPROM arrays with integrated drive circuits formed using this technology is presented     

Ion implanted contacts to a-Si:H thin-film transistors

Fabrication steps to improve ion implanted source-drain contacts to hydrogenated amorphous silicon (a-Si:H) thin-film transistors (TFT's) have been determined. After establishing a contact performance baseline using devices made with Al/intrinsic a-Si:H contacts, improvements were made to the metal/a-Si:H contact scheme using unheated and heated implants, single- and double-level phosphorous implants, a buffered HF acid dip just prior to metal deposition, Al and Al-Si-Cu metallization schemes, and a post-metallization anneal.     

特制多孔硅的较低的反射率和较高的少数载流子寿命

Solar cell grade crystalline silicon with very low reflectivity has been obtained by electrochemically selective erosion.The porous silicon（PS） structure with a mixture of nano-and micro-crystals shows good antireflection properties on the surface layer, which has potential for application in commercial silicon photovoltaic devices after optimization.The morphology and reflectivity of the PS layers are easily modulated by controlling the electrochemical formation conditions（i.e., the current density and the anodization time）.It has been shown that much a lower reflectivity of approximately 1.42% in the range 380-1100 nm is realized by using optimized conditions.In addition, the minority carrier lifetime of the PS after removing the phosphorus silicon layer is measured to be ～3.19 μs.These values are very close to the reflectivity and the minority carrier lifetime of Si3N4 as a passivation layer on a bulk silicon-based solar cell（0.33% and 3.03 μs, respectively）.     

Low-temperature materials and thin-film transistors for electronics on flexible substrates

The deposition processes and electronic properties of thin-film semiconductors and insulators based on silicon in relation to the fabrication of electronic devices on flexible plastic substrates are considered. The films of amorphous hydrogenated silicon (a-Si:H), nanocrystalline silicon (nc-Si), and amorphous silicon nitride (a-SiN_x), and also thin-film transistors are fabricated at comparatively low temperatures (120°C, 75°C) using existing commercial plasma-chemical equipment. The parameters of thin-film transistors based on a-Si:H and fabricated at the aforementioned relatively low temperatures are compatible with those of high-temperature analogues.     

Laser‐fired contact for n‐type crystalline Si solar cells

Laser‐fired contacts to n‐type crystalline silicon were developed by investigating novel metal stacks containing Antimony (Sb). Lasing conditions and the structure of metals stacks were optimized for lowest contact resistance and minimum surface damage. Specific contact resistance for firing different metal stacks through either silicon nitride or p‐type amorphous silicon was determined using two different models and test structures. Specific contact resistance values of 2–7 mΩcm² have been achieved. Recombination loss due to laser damage was consistent with an extracted local surface recombination velocity of ~20 000 cm/s, which is similar to values for laser‐fired base contact for p‐type crystalline silicon. Interdigitated back contact silicon heterojunction cells were fabricated with laser‐fired base contact and proof‐of‐concept efficiencies of 16.9% were achieved. This localized base contact technique will enable low cost back contact patterning and innovative designs for n‐type crystalline solar cell. Copyright © 2014 John Wiley & Sons, Ltd.     

Thin active layer a-Si:H thin-film transistors

We show that hydrogenated amorphous silicon thin-film transistors (TFT's) with active layer thickness less than 50 nm have improved performance for display applications. Using two-dimensional (2-D) modeling, we find previously observed degradation for thin active layers is due to electric field effects in the contact regions of staggered inverted devices and affects only the saturation characteristics; linear region performance actually improves with decreasing thickness. We have fabricated devices with extremely thin active layer (10 nm), and indeed find excellent linear region characteristics. In addition, direct tunneling across the undoped regions at device contacts reduces electric field effects, resulting in excellent saturation region characteristics, and gate-induced channel accumulation reduces the Schottky barrier width at direct metal contacts so that even devices without doped contact regions (i.e., tunneling contacts) are possible     

TCOs for nip thin film silicon solar cells

Substrate configuration allows for the deposition of thin film silicon (Si) solar cells on non‐transparent substrates such as plastic sheets or metallic foils. In this work, we develop processes compatible with low T_g plastics. The amorphous Si (a‐Si:H) and microcrystalline Si (µc‐Si:H) films are deposited by plasma enhanced chemical vapour deposition, at very high excitation frequencies (VHF‐PECVD). We investigate the optical behaviour of single and triple junction devices prepared with different back and front contacts. The back contact consists either of a 2D periodic grid with moderate slope, or of low pressure CVD (LP‐CVD) ZnO with random pyramids of various sizes. The front contacts are either a 70 nm thick, nominally flat ITO or a rough 2 µm thick LP‐CVD ZnO. We observe that, for a‐Si:H, the cell performance depends critically on the combination of thin flat or thick rough front TCOs and the back contact. Indeed, for a‐Si:H, a thick LP‐CVD ZnO front contact provides more light trapping on the 2D periodic substrate. Then, we investigate the influence of the thick and thin TCOs in conjunction with thick absorbers (µc‐Si:H). Because of the different nature of the optical systems (thick against thin absorber layer), the antireflection effect of ITO becomes more effective and the structure with the flat TCO provides as much light trapping as the rough LP‐CVD ZnO. Finally, the conformality of the layers is investigated and guidelines are given to understand the effectiveness of the light trapping in devices deposited on periodic gratings. Copyright © 2008 John Wiley & Sons, Ltd.     

Laser-recrystallized silicon thin-film transistors on expansion-matched 800°C glass

Laser-recrystallized silicon thin-film transistors (TFT's) have been fabricated, for the first time, on a novel, potentially low-cost glass substrate, The 0.5-µm-thick silicon films were deposited along with appropiate dielectric layers on Corning Code 1729 glass substrates and recrystallized using an argon ion laser. The n-channel enhancement-mode transistors were made using conventional IC device fabrication procedures modified to have a maximum processing temperature of 800°C. Transistor's made in the recrystallized silicon show field-effect electron mobilities as high as 270 cm²/V.s, approximately 15 times that of comparable devices made in as-deposited polycrystalline-silicon films. The recrystallized silicon devices also exhibit lower threshold voltages and lower leakage currents than do comparable polycrystalline-silicon devices.     

Substrates,contacts and monolithic integration

Substrates and contacts play a critical role in thin-film solar cell device and module performance. They influence light trapping, film growth, impurity levels, doping, stability, yield and laser scribing for monolithic integration. The substrate is also a major cost factor, often accounting for the largest component of the module cost. The interaction between the substrates or contacts with the semiconductor layers can also limit the range of the subsequent semiconductor layer processing parameters. The panel and audience discussed these factors in relation to fabrication, performance and characterization of today's thin-film solar cells and modules. © 1997 John Wiley & Sons, Ltd.     

Amorphous silicon thin-film transistors on compliant polyimide foilsubstrates

Much of the mechanical strain in semiconductor devices can be relieved when they are made on compliant substrates. We demonstrate this strain relief with amorphous silicon thin-film transistors made on 25-μm thick polyimide foil, which can be bent to radii of curvature R down to 0.5 mm without substantial change in electrical characteristics     

Bulk silicon technology for complementary MESFETs

A technology for fabrication of complementary silicon MESFETs on bulk silicon substrates has been developed. The technology is similar to CMOS technology, and utilises n-silicon substrates. P-wells are used for the n-channel devices. Device isolation was achieved by trench etching. The silicides of Er and Pt were used as gate Schottky contacts. P- and n-channel characteristics are presented together with subthreshold behaviour and preliminary results regarding radiation hardness. Also, results from two-dimensional simulations of the devices are presented.<>     

Polycrystalline silicon-film™ solar cells: Present and future

Future crystalline silicon solar cells will have increased performance and reduced cost. Increased performance will come from thin silicon with light trapping, provided that it includes back-surface passivation. Cost reduction will come from the growth of this thin silicon light-trapping structure on a low-cost substrate. the silicon will be polycrystalline. Solar cells formed with thin (< 50 μm) silicon active layers can produce higher conversion efficiencies at reduced material requirements than conventional ingot-based silicon devices. This paper presents the essential features of high-performance device design based on thin silicon layers, the design features of the Silicon-Film^−TM technology, the sequence of products that emerge from its development and recent results from the first commercial-scale, large-area (225 cm⁻²) Silicon-Film^−TM solar cell product.