APFC Boost电路中电压环动态稳定性研究

在APFCBoost电路中,当需要高电压输出时,电压误差放大器易饱和输出致电压环失效,使基准电流幅值达到最大,进而使电感电流无法继续增加,最终输出电压小于设定值。针对该问题,文中提出根据电压环方程式得出的电压环动态稳定性判据来检验设计参数是否能使电压环动态稳定工作,进而使输出电压达到设定值。     

A Simple Method to Improve the Dynamic Response of Single-Phase PWM Rectifiers

A single-phase boost rectifier system with conventional low-bandwidth voltage loop exhibits poor dynamic response. A simple method is presented to improve the dynamic response of the rectifier without affecting its steady-state performance. A fast voltage controller is used to improve the dynamic response of the rectifier. The increased low-frequency ripple at the output of the voltage controller is filtered out using a new filter. Design methodology for the voltage loop is presented. The filter is simple enough for analog and digital implementations. Low input current distortion, fast voltage-loop response, and improved dynamic response against line and load disturbances are demonstrated experimentally on a 300-W digitally controlled boost rectifier operating at a switching frequency of 100 kHz.      

Dead-zone digital controllers for improved dynamic response of low harmonic rectifiers

This paper introduces a simple digital control method that enables fast regulation of the output voltage in low harmonic rectifiers with power factor correction (PFC). The method is based on the use of an insensitive region, i.e., "dead-zone," in analog-to-digital conversion, for elimination of the output capacitor voltage ripple in the feedback loop. The dead-zone can either be fixed and larger than the maximum ripple magnitude, or it can be dynamically adjusted in accordance with the output load. Simple implementations of these two dead-zone controllers are shown on an experimental completely digitally controlled 250-W boost PFC operating at 200-kHz switching frequency. The experimental results show that this control method results in low current harmonics and improved load transient responses, which are significantly faster than in low-harmonic rectifiers with conventional low-bandwidth voltage-loop controllers.     

单级功率因数校正DCM组合变换器的稳定性

本文论述在闭环反馈控制下,输入环节工作在不连续导电模式（ＤＣＭ）时单级功率因数校正（ＰＦＣ）组合变器的稳定性,讨论通过脉冲宽度调节使变换器的电压能够维持在期望的电压范围之内的条件,以及条件的输入电压主动态范围和负载变化范围,并采用上述方法对一个ＰＦＣ ＤＣＭ ｂｏｏｓｔ－ｂｕｃｋ变换器进行了理论分析与实验研究,实验结果结果表明理论分析的正确性。     

A Unity Power Factor Correction Preregulator With Fast Dynamic Response Based on a Low-Cost Microcontroller

Low cost passive power factor correction (PFC) and single-stage PFC converters cannot draw a sinusoidal input current and are only suitable solutions to supply low power levels. PFC preregulators based on the use of a multiplier solve such drawbacks, but a second stage dc-dc converter is needed to obtain fast output voltage dynamics. The output voltage response of PFC preregulators can be improved by increasing the corner frequency of the output voltage feedback loop. The main drawback to obtaining a faster converter output response is the distortion of the input current. This paper describes a simple control strategy to obtain a sinusoidal input current. Based on the static analysis of output voltage ripple, a modified sinusoidal reference is created using a low cost microcontroller in order to obtain an input sinusoidal current. This reference replaces the traditional rectified sinusoidal input voltage reference in PFC preregulators with multiplier control. Using this circuitry, PFC preregulator topologies with galvanic isolation are suitable solutions to design a power supply with fast output voltage response (10 or 8.33 ms) and low line current distortion. Finally, theoretical and simulated results are validated using a 500 W prototype.     

Voltage loop of boost PWM DC-DC converters with peak current-mode control

A new transfer function from control voltage to duty cycle, the closed-current loop, which captures the natural sampling effect is used to design a controller for the voltage-loop of a pulsewidth modulated (PWM) dc-dc converter operating in continuous-conduction mode (CCM) with peak current-mode control (PCM). This paper derives the voltage loop gain and the closed-loop transfer function from reference voltage to output voltage. The closed-loop transfer function from the input voltage to the output voltage, or the closed-loop audio-susceptibility is derived. The closed-loop transfer function from output current to output voltage, or the closed loop output impedance is also derived. The derivation is performed using an averaged small-signal model of the example boost converter for CCM. Experimental verification is presented. The theoretical and experimental results were in good agreement, confirming the validity of the transfer functions derived.     

Three-step impedance criterion for small-signal stability analysis in two-stage DC distributed power systems

Small-signal stability analysis methods based on an impedance criterion originate from the minor loop gain method and are gradually utilized in two-stage DC distributed power systems. In this paper, we conclude that the impedance criterion directly dependent on output impedance Z/sub o/(s) of the source subsystem and input impedance Z/sub i/(s) of the load subsystem is possible but gives an incorrect stability analysis for systems with a regulated source subsystem. Through introducing a mapped pure impedance of the load subsystems and the preliminary system, we develop a general three-step impedance criterion, with which a correct small-signal stability analysis can be guaranteed, regardless of the type of source subsystem. Furthermore, we introduce the application of the three-step impedance criterion in two small-signal stability analysis cases and utilize it in an example system to predict the stability shift process arising from the variation on the load resistance and input voltage value.     

交流电气化铁路牵引网电压跌落补偿技术的研究

电能在生产、变换、传输和分配的过程中,电力网都要产生功率损失,从而消耗一定的电能。供电部门在对企业实施现代化管理时,对网损的管理必然是主体内容,其目的是逐步降损,提高电力网运行质量。本文主要从电力网的网损构成与降损途径两方面进行详细的分析,为电网管理部门做好降损节能工作打下基础。     

A New Duty Cycle Control Strategy for Power Factor Correction and FPGA Implementation

The bottleneck of digital control for power factor correction (PFC) implementations is mainly due to three aspects: high calculation requirements, high cost, and limited switching frequency compared with analog implementations. A new duty cycle control strategy for boost PFC implementations is proposed in this paper. The duty cycle is determined based on the input voltage, reference output voltage, inductor current, and reference current. The duty cycle determination algorithm includes two terms, the current term and the voltage term, which can be calculated in parallel and requires only one multiplication and three additions (subtractions) operations in digital implementation. A 400-kHz switching frequency boost PFC based on field programmable gate array implementation and its test results show that the proposed new duty cycle control strategy has great potential in the next generation of high switching frequency PFC implementations, due to its lower calculation requirement, lower cost, and better performance than the conventional PFC control methods     

基于极点配置的三相电压型逆变器控制策略研究

针对三相电压型逆变器采用电压环PI控制存在的不足,应用含电流环的双环控制,提出了应用极点配置法设计系统参数的方法。通过建立同步旋转坐标系下三相电压型逆变器的数学模型,得出传递函数,并进行极点配置来设计双环控制系统参数,在PSCAD/EMTDC中仿真验证。结果表明该控制方案和参数设计方法动态响应速度快,在非线性负载情况下具有较好的控制特性。     

光伏并网逆变器的仿真研究

为了提高光伏发电效率和电能质量,对光伏并网逆变器进行了相关研究,针对光伏最大功率点跟踪问题,对传统的电导增量法进行融合和改进．提出一种改进的电导增量控制算法。该控制算法能够快速精准地跟踪最大功率点;有效改善系统在最大功率点附近的震荡现象;提高了光伏电池的发电效率。在逆变控制方面,采用电压外环、电流内环的双PI环控制,电压外环实现中间直流母线电压的稳定控制。电流内环用于控制输出电流的稳定,两者通过中间直流母线耦合,匹配简单,系统控制具有较好的快速性和稳定性;减少了谐波含量,输出电流具有良好的正弦度,且与电网电压同频同相．因而提高了电能质量。最后用matlab对光伏并网逆变器进行建模仿真,实验结果表明该系统工作稳定．性能良好。达到了预定的设计效果。     

一种负载为7nF片上电容的低压差线性稳压器

详细分析并实现一种改进的片上全集成低压差线性稳压器(LDO),其负载电容为7nF片上电容,且在0～50 mA电流负载范围下具有很好的稳定性.电路通过电压负反馈环控制降低输出等效负载电阻,并且采用了自适应极点调节方法以确保环路的稳定性.通过快通环路和高增益环路的混合控制,既能保证高的低频增益,又能满足快速响应的要求.该L...     

A Control Circuit With Load-Current Injection for Single-Phase Power-Factor-Correction Rectifiers

A load-current-injection control technique for boost-derived power-factor-correction (PFC) rectifiers with average current-mode control is proposed in this paper. By adding a load-current loop to the conventional inductor current loop, the output voltage response to load steps is speeded up, almost eliminating the typical voltage overshoots of this kind of converters. Although the techniques based on the load-current injection are traditionally called "load feedforward," this paper shows that an additional feedback loop, which modifies the linear small-signal model of the converter, is also introduced. In order to validate the concept, a converter prototype working from a universal input line has been designed and tested, showing that a very fast dynamic response of PFC rectifiers may be achieved in a cost-effective way     

一种新型的基于航空电网的高功率因数校正器

研究了一种基于航空电网的高功率因数Boost PFC变换器,与以往采用的乘法器控制方法不同的是,该变换器采用新型单周期控制方法。文中分析了该变换器的工作原理,给出了系统电压环的结构模型和设计过程。仿真和实验结果证明了在输入电源频率较高场合,单周期控制Boost PFC变换器具有良好的性能。     

Power-mode-controlled power-factor corrector for electronic ballast

Medium- to high-power electronic ballasts are designed with two power conversion stages. The power-factor corrector (PFC) stabilizes the voltage supplied to the second stage and forces the utility current to meet the required standard. The inverter section stabilizes the arc in the lamp, and keeps the lamp power under the specified values. This paper proposes that the PFC section is to provide the power stability of the system while the inverter section operates in open loop. Consequences of this solution are: the power variation in the lamp caused by its aging is prevented, the complex dynamic of the lamp has no influence in the design, some extra voltage is available to achieve the lamp ignition, warmup time is reduced, and dimming control is easily implemented by modifying either the power reference or the bias value in the PFC control circuit. The inverter section is a half-bridge LC/sub p/C/sub s/ resonant inverter designed to require minimum variation of the input voltage to supply constant power to the lamp. In this way the operation point suffers little changes and no overdimensioning of the PFC and inverter components is necessary to meet the power source condition.     

Microprocessor based robust digital control for UPS withthree-phase PWM inverter

This paper describes a novel method of robust (insensitive to system parameter variations and load current changes) and fast digital control for an uninterruptible power supply (UPS) with a three-phase PWM inverter. The purpose of this paper is to propose a method by which characteristics better than those by conventional methods are obtained using an algorithm simpler than that of conventional methods. The experiments show that the purpose is achieved and the proposed method offers a total harmonic distortion of 0.6% of the output voltage waveform at a full nonlinear load. The analysis shows that the stability of the method is sufficient. Three features of the method are: (a) a capacitor current observer for stabilization and a disturbance observer for robustness are used to compensate the time lag by the computation and the disturbances, in a minor loop of the capacitor current through an inductor-capacitor filter of the inverter; (b) new models of the inverter and the disturbances are established to simplify these observers; and (c) the output voltage control loop can be designed easily and exactly because the minor loop realizes a rapid and robust control of the current     

A parallel-connected single phase power factor correction approach with improved efficiency

In this paper, a new parallel-connected single phase power factor correction (PFC) topology using two flyback converters is proposed to improve the output voltage regulation with simultaneous input power factor correction and control. This approach offers lower cost and higher efficiency by parallel processing of the total power. Flyback converter-I primarily regulates output voltage with fast dynamic response and processes 55% of the power. Flyback converter-II with ac/dc PFC stage regulates input current shaping and PFC, and processes the remaining 45% of the power. This paper presents a design example and circuit analysis for 200 W power supply. A parallel-connected interleaved structure offers smaller passive components, less losses even in continuous conduction inductor current mode, and reduced volt-ampere rating of dc/dc stage converter. TI-DSP, TMS320LF2407, is used for implementation. Simulation and experimental results show the performance improvement.     

Asymmetrical Oscillations in Digitally Controlled Power-Factor-Correction Boost Converters

Digitally controlled power-factor-correction (PFC) converters are essentially piecewise-smooth nonlinear systems due to their switching action. However, their complex behavior almost remains unexplored. Unlike analog control, digital control introduces a time delay due to the sample-and-hold and the digital computation. Here, a small-signal model that takes the time delay into account is derived to judge the stability of a digitally controlled PFC boost converter. It is proven that the time delay seriously degrades the converter's stability. After the inner current loop and/or the outer voltage loop lose stability, we experimentally discover that oscillations begin to occur, and the oscillations are asymmetrical. Such an asymmetry can be interpreted by the underdevelopment characteristic of the dynamical behavior in the digitally controlled PFC boost converter. The results reported in this brief offer more knowledge about the dynamical behavior in digitally controlled PFC converters.      

Analysis and interpretation of loop gains of multiloop-controlledswitching regulators [power supply circuits]

Two different loop gains of power supplies with current-mode control are considered. Relationships between the different loop gains of the multiloop system and the closed-loop measures of output impedance and audio susceptibility are derived. It is shown that different loop gains can be used to obtain information about relative stability and to enhance a poor design. Different implementations of current-mode control are discussed, and the most common problem encountered in practical circuit applications is shown. This problem is connected with the fact that, for high-power applications, the DC portion of the waveform is much larger than the ramp     

Power factor correction converter using delay control

A low cost universal input voltage single-controller power factor correction converter for a 200 W power supply is proposed. It consists of the PFC part followed by a DC-DC converter as in a conventional two-stage scheme. However a single PWM controller is used as in a single-stage PFC scheme. The switch in the PFC part is synchronized with the switch in the DC-DC converter and has a fixed frequency. Employing an adaptive delay scheme, the PPC switch is controlled to limit the capacitor voltage within a desired range for optimum efficiency and to reduce input current harmonic distortion. The design procedures of the delay scheme, the feedback loop, and experimented results are presented to verify the performance