共查询到19条相似文献,搜索用时 62 毫秒
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本文介绍了一种用于32位超标量RISC微处理器(SM603e)内部时钟产生器的锁相环电路。该锁相环的锁定时间低于15us,功耗小于10mW。文中主要讨论了鉴频鉴相器、电荷泵、滤波器以及压控振荡器的电路实现方案并且给出了部分仿真波形。锁相环支持内外时钟频率比是:1、1.5、2、2.5、3、3.5、4,而且支持多种静态功耗管理下的掉电功能。 相似文献
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方佩敏 《电子制作.电脑维护与应用》2004,(2):44-45
由功率MOSFET组成的开关可用逻辑电平控制其导通及关断,具有驱动简单、电流大、开关损耗小、开关频率高等特点。功率开关有单向及双向结构,可驱动电阻性及感性负载,如直流电机、电磁阀及超声波换能器等。 相似文献
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提出了一种中小功率开关电源设计,该电源是用555定时器等组成的脉宽调整电路构成稳压源。主要介绍了开关电源的主要组成部分的原理图及设计、555定时器及有其组成的脉宽调整电路和功率MOSFET管。此电源电路结构简单,功耗小,控制线性好,稳压范围宽,能实现较好的控制,输出电压在(3~20)V连续可调,电流0~5A。 相似文献
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设计了一种高性能电荷泵电压转换器.该电压转换器能够将3V-18V电压转换为相应的负压,主要采用了MOSFET开关结构和具有参考电压的振荡电路.该转换器电路输出电压效率在工作温度范围内能达到99%以上.电源电流在15V时小于700μA.输出电流大. 相似文献
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本文设计了一款用于零延迟时钟缓冲器的PLL,采用一种结构简单并且实现低失配的电荷泵,详细阐述了对噪声有很强抑制作用的一种差分结构的压控振荡器,采用CSMC 0.5μm N阱CMOS工艺,在3.3V电源电压下,该PLL的工作频率范围为10MHz-140MHz,周对周抖动为45ps@50MHz,功耗为4.8mW,芯片面积为1.2μm×1.7μm. 相似文献
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一种基于高频时钟产生电路的DLL的研究 总被引:1,自引:0,他引:1
本文给出了一种采用自偏置技术的低抖动延迟锁相环,可应用于高频时钟产生电路。分析了环路带宽和工作频率的关系,并给出了各模块具体的电路设计。在0。351μm标准CMOS工艺、3.3V工作电压下进行了模拟仿真,在100MHz的参考输入频率下,DLL锁定时间为1μs,VCDL输出的相位抖动为171μs,倍频器输出的相位抖动为901μs。 相似文献
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High-efficiency design of a mixed-flow pump has been carried out based on numerical analysis of a three-dimensional viscous flow.For analysis,the Reynolds-averaged Navier-Stokes equations with a shear stress transport turbulence model were discretized by finite-volume approximations.Structured grid system was constructed in the computational domain,which has O-type grids near the blade surfaces and H/J-type grids in other regions.The numerical results were validated with experimental data for the heads and ... 相似文献
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由于IR2110内部不能产生负电压,因此在采用零电压关断IGBT时容易产生毛刺干扰,对此研究了IGBT体寄生二极管反向恢复过程,并结合IGBT的输入阻抗米勒效应,分析出IR2110零电压关断毛刺干扰产生原因,最后对IR2110典型零电压关断电路进行改进,设计一种带负充电泵的IR2110关断电路.经实验验证,该电路可有效解决IR2110的零电压关断毛刺干扰问题,保证逆变器的工作稳定性. 相似文献
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This article presents a simulation method for the design of a digitally controlled oscillator (DCO). Electromagnetic (EM) simulations are essential and inevitable for modern LC oscillator design. Although EM‐simulators provide high accuracy, the EM‐simulation time is very long when metal‐oxide‐metal (MoM) capacitors are present. The proposed frame‐based EM‐simulation can significantly reduce the EM‐simulation time even in the presence of MoM capacitors without influencing the accuracy. To verify the proposed method, a DCO was fabricated using a 55‐nm CMOS process. Measurements of the DCO are in good agreement with the frame‐based post‐layout simulation results. In addition, the DCO has good performances with a low power consumption of approximately 0.68 mW. 相似文献
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A. Kwiatkowski H. Werner J.P. Blath A. Ali M. Schultalbers 《Control Engineering Practice》2009,17(11):1307-1317
This paper presents the design and experimental test of a fixed-structure LPV controller for the charge control of a spark-ignition engine. A nonlinear model of the plant is transformed into an affine LPV model in the form of an LFT representation. Using a hybrid evolutionary-algebraic synthesis approach that combines LMI techniques based on K-S iteration with evolutionary search, a scheduled PID controller is designed. To reduce conservatism, the technique of quadratic separators is used in the analysis step. To improve tracking behavior, the gain scheduled feedback controller is supported by an LTI feedforward controller. The controller has been implemented on a standard electronic control unit, and experimental results on a test car illustrate that it meets the performance requirements in a wide range of operation. 相似文献