Ni，Ti/4H-SiC肖特基势垒二极管

采用本实验室生长的4H-SiC外延片,分别用高真空电子束蒸Ni和Ti做肖特基接触金属,Ni合金作欧姆接触,SiO_2绝缘环隔离减小高压电场集边效应等技术,制作出4H-SiC肖特基势垒二极管(SBD)。该器件在室温下反向击穿电压大于600 V,对应的漏电流为2.00×10~(-6)A。对实验结果分析显示,采用Ni和Ti作肖特基势垒的器件的理想因子分别为1.18和1.52,肖特基势垒高度为1.54 eV和1.00 eV。实验表明,该器件具有较好的正向整流特性。     

Effect of rapid thermal annealing on the current-voltage characteristics of 4H-SiC Schottky diodes

The effect of rapid thermal annealing (temperature 600–800°C; duration 2 min) on the forward current-voltage characteristics of 4H-SiC Schottky diodes is studied. Tungsten, nickel, chromium, and molybdenum deposited by electron-beam sputtering in vacuum are used as the Schottky-contact metals. Dissimilar types of influence exerted by the thermal treatment on the barrier height and scatter of the contact parameters, which characterize the degree of their uniformity, are found for different metals.     

Comparison of current-voltage characteristics of n- and p-type 6H-SiC Schottky diodes

Current-voltage (I–V) characteristics of n- and p-type 6H−SiC Schottky diodes are compared in a temperature range of room temperature to 400°C. While the room temperature I–V characteristics of the n-type Schottky diode after turn-on is more or less linear up to ∼100 A/cm², the I–V characteristics of the p-type Schottky diode shows a non-linear behavior even after turn-on, indicating a variation in the on-state resistance with increase in forward current. For the first time it is shown that at high current densities (>125 A/cm²) the forward voltage drop across p-type Schottky diodes is lower than that across n-type Schottky diodes on 6H−SiC. High temperature measurements indicate that while the on-state resistance of n-type Schottky diodes increases with increase in temperature, the on-state resistance of p-type Schottky diodes decreases with increase in temperature up to ∼330 K.     

Ti/4H-SiC SBD中子辐照效应的研究

采用1 MeV的中子对Ti/4H-SiC肖特基势垒二极管(SBD)的辐照效应进行研究,观察了常温下的退火效应.实验的最高中子剂量为1×1015 n/cm2,对应的γ射线累积总剂量为33 kGy (Si).经过1×1014 n/cm2的辐照后,Ti/SiC肖特基接触没有明显退化;剂量达到2.5×1014 n/cm2后,观察到势垒高度下降;剂量达到1×1015 n/cm2后,势垒高度从1.00 eV下降为0.93eV;经过常温下19 h的退火后,势垒高度有所恢复,表明肖特基接触的辐照损伤主要是由电离效应造成的.辐照后,器件的理想因子较辐照前有所上升;器件的正向电流(VF=2V)随着辐照剂量的上升而下降.     

Au/4H-SiC肖特基UV光电二极管的温度特性

采用微电子平面工艺,高真空电子束蒸发金属Au做肖特基接触,多层金属Ni、Ti、Ag合金在背底上做欧姆接触,制作出Au/n-4H-SiC肖特基势垒紫外光电二极管(UV-SBD).测试并分析了在不同温度下该器件的I-V特性及光谱响应特性.实验表明:器件高温下有较低的反向漏电流,正向开启电压下降速度为-1.2 mV/℃;波长响应范围为200～400 nm,在23℃和260℃时,光谱响应峰值分别出现在320 nm和330 nm,每100℃波长红移约4 nm;响应灵敏度随温度升高而降低,平均每100℃降低2倍.     

Power law reverse current-voltage characteristic in Schottky barriers

A power law relationship between the reverse current and reverse voltage is computed theoretically using a model involving an exponential distribution of interface states. The model correlates Schottky barrier data on large bandgap semiconductors such as ZnO and GaP where the reverse current is proportional to the sixth power of the reverse voltage.     

The effects of the temperature and annealing on current-voltage characteristics of Ni/n-type 6H-SiC Schottky diode

The temperature dependence of current-voltage (I-V) characteristics of as-fabricated and annealed Ni/n-type 6H-SiC Schottky diode has been investigated in the temperature range of 100-500 K. The forward I-V characteristics have been analysed on the basis of standard thermionic emission theory. It has been shown that the ideality factor (n) decreases while the barrier height (Φ_b) increases with increasing temperature. The values of Φ_b and n are obtained between 0.65-1.25 eV and 1.70-1.16 for as-fabricated and 0.74-1.70 eV and 1.84-1.19 for annealed diode in the temperature range of 100-500 K, respectively. The I-V characteristics of the diode showed an increase in the Schottky barrier height, along with a reduction of the device leakage current by annealing the diode at 973 K for 2 min.     

退火温度对Au/Ti/4H-SiC肖特基接触特性的影响

采用电子束蒸发法在4H-SiC表面制备了Ti/Au肖特基电极,研究了退火温度对Au/Ti/4H-SiC肖特基接触电学特性的影响.对比分析了不同退火温度下样品的电流密度-电压(J-V)和电容-电压(C-V)特性曲线,实验结果表明退火温度为500℃时Au/Ti/4H-SiC肖特基势垒高度最大,在.J-V测试和C-V测试中分别达到0.933 eV和1.447 eV,且获得理想因子最小值为1.053,反向泄漏电流密度也实现了最小值1.97×10-8 A/cm2,击穿电压达到最大值660 V.对退火温度为500℃的Au/Ti/4H-SiC样品进行J-V变温测试.测试结果表明,随着测试温度的升高,肖特基势垒高度不断升高而理想因子不断减小,说明肖特基接触界面仍然存在缺陷或者横向不均匀性,高温下的测试进一步证明肖特基接触界面还有很大的改善空间.     

Thermally annealed gamma irradiated Ni/4H-SiC Schottky barrier diode characteristics

Thermal annealing effects on gamma irradiated Ni/4H-SiC Schottky barrier diode (SBD) characteristics are analyzed over a wide range of temperatures (400–1100 °C). The annealing induced variations in the concentration of deep level traps in the SBDs are identified by thermally stimulated capacitance (TSCAP). A little decrease in the trap density at E_C – 0.63 eV and E_C – 1.13 eV is observed up to the annealing temperature of 600 °C. Whereas, a gamma induced trap at E_C – 0.89 eV disappeared after annealing at 500 °C, revealing that its concentration (< 10¹³ cm⁻³) is reduced below the detection limit of the TSCAP technique. The electrical characteristics of irradiated SBDs are considerably changed at each annealing temperature. To understand the anomalous variations in the post-annealing characteristics, the interface state density distribution in the annealed SBDs is extracted. The electrical properties are improved at 400 °C due to the reduction in the interface trap density. However, from 500 °C, the electrical parameters are found to degrade with the annealing temperature because of the increase in the interface trap density. From the results, it is noted that the rectifying nature of the SBDs vanishes at or above 800 °C.     

Temperature-dependent current-voltage characteristics of Cr/n-GaAs Schottky diodes

The Cr/n-GaAs/In Schottky contacts have been formed using dc magnetron sputtering. The current-voltage (I-V) characteristics of the device have been measured by steps of 20 K in the temperature range of 60-320 K. The ideality factor n of the device has remained about unchanged between 1.04 and 1.10 and Schottky barrier height around 0.58-0.60 eV from 320 K down to 160 K. It can be said that the experimental I-V data are almost independent of temperature above 160 K. After 160 K, the n value increased with a decrease in temperature and become 1.99 at 60 K. The I-V characteristics at high temperatures have been exactly explained by the standard TE model. The nature and origin of abnormal behaviors at low temperatures have been successfully explained by the current flow through the low SBH circular patches suggested by Tung and used by some studies in literature. It has been seen that the straight line of the nT vs. T plot with a T₀ value of 14 K was parallel to that of the ideal Schottky contact. Again, a lateral homogeneous BH value of 0.62 eV was calculated from the linear relationship between the ideality factor and barrier height values. It has been seen that he ?(T = 0) and BH temperature coefficient α values obtained from the flat band BH and the Norde’s model plots are in close agreement with each other.     

A new 4H-SiC lateral merged double Schottky (LMDS) rectifier withexcellent forward and reverse characteristics

The novel characteristics of a new Schottky rectifier structure, known as the lateral merged double Schottky (LMDS) rectifier, on 4H-SiC are explored theoretically and compared with those of the compatible conventional 4H-SiC Schottky rectifiers. The anode of the proposed lateral device utilizes the trenches filled with a high barrier Schottky (HBS) metal to pinch off a low barrier Schottky (LBS) contact during reverse bids. Numerical simulation of any such SiC structure is complicated by the fact that the thermionic emission theory predicts the reverse leakage current to be orders of magnitude smaller than the measured data. We, therefore, first propose a simple empirical model for barrier height lowering to accurately estimate the reverse leakage current in a SiC Schottky contact. The accuracy of the empirical model is verified by comparing the simulated reverse leakage current with the reported experimental results on different SiC Schottky structures. Using the proposed empirical model, the two-dimensional (2-D) numerical simulations reveal that the new LMDS rectifier demonstrates about three orders of magnitude reduction in the reverse leakage current and two times higher reverse breakdown voltage when compared to the conventional lateral low barrier Schottky (LLBS) rectifier while keeping the forward voltage drop comparable to that of the conventional LLBS rectifier     

4H-SiC结型势垒肖特基二极管的制作与特性研究

本文设计制作了两种具有不同结构参数的4H-SiC结型势垒肖特基二极管,在制作过程中采用了两种制作方法：一种是对正电极上的P型欧姆接触进行单独制作,然后制作肖特基接触的工艺过程;另一种是通用的通过一次肖特基接触制作就完成正电极制作的工艺过程。器件制作完成后,通过测试结果比较了采用场限环作为边界终端与未采用边界终端的器件的反向特性,结果显示采用场限环有效地提高了该器件的击穿电压,减小了其反向电流。另外,测试结果还显示采用独立制作P型欧姆接触的工艺过程有效提高了4H-SiC结型势垒肖特基二极管的反向特性,其中P型欧姆接触的制作过程和结果也在本文中做出了详细叙述。     

Fabrication and characteristics of a 4H-SiC junction barrier Schottky diode

4H-SiC junction barrier Schottky(JBS)diodes with four kinds of design have been fabricated and characterized using two different processes in which one is fabricated by making the P-type ohmic contact of the anode independently,and the other is processed by depositing a Schottky metal multi-layer on the whole anode.The reverse performances are compared to find the influences of these factors.The results show that JBS diodes with field guard rings have a lower reverse current density and a higher breakdown voltage,and with independent P-type ohmic contact manufacturing,the reverse performance of 4H-SiC JBS diodes can be improved effectively. Furthermore,the P-type ohmic contact is studied in this work.     

Advanced High-Voltage 4H-SiC Schottky Rectifiers

This paper presents advanced 4H-SiC high-voltage Schottky rectifiers with improved performance when compared to conventional 4H-SiC Schottky rectifiers. Two types of 4H-SiC junction barrier Schottky (JBS) rectifiers have been explored. These rectifiers offer Schottky-like ON-state and fast switching characteristics, while their OFF-state characteristics have a low leakage current similar to that of the PiN junction rectifier. Planar 4H-SiC JBS rectifiers, with more than 1-kV blocking capability and orders of magnitude lower reverse leakage current than that of conventional SiC Schottky rectifiers, have been demonstrated. In addition, a novel device structure, called lateral channel JBS rectifier, was designed and experimentally demonstrated in 4H-SiC with up to 1.5-kV blocking capability and pinlike reverse characteristics.      

4H-SiC肖特基微型同位素电池(英文)

半导体同位素电池由于其寿命长、集成性优良、环境适应性强等特点成为解决MEMS能源问题的理想手段。利用4H-SiC材料的宽禁带特性,制造了4H-SiC肖特基同位素电池。对电池的耗尽层厚度以及掺杂浓度进行了优化设计,对肖特基金属进行了选择。使用4mCi/cm2的63Ni作为同位素电池的放射源对制造的同位素电池进行了测试。测试结果表明,该同位素电池可以获得31.3nW/cm2的功率密度、0.5V的开路电压、3.13×10-8A/cm2的短路电流密度和1.3%的转换效率。将电池的输出特性和硅基的平板型、3D结构电池输出特性进行了比较,证明4H-SiC肖特基同位素电池能够获得较高的功率密度。电池的性能可通过提升势垒高度、提高工艺质量、更换同位素等方式得到提高。     

采用场板和B+离子注入边缘终端技术的Ti/4H-SiC肖特基势垒二极管

采用自主外延的4H-SiC外延片,利用PECVD生长的SiO2做场板介质,B+离子注入边缘终端技术,制造了Ti/4H-SiC肖特基势垒二极管.测试结果表明,Ti/4H-SiC肖特基势垒二极管的理想因子n=1.08,势垒高度(ψe)=1.05eV,串联电阻为6.77mΩ·cm2,正向电压为4V时,电流密度达到430A/cm2.反向击穿电压大于1.1kV,室温下,反向电压为1.1kV时,反向漏电流为5.96×10-3 A/cm2.     

采用场板和B+离子注入边缘终端技术的Ti/4H-SiC肖特基势垒二极管

采用自主外延的4H-SiC外延片,利用PECVD生长的SiO2做场板介质,B 离子注入边缘终端技术,制造了Ti/4H-SiC肖特基势垒二极管.测试结果表明,Ti/4H-SiC肖特基势垒二极管的理想因子n=1.08,势垒高度(ψe)=1.05eV,串联电阻为6.77mΩ·cm2,正向电压为4V时,电流密度达到430A/cm2.反向击穿电压大于1.1kV,室温下,反向电压为1.1kV时,反向漏电流为5.96×10-3 A/cm2.     

Cu/,Ni/4H-SiC Schottky势垒的退火研究

采用磁控溅射方法分别在n型4H-SiC上沉积Cu,Ni金属薄膜形成Schottky接触，并进行不同温度下的退火，通过I-V和C-V测试，研究不同退火温度对Schottky势垒高度以及理想因子的影响. 研究结果表明，对Cu,Ni金属，适当的退火温度能提高其与4H-SiC所形成的Schottky势垒高度，改善理想因子，但若退火温度过高，则会导致接触的整流特性退化.器件在退火前后，反向漏电流都较小. 热电子发射是其主要的输运机理. 所制备的金属半导体接触界面比较理想，无强烈费米能级钉扎     

On the current-voltage characteristics of epitaxial Schottky barrier diodes

The J-V characteristics of epitaxial Schottky barrier diodes are analyzed. Based on the assumption of negligible recombination in the epitaxial layer, formal solution from which the J-V characteristics can be calculated is derived. The solution is valid for all injection levels and reduces to the form I = I_s[exp (q(V?IR)/kT) ? 1], where R is the series resistance of the epitaxial layer, under C12 C12V low-injection conditions. The analysis is justified by very close correspondence with exact numerical calculations using the Finite Element Device Analysis Program (FIELDAY) in which thermionic emission boundary conditions are implemented for both electrons and holes. It is shown that for low barrier Schottky diodes the minority carrier injection is negligible and the expression I = I_s[exp (q(V?IR)/kT) ? 1] describes the I-V characteristics over large bias range. For high barrier C12 C12 V Schottky diodes the exact solution must be used as minority carriers are injected and the series resistance is decreased due to conductivity modulation effect.     

Effect of annealing temperature on the electrical characteristics of Platinum/4H-SiC Schottky barrier diodes

Pt/4H-SiC Schottky barrier diodes have been fabricated to investigate the effect of annealing on the electrical characteristics of the fabricated devices. The parameters such as barrier height, ideality factor and donor concentration were deduced from the current–voltage (I–V) and the capacitance–voltage (C–V) measurements at room temperature. Diodes showed non-ideal behaviour like high value of ideality factor and lower value of barrier height. A barrier height of 1.82?eV was obtained from C–V measurements and it was 1.07?eV when obtained from the I–V measurements with ideality factor 1.71 for as-deposited diodes at room temperature. The diodes, therefore, were annealed in the temperature range from 25°C to 400°C to observe the effect of annealing temperature on these parameters. Schottky barrier height and ideality factors were found to be temperature-dependent. After rapid thermal annealing upto 400°C, a barrier height of 1.59?eV from C–V measurements and the value of 1.40?eV from I–V measurements with ideality factor 1.12 were obtained. Barrier heights deduced from C–V measurements were consistently larger than those obtained from I–V measurements. To come to terms with this discrepancy, we re-examined our results by including the effect of ideality factor in the expression of the barrier height. This inclusion of ideality factor results in reasonably good agreement between the values of barrier height deduced by the above two methods. We believe that these improvements in the electrical parameters result from the improvement in the quality of interfacial layer.