Josephson nonlatching logic circuits

The authors describe nonlatching logic circuits that can be designed using Josephson junctions as the switching elements. The circuits require no current resetting and can be switched between their two logic states with a subnanosecond delay time. The switching behavior has been simulated numerically. The choice of parameters and junction types is analyzed. The distinctive features which make these circuits attractive are discussed.     

Theory of differential current switches and logic design of ternary ECL circuits at switch level

Starting from the viewpoint that the switch states and signal values in a digital circuit should be described separately by two different kinds of variable, the interaction between the switching element and signal in multi-valued ECL circuits is analysed and two types of connection operations, threshold switching operation and current switching operation, are proposed. The properties and circuit realizations of these new operations are discussed and the theory of differential current switches applicable to ECL circuits is established. Examples of basic ternary ECL circuits confirm that this theory can effectively guide the logic design of ternary ECL circuits at switch level. The circuits are verified by using the SPICE II program. They have the same logic level difference and transient characteristic as binary ECL circuits. Since the multi-valued ECL circuit uses only one set of power supply and can set several threshold values by using reference levels, it can be fabricated using conventional ECL techniques and is compatible with binary ECL circuits.     

The Intelligent Communications Switching Network

A new type of digital switching network for use in class five telephone offices is described. A special-purpose high-speed digital processor executing a stored program performs the switching functions. The network can provide programmable gain or loss as well as conference circuits for voice connections. It can also provide multiple and independent data circuits in combination with the voice circuits. The network can be used in any size telephone office, and can practically provide many new features and communication services.     

Transistor-tunnel-diode ternary-logic circuits

Two new basic circuits for ternary-logical operations are described. Analogue simulation and experimental measurements confirm that the switching speeds of the ternary circuits can be comparable with those in similar binary circuits. It is concluded that a marginal improvement in processing rate may be achieved with ternary logic using transistor-tunnel-diode logic circuits.     

A BIST TPG for Low Power Dissipation and High Fault Coverage

This paper presents a low hardware overhead test pattern generator (TPG) for scan-based built-in self-test (BIST) that can reduce switching activity in circuits under test (CUTs) during BIST and also achieve very high fault coverage with reasonable lengths of test sequences. The proposed BIST TPG decreases transitions that occur at scan inputs during scan shift operations and hence reduces switching activity in the CUT. The proposed BIST is comprised of two TPGs: LT-RTPG and 3-weight WRBIST. Test patterns generated by the LT-RTPG detect easy-to-detect faults and test patterns generated by the 3-weight WRBIST detect faults that remain undetected after LT-RTPG patterns are applied. The proposed BIST TPG does not require modification of mission logics, which can lead to performance degradation. Experimental results for ISCAS'89 benchmark circuits demonstrate that the proposed BIST can significantly reduce switching activity during BIST while achieving 100% fault coverage for all ISCAS'89 benchmark circuits. Larger reduction in switching activity is achieved in large circuits. Experimental results also show that the proposed BIST can be implemented with low area overhead.     

ECL集成电路的四值接口技术

本文介绍了适用于多值ECL电路设计的差动电流开关理论。在该理论中,分别用开关变量和四值信号变量来描写ECL电路中差动晶体管对的开关状态和信号,并引入此两类变量之间的联结运算,以描写电路内部开关元件与信号的相互作用过程。基于该理论,本文对两种接口电路2-4编码器和4-2译码器进行了设计。应用SPICE程序对设计电路的计算机模拟表明,两种电路均具有正确的逻辑功能、理想的DC转移特性和瞬态特性。由于该接口电路具有与二值电路兼容的集成工艺、电源设备、逻辑级差和瞬态特性,因此它可用作现有二值ECL集成电路的输入输出接口,从而达到减少芯片的引脚数和片间连接的目的。     

THE QUATERNARY INTERFACE TECHNIQUE IN ECL INTEGRATED CIRCUITS

The theory of differential current switches which applies to the design of multivaluedECL circuits is introduced.In this theory,the switching state of differential transistor pairand signal in ECL circuits are described by switching variables and quaternary signal variables,respectively.he connection operations between the two kinds of variables are introduced todescribe the action process between switching element and signal in the circuits.Based on thistheory,two kinds of interface circuits-2-4 encoder and 4-2 decoder are designed.The computersimulation for the designed circuits by using SPICE program confirms that both circuits havecorrect logic functions,desired DO transfer characteristics and transient characteristics.Theseinterface circuits are compatible with binary circuits in the integrated process,the power supplyequipment,the logic stage and the transient characteristic.Therefore,they can be used as input-output interface of the existing binary ECL integrated circuits so as to decrease the number ofpins of a chip and the connections between chips.     

Switching noise picked up by a planar dipole antenna mounted nearintegrated circuits

For applications in which antennas are located near or in integrated circuits (ICs), the switching noise from digital circuits can interfere with the operation of antennas. This paper presents a study of the switching noise picked up by a planar dipole antenna from a divide-by-128 IC located near the antenna. To develop understanding of the measurement results, a lumped-element simulation model has been developed. Quantitative agreements between the measurements and simulations for numerous experiments have been obtained. The measurements indicate that by selecting the signal frequency on the antennas much greater than the circuit frequency, the immunity from switching noise can be improved. The measurements also showed that circuits such as buffers are relatively noisier, and emanate more noise at higher operating frequencies. Finally, the measurements showed that using antennas with a differential or balanced feed structure can substantially reduce the coupling of switching noise (~20 dB) which is mostly common-mode in nature     

适用于TTL数字电路元件级设计的开关—信号理论

本文分析了以布尔代数为基础的数字电路设计的不足，提出了将开关状态和信号这二类变量分别描写的观点，讨论了ＴＴＬ电路中晶体管开关元件与信息之间的相互作用过程，在此基础上，建立了适用于ＴＴＬ电路的限幅电压开关理论，设计实例说明，该理论能有效地指导各类ＴＴＬ电路在元件级的逻辑设计。     

Low-power digital systems based on adiabatic-switching principles

Adiabatic switching is an approach to low-power digital circuits that differs fundamentally from other practical low-power techniques. When adiabatic switching is used, the signal energies stored on circuit capacitances may be recycled instead of dissipated as heat. We describe the fundamental adiabatic amplifier circuit and analyze its performance. The dissipation of the adiabatic amplifier is compared to that of conventional switching circuits, both for the case of a fixed voltage swing and the case when the voltage swing can be scaled to reduce power dissipation. We show how combinational and sequential adiabatic-switching logic circuits may be constructed and describe the timing restrictions required for adiabatic operation. Small chip-building experiments have been performed to validate the techniques and to analyse the associated circuit overhead     

指导nM0S数字电路元件级设计的开关信号理论

本文指出了布尔代数在指导数字电路设计中的不足,并在区分描写开关状态与信号的二类变量的基础上建立了能反映数字电路内开关元件与信号相互作用过程的开关信号理论。本文把该理论具体用于对nMOs数字电路的研究,结果表明该理论可很好地指导nMOS数字电路在元件级的逻辑设计。     

Computing multivalued input-output Characteristics in the circuits containing bipolar transistors

The paper deals with dc circuits including bipolar transistors represented by the Ebers-Moll model. An important question how to efficiently compute multivalued input-output characteristics of these circuits is considered. A switching variables approach for tracing a multivalued single-branched characteristic, which can be considered as some kind of continuation method, is developed. A new strategy of switching variables is proposed and the generalized implicit function theorem is used as the mathematical background. Unfortunately, this approach suffers from major shortcomings when it is directly applied to bipolar transistor circuits, due to specific nonlinearities of the transistor model, causing the sharp-turning-point problem. To overcome this problem, a variable transformation is proposed, which leads to smooth solution curves. An efficient algorithm combining the developed variant of switching variable method with the proposed transformation is described. A generalized version of the algorithm enables us to compute multivalued characteristics composed of disconnected branches, under the assumption that at least one point on each branch can be found. It is illustrated via four examples of realistic transistor circuits including a voltage regulator, the Schmitt trigger, a line receiver, and their combination.     

Research note A circuit for instant-controlled switching

An analogue circuit for instant-controlled switching using a simple AC thyratron-type phase-shifter is proposed. The method can be used for elimination and analysis of switching transients in circuits.     

Symbolic Steady-State Analysis for Strongly Nonlinear Circuits and Systems

A symbolic method for steady-state analysis of nonlinear circuits and systems is presented. This method is based on the principle of the Equivalent Small Parameter method (the ESP method), which is an improved perturbation technique combined with the harmonic balance method. Using this method, a set of high-order nonlinear differential equations can be solved and the symbolic expressions of the steady-state periodic solutions for the required variables can be obtained. Two examples are given and show that the method is general and can be used for both weakly and strongly nonlinear circuits, and time-variant nonlinear circuits such as switching mode circuits.     

基于RT器件的三值与非门、或非门电路设计

共振隧穿（resonant tunnel,RT）器件本身所具有的微分负阻（negative differential resistance,NDR）特性使其成为天然的多值器件，文中利用RT器件的负阻特性,以开关序列原理为指导,设计了基于RT电路的开关模型,实现了更为简单的三值RT与非门和或非门电路,并利用MOS网络模型,通过SPICE软件仿真验证了所设计电路的正确性，该设计思想可推广到更高值的多值电路设计中。     

基于RT器件的三值与非门、或非门电路设计

共振隧穿(resonant tunnel,RT)器件本身所具有的微分负阻(negative differential resistance,NDR)特性使其成为天然的多值器件.文中利用RT器件的负阻特性,以开关序列原理为指导,设计了基于RT电路的开关模型,实现了更为简单的三值RT与非门和或非门电路,并利用MOS网络模型,通过SPICE软件仿真验证了所设计电路的正确性.该设计思想可推广到更高值的多值电路设计中.     

Statistical estimation of delay-dependent switching activities inembedded CMOS combinational circuits

This paper describes a new procedure to estimate the delay-dependent switching activities in CMOS combinational circuits. The procedure is based on analytic and statistical approaches to take advantage of their time-efficiency over conventional event-driven simulation tools. For this study, combinational circuits driven by discrete-time logic signals are considered. By focusing on a specific class of combinational circuits, the transitional effects can be analyzed more accurately by considering some of the delay effects neglected in previous studies, Also, to model the delay-dependent effects, statistical properties such as the pattern probability, the propagation probability, and the distribution of the propagation delay of switching activities are defined and evaluated. The simulation results on benchmark circuits indicate that the proposed procedure significantly speeds up the estimation process in comparison to the conventional event-driven simulators. The reliability issues in the aspect of switching activities are briefly discussed     

Dynamic internal testing of CMOS circuits using hot luminescence

Subnanosecond pulses of hot electron luminescence are shown to be generated coincident with logic state switching of individual devices in CMOS circuits. These pulses are used to directly observe 90 ps gate delays in a ring oscillator as well as the logic switching and gate delays of a counter. By use of a detector with both space- and time-resolution, the dynamics of all the gates of the circuit are simultaneously measured. This noninvasive technique can be extended to smaller device size, as well as probing from the backside of the wafer. The optical emission may provide an alternative to electron beam testing for measuring the dynamics of high-speed CMOS circuits     

The novel resonant DC link three-level soft-switching inverter

ABSTRACT

In the paper, the novel topology of the resonant DC link three-level soft-switching inverter is proposed to reduce switching losses and improve the efficiency of three-level inverter at high switching frequency. Symmetrical auxiliary resonant circuits are set in the DC link of three-level hard-switching inverter. Moreover, the terminal voltage of the resonant capacitors between the DC buses periodically drops to zero via the resonance of auxiliary circuits. Furthermore, under such condition, the main switches of the three-level inverter would be operated, in order to achieve zero-voltage switching. Based on the equivalent circuits in different operating modes, the paper analyses the working process of the soft-switching inverter in detail. In addition, a 3 kW laboratory prototype of resonant DC link three-phase three-level soft-switching inverter is built. The experimental results show that the main switches and auxiliary switches of the inverter are operated under soft-switching conditions, and the efficiency is significantly improved compared with the three-level hard-switching inverter. Therefore, the proposed topology can effectively reduce switching losses and prove to be more practical in engineering.     

LSI-Direct-controlled plasma display panel

A plasma display panel with auxiliary discharge cells to control the display cells has been developed. The panel can be directly controlled by low-voltage MOS-LSI switching circuits.