Schottky barrier heights of n-type and p-type Al0.48In0.52As

The authors report electrical measurements on four different metal contacts which formed Schottky barriers to lightly doped complementary n- and p-type Al_0.48In_0.52As epitaxial material grown by molecular beam epitaxy on semi-insulating InP substrates. The Schottky contact metals studied were Au, Al, Pt, and tri-layer Ti/Pt/Au. The Schottky barrier heights varied from 0.560 eV for Al on n-type AlInAs to 0.905 eV for Al on p-type AlInAs, with intermediate values for the other metals studied. The sum of n- and p-type Schottky barrier heights for each metal contact ranged from 1.440 to 1.465 eV, in good agreement with the accepted Al_0.48In_0.52As bandgap value of 1.45 eV     

Impact of Thickness on Contact Issues for Pinning Effect in Black Phosphorus Field‐Effect Transistors

Metal/semiconductor contact is a significant constraint in short‐channel field effect transistors (FETs) comprising black phosphorus (BP) and other 2D semiconductors. Due to the pinning effect at metal/2D semiconductor interface, the Schottky barrier usually does not follow the Schottky–Mott rule, resulting in thickness‐dependent FET performance. In this work, the Schottky barrier in BP FETs is investigated via theory calculation and electrical measurement. A simple metal/BP contact model is presented based upon thickness‐dependent electrical characteristics of BP FETs. The model considers the Schottky barrier as a combined effect of the Schottky–Mott rule and the pinning effect and provides a feasibility to track the conducting behavior of other 2D semiconductor FETs.     

Large‐Area Schottky Barrier Transistors Based on Vertically Stacked Graphene–Metal Oxide Heterostructures

The fabrication of all‐transparent flexible vertical Schottky barrier (SB) transistors and logic gates based on graphene–metal oxide–metal heterostructures and ion gel gate dielectrics is demonstrated. The vertical SB transistor structure is formed by (i) vertically sandwiching a solution‐processed indium‐gallium‐zinc‐oxide (IGZO) semiconductor layer between graphene (source) and metallic (drain) electrodes and (ii) employing a separate coplanar gate electrode bridged with a vertical channel through an ion gel. The channel current is modulated by tuning the Schottky barrier height across the graphene–IGZO junction under an applied external gate bias. The ion gel gate dielectric with high specific capacitance enables modulation of the Schottky barrier height at the graphene–IGZO junction over 0.87 eV using a voltage below 2 V. The resulting vertical devices show high current densities (18.9 A cm^?2) and on–off current ratios (>10⁴) at low voltages. The simple structure of the unit transistor enables the successful fabrication of low‐power logic gates based on device assemblies, such as the NOT, NAND, and NOR gates, prepared on a flexible substrate. The facile, large‐area, and room‐temperature deposition of both semiconducting metal oxide and gate insulators integrates with transparent and flexible graphene opens up new opportunities for realizing graphene‐based future electronics.     

InSe Schottky Diodes Based on Van Der Waals Contacts

2D semiconductors are excellent candidates for next‐generation electronics and optoelectronics thanks to their electrical properties and strong light‐matter interaction. To fabricate devices with optimal electrical properties, it is crucial to have both high‐quality semiconducting crystals and ideal contacts at metal‐semiconductor interfaces. Thanks to the mechanical exfoliation of van der Waals crystals, atomically thin high‐quality single‐crystals can easily be obtained in a laboratory. However, conventional metal deposition techniques can introduce chemical disorder and metal‐induced mid‐gap states that induce Fermi level pinning and can degrade the metal‐semiconductor interfaces, resulting in poorly performing devices. In this article, the electrical contact characteristics of Au–InSe and graphite–InSe van der Waals contacts, obtained by stacking mechanically exfoliated InSe flakes onto pre‐patterned Au or graphite electrodes without the need for lithography or metal deposition is explored. The high quality of the metal‐semiconductor interfaces obtained by van der Waals contact allows to fabricate high‐quality Schottky diodes based on the Au–InSe Schottky barrier. The experimental observation indicates that the contact barrier at the graphite–InSe interface is negligible due to the similar electron affinity of InSe and graphite, while the Au–InSe interfaces are dominated by a large Schottky barrier.     

界面介质层对GaN基LED漏电流的影响

在LED电极欧姆接触中,载流子在金属电极和半导体间有不同的传输机制.通过载流子在金属半导体界面传输机制的模拟,讨论了界面介质层及其势垒对器件串联电阻和漏电流的影响,发现介质层电阻比LED的串联电阻小得多,可以忽略不计;但是随着器件的老化,介质层及其所含的缺陷会产生相当大的漏电流,使器件的可靠性和稳定性下降,也为LED的失效机理提供了理论依据.     

Fluoropolymer-assisted graphene electrode for organic light-emitting diodes

Organic light-emitting diodes (OLEDs) were fabricated on a graphene electrode, with synthesized graphene being transferred and simultaneously doped with supporting polymers. Poly[methyl methacrylate] (PMMA) and fluoropolymer (CYTOP) layers were used as the supporting polymers. The sheet resistance of CYTOP-assisted graphene (CYTOP-G) with 4 layers of graphene is 200 Ω/sq., which is lower than that of PMMA-assisted graphene (PMMA-G, 330 Ω/sq.) The transmittance value of PMMA-G and CYTOP-G with 4 graphene layers is higher than 85%. CYTOP-G is shown to exhibit a higher tolerance to UV–O₃ treatment and thermal annealing than PMMA-G. Work function of CYTOP-G is 4.7 eV, which is higher than that of PMMA-G (4.3 eV). X-ray photoemission and Raman spectroscopy data indicate that CYTOP-G has numerous C-F bonds on the surface exhibiting p-type semiconductor properties, owing to the high electronegativity of fluorine. The turn-on voltage of an OLED based on CYTOP-G with 4 graphene layers is 4.2 V, which is lower than that of indium tin oxide (ITO)-based one (4.5 eV). Furthermore, the luminance ratio of graphene-based OLEDs to ITO-based OLEDs was calculated to be 104% for CYTOP-G, and 97% for PMMA-G. According to the ultraviolet photoemission spectra, the hole injection barrier in CYTOP-G is lower by about 0.5 eV than the hole injection barrier in PMMA-G. These results are very encouraging to the prospect of replacing ITO electrodes with graphene ones in OLED applications.     

Modeling the gate bias dependence of contact resistance in staggered polycrystalline organic thin film transistors

We have modeled the dependence on the gate voltage of the bulk contact resistance and interface contact resistance in staggered polycrystalline organic thin film transistors. In the specific, we have investigated how traps, at the grain boundaries of an organic semiconductor thin film layer placed between the metal electrode and the active layer, can contribute to the bulk contact resistance. In order to the take into account this contribution, within the frame of the grain boundary trapping model (GBTM), a model of the energy barrier E_B, which emerges between the accumulation layer at the organic semiconductor/insulator interface and injecting contact, has been proposed. Moreover, the lowering of the energy barrier at the contacts interface region has been included by considering the influence of the electric field generated by the accumulation layer on the injection of carriers at the source and on the collection of charges from the accumulation layer to the drain contact. This work outlines both a Schottky barrier lowering, determined by the accumulation layer opposite the source electrode, as well as a Poole-Frenkel mechanism determined by the electric field of the accumulation layer active at the drain contact region. Finally it is provided and tested an analytical equation of our model for the contact resistance, summarizing the Poole-Frenkel and Schottky barrier lowering contribution with the grain boundary trapping model.     

Numerical analysis of inhomogeneous Schottky diode with discrete barrier height patches

The potential profile inside the semiconductor at the metal–semiconductor contact is simulated by numerically solving the Poisson equation and the drift diffusion equations for inhomogeneous Schottky diode. From the simulated potential and the electron and hole concentrations, the drift-diffusion current as a function of bias is calculated. The simulation is carried out for various distribution patterns of barrier height patches at the metal–semiconductor contact to study the effect of barrier inhomogeneities on the Schottky diode parameters, namely barrier height and ideality factor and their temperature dependence. It is found that barrier height decreases and ideality factor increases with increase in the deviation of discrete barrier height patches in the distribution. The resulting barrier parameters are studied to understand the effect of barrier inhomogeneities on the current–voltage characteristics of inhomogeneous Schottky contact.     

Influence of pinning trap in Ti/4H–SiC Schottky barrier diode

Ti/4H–SiC Schottky barrier diode without any intentional edge termination is fabricated. The obtained properties, low on-resistance of 3 mΩ cm² and low leakage current of 10⁻⁴ A/cm² at 1000 V, are evaluated by device simulation considering pinning at metal/semiconductor interface. The breakdown voltage is explained by minimization of electric field enhancement at the Schottky electrode edge due to pinning. The leakage current corresponds to Schottky barrier tunneling current depending on drift layer doping and Schottky barrier height.     

Model calculations for metal-insulator-semiconductor solar cells

An analytical approach to calculating MIS solar cell properties has been formulated and utilized to study solar cell efficiency as a function of interfacial layer thickness, various interfacial film parameters and band gap. Three models are considered regarding interface state recombination kinetics. Calculations are presented for the case of interface states being in equilibrium with the metal (Model (I), in equilibrium with the majority carriers of the semiconductor (Model II) and in equilibrium with the minority carriers (Model III). It is found that in all three cases, the efficiency of low barrier height, Schottky barrier cells can be increased very significantly. For example, it is shown that for a band gap of 1.5 eV and a barrier height of 0.5 eV, it appears possible to increase the cell efficiency from essentially zero to 12%. If the barrier height is 1.0 eV, an efficiency of over 20% is possible. It is determined, however, that MIS solar cell performance is limited by leakage currents due to minority carrier diffusion back into the bulk. As a result, the upper limit of performance is defined by that for a homojunction. These calculations identify ranges of surface state density and interfacial barrier heights necessary for a good MIS solar cell.     

Experimental and numerical analysis of channel-length-dependent electrical properties in bottom-gate,bottom-contact organic thin-film transistors with Schottky contact

Channel length dependence of field-effect mobility and source/drain parasitic resistance in pentacene thin-film transistors with a bottom-gate, bottom-contact configuration was investigated. Schottky barrier effect such as nonlinear behaviors in transistor output characteristics appeared and became more prominent for shorter channel length less than 10 μm, raising some concerns for a simple utilization of conventional parameter extraction methods. Therefore the gate-voltage-dependent hole mobility and the source/drain parasitic resistance in the pentacene transistors were evaluated with the aid of device simulation accounting for Schottky contact with a thermionic field emission model. The hole mobility in the channel region shows smaller values with shorter channel length even after removing the influence of Schottky barrier, suggesting that some disordered semiconductor layers with low carrier mobility exist near the contact electrode. This experimental data analysis with the simulation enables us to discuss and understand in detail the operation mechanism of bottom-gate, bottom-contact transistors by considering properly each process of charge carrier injection, carrier flow near the contact region, and actual channel transport.     

On the band-structure lineup at Schottky contacts and semiconductor heterostructures

The band-structure lineup at semiconductor interfaces is explained by the intrinsic interface-induced gap states (IFIGS) that derive from the complex band structures of the semiconductors. The barrier heights of metal–semiconductor or Schottky contacts as well as the band-edge offsets of semiconductor heterostructures are composed of a zero-charge-transfer term plus an electrostatic-dipole contribution which are determined by the IFIGS branch-point energies of the semiconductors and the electronegativity difference of the two materials in contact, respectively. This concept will be illustrated by experimental core-level shifts induced by metal adatoms on group-IV semiconductor surfaces. Choosing Si and SiO₂ Schottky contacts and heterostructures as typical examples, it will be demonstrated that the IFIGS-and-electronegativity concept self-consistently explains the barrier heights of Schottky contacts and the valence-band offsets of heterostructures. The IFIGS-and-electronegativity concept also resolves the alleviation of the Fermi-level pinning by ultra-thin insulator interlayers in Schottky contacts. Finally, the modification of Schottky barriers by atomic interlayers will be discussed.     

Progress toward electrical injection of spin-polarized electrons into semiconductors

The use of carrier spin as a new degree-of-freedom in semiconductor devices offers new functionality and performance. However, efforts to implement semiconductor spintronics have been crippled by the lack of an efficient and practical means to electrically inject spin polarized carriers into a semiconductor device heterostructure. This paper summarizes progress toward that end using magnetic semiconductors and ferromagnetic metals as spin injecting contacts. We describe a very successful approach which employs a ferromagnetic metal/tunnel barrier contact, where the tunnel barrier is simply a tailored Schottky barrier which forms naturally between the ferromagnetic metal and the semiconductor itself. Initial efforts have demonstrated electron spin polarizations of at least 32% in GaAs quantum-well LED heterostructures. Significantly higher spin injection efficiencies are anticipated in optimized structures. These results demonstrate that spin injecting contacts can be formed using a very familiar and widely employed contact methodology, providing a ready pathway for the integration of spin transport into semiconductor processing.     

蒙特卡罗方法模拟金属-半导体接触的直接隧穿效应

运用自洽的蒙特卡罗方法模拟了肖特基接触的隧穿效应 .模拟的内容包括具有不同的势垒高度的金属 -半导体接触在正向和反向偏置下的工作状态 .分析模拟结果可知 ,隧穿电流在反向偏置下起主要的作用 .同时还模拟了引入肖特基效应后 ,SBD的工作特性 ,验证了模拟使用的物理模型 .得到了与理论计算值符合的模拟结果 .分析模拟结果表明 ,由于肖特基效应形成的金属 -半导体接触势垒的降低 ,会在很大程度上影响金属 -半导体接触的输运特性     

a-Si:H Schottky gate on n-GaInAs

The metal Schottky contact leads to low barrier heights on small-gap (<1 eV) semiconductors. This is the case of the n-type GaInAs material matched to InP where this barrier does not exceed 0.3 eV. We have found an original method to improve this result considerably by using a deposition of an amorphous semiconductor a-Si or a-Si: H. A Pt metal acts as the Schottky contact on the amorphous layer. The device behaves like a heterostructure of a high-gap (amorphous layer: Eg?1.8 eV) on a small-gap (GaInAs:0.75 eV) material. The Schottky-barrier height (0.8 eV) is greater than the GaInAs bandgap (0.75 eV). The reverse current is very low: 20 nA at 1 V reverse voltage for a 0.6 mm diode diameter. An FET using a-Si: H as a gate realised on a GaInAs layer shows a good electrical characteristic.     

Study and modeling of the transport mechanism in a Schottky diode on the basis of a GaAs semiinsulator

The current through a metal-semiconductor junction is mainly due to the majority carriers. Three distinctly different mechanisms exist in a Schottky diode: diffusion of the semiconductor carriers in metal, thermionic emission-diffusion (TED) of carriers through a Schottky gate, and a mechanical quantum that pierces a tunnel through the gate. The system was solved by using a coupled Poisson-Boltzmann algorithm. Schottky BH is defined as the difference in energy between the Fermi level and the metal band carrier majority of the metal-semiconductor junction to the semiconductor contacts. The insulating layer converts the MS device in an MIS device and has a strong influence on its current-voltage (I-V) and the parameters of a Schottky barrier from 3.7 to 15 eV. There are several possible reasons for the error that causes a deviation of the ideal behaviour of Schottky diodes with and without an interfacial insulator layer. These include the particular distribution of interface states, the series resistance, bias voltage and temperature. The GaAs and its large concentration values of trap centers will participate in an increase in the process of thermionic electrons and holes, which will in turn act on the I-V characteristic of the diode, and an overflow maximum value [NT = 3 × 10²⁰] is obtained. The I-V characteristics of Schottky diodes are in the hypothesis of a parabolic summit.     

Controlling of electronic parameters of GaAs Schottky diode by poly(3,4-ethylenedioxithiophene)-block-poly(ethylene glycol) organic interlayer

The electronic properties of metal-organic semiconductor-inorganic semiconductor structure between GaAs and poly(3,4-ethylenedioxithiophene)-block-poly(ethylene glycol) organic film have been investigated via current-voltage and capacitance-voltage methods. The Au/PEDOT/n-GaAs contact exhibits a rectification behavior with the barrier height of 0.69 eV and ideality factor value of 3.94. The barrier height of the studied diode (0.67 eV) is lower than that of Ni/n-GaAs/In (0.85 eV) and Au/n-GaAs/In Schottky diodes. The decrease in barrier height of Au/n-GaAs/In Schottky diode is likely to be due to the variation in the space charge region in the GaAs. The obtained results indicate that control of the interfacial potential barrier for metal/n-GaAs diode was achieved using thin interlayer of the poly(3,4-ethylenedioxithiophene)-block-poly(ethylene glycol).     

Reversible Formation of Gold Halides in Single‐Crystal Hybrid‐Perovskite/Au Interface upon Biasing and Effect on Electronic Carrier Injection

Solar cells, light emitting diodes, and X‐ray detectors based on perovskite materials often incorporate gold electrodes, either in direct or indirect contact with the perovskite compound. Chemical interactions between active layers and contacts deteriorate the operation and induce degradation, being the identification of the chemical nature of such interfacial structures an open question. Chemical reactivity of gold in contact with the perovskite semiconductor leads to reversible formation of oxidized gold halide species and explains the generation of halide vacancies in the vicinity of the interface. Electrical biasing induces contact reaction and produces modifications of the current level by favoring the ability of perovskite/Au interfaces to inject electronic carriers. The current injection increment does not depend on the halogen source used, either extrinsically by iodine vapor sublimation of Au electrodes, or intrinsically by bias‐driven migration of bromide ions. In addition, the formation of a dipole‐like structure at the reacted electrode that lowers the potential barrier for electronic carriers is confirmed. These findings highlight adequate selection of the external contacts and suggest the need for a deeper understanding of contact reactivity as it dominates the operation characteristics, rather than being governed by the bulk transport properties of the charge carriers, either electronic or ionic.     

High-barrier Al/p-Si Schottky diodes

Sequential implantation of argon ions and low-energy hydrogen ions has been found to yield Schottky barriers of exceptionally high values on p-type silicon. The interaction of these ions in Si is quite complex, involving donor defect generation, defect passivation, and acceptor dopant neutralization. The apparent synergism of these specific implants has resulted in Al/p-Si Schottky diodes with an effective barrier height as high as 0.83 eV, among the highest value reported for any metal/p-Si contact.     

金属/氮化物肖特基势垒和欧姆接触研究进展

金属 /氮化物肖特基势垒和欧姆接触是蓝紫光光学器件及高温大功率电子器件中的关键工艺。氮化物半导体是一种极性材料 ,表面态密度较低 ,费米能级钉扎效应较弱 ,表面处理能显著影响接触特性。样品表面的沾污和氧化层也会使接触特性显著退化。宽禁带材料的杂质离化能高 ,重掺杂比较困难。深能级陷阱对载流子的俘获效应很强。这些因素都增加了接触的制作难度 ,促使人们寻求新的方案来改进接触特性。文中从金属 /半导体接触的物理模型出发来综述肖特基势垒和欧姆接触的研究进展 ,希望能给器件研究者提供新的思路。