Metastability reduction by aperture transformation

A methodology is proposed, which involves the use of an aperture transformer comprising a new controlled clock circuit. For reducing overall metastability by first transforming unsafe edge arrival times into metastability of the control signals. A large reduction in metastability has been demonstrated by the development of a new bit synchroniser built using the methodology     

A Novel Interpolation Method for Maximum Likelihood Timing Recovery

An algorithm to recover bit timing is proposed which maximises a quadratic polynomial approximation to the log-likelihood function. The exact equation for the mean of the log-likelihood function derivative, i.e. the S-curve, is derived and shown to have a sine form. In each time interval the S-curve has two zeros. The zero corresponding to the maximum of the likelihood function is resolved using quadratic interpolation based on four samples per period. The resulting timing synchroniser has a simple open loop feedforward structure which has effectively no acquisition period. Receiver performances in terms of rms timing jitter and bit error rate (BER) are analysed and shown to agree closely with theoretical results.     

Simple baseband synchronisation scheme for tamed frequencymodulation

A novel carrier and clock synchronisation scheme for tamed frequency modulation is presented. It requires one complex sample per bit, like the digital Costas loop for offset in-phase and quadrature modulations, and is based on processing baseband samples of the phase of the received signal. The performance of the synchroniser is assessed by S-curves and simulated acquisition trajectories     

Analysis of a double-latch synchroniser circuit

A model for a synchroniser composed of two serially connected D-latches is constructed and analysed to determine the mean time between failures. The analysis demonstrates that the best synchroniser reliability is obtained using a single-latch synchroniser.<>     

Decoder-assisted frame synchronisation for turbo-coded systems

An improved frame synchronisation methodology is proposed for turbo-decoded packets using a list synchronisation technique, where a simple synchroniser generates a list of most probable packet starting positions and the following synchroniser makes a refined decision. The second synchroniser is decoder-assisted, accepting soft-decision feedback from the decoder. The performance of the scheme is evaluated via simulation     

Fast clock synchroniser using initial phase presetting DPLL (IPP-DPLL) for burst signal reception

A fast clock synchroniser that quickly adjusts the initial phase of the DPLL output clock to the input signal (receiver detector output) at the beginning of acquisition is proposed for burst QDPSK signal reception. The synchroniser performance is given in terms of nondetection rate (NDR) of the unique word following the clock synchronisation preamble. Measured results clearly indicate that the proposed synchroniser achieves faster synchronisation than the conventional binary quantised DPLL clock synchroniser.<>     

Optimised hybrid unidigit p.c.m. system

The coding efficiency of unidigit p.c.m. systems has been improved by using a secondary feedback loop, and the gain/frequency characteristic of the coder has been equalised. The overall signal/noise characteristic of this hybrid system is found to be better than those of all other unidigit systems; it is inferior to the conventional p.c.m. system only for bit rates higher than 60 × 103 bit/s.     

面向H.264/SVC空域-质量域可伸缩编码的码率分配算法

 针对H.264/SVC空域-质量域可伸缩性,本文提出了一种基于模型的多层次码率优化分配算法.通过分析各编码层间的相关性,对空域和质量域视频层的码率和失真特性进行了建模.在此基础上,将H.264/SVC空域-质量域两维度码率分配问题描述为一个两阶段最优化问题进行求解.最后,代入提出的率失真模型,使用拉格朗日乘数法,求取该分配问题的最优数值解.大量实验结果可以看出新的率失真模型所提供的高效码率分配算法,大幅度提高了现有参考代码JSVM的性能.     

4-phase p.s.k. differential demodulator using a.s.w. delay lines

The letter describes a cheap and reliable solution, using acousticsurface-wave delay lines, for the differential demodulation of phase-shift-keyed digital signals at low digital rates (up to 20 Mbit/s). Results on 4-phase p.s.k. differential demodulators operating at 2.048 Mbit/s are reported in terms of bit error rate against energy per bit/noise spectral density ratio. In addition, using the same technology, a new multidifferential demodulator has been implemented. Owing to multiple differential demodulations carried out on the same signal, a significant improvement in both theoretical and experimental bit error rate is obtained.     

Novel design of travelling-wave FET

In the letter we propose a novel travelling-wave FET, in which an additional image gate is placed beside the drain of the FET as a phase velocity synchroniser. Small-signal analysis is given in the light of coupled wave theory and shows that the device is capable of high gain and wide bandwidth amplification. The easy adjustment of phase synchronisation and compability of the conventional FET fabrication technique make it promising for high-frequency distributed amplification.     

Design for a high-speed m.o.s. associative memory

An experimental 64-bit m.o.s. associative memory has been developed from a limit-case design study. Speeds in excess of 50 MHz are reported at a cost per bit that could approach eight times that for a conventional m.o.s. dynamic r.a.m. The design of the basic associative memory cell is described.     

Reducing quantising noise in p.c.m. coders

An analogue-feedback method has been developed to reduce quantising noise in p.c.m. systems. The improvement in signal/noise ratio, however, depends on the loop delay, saturation limit of the coder and the number of digits used. The overall characteristics of the feedback p.c.m. systems have been found to be better than those of the conventional p.c.m. for bit rates up to 50 × 103 bit/s.     

Adaptive bit loading scheme using COFDM at low elevation over LEOsatellite communication channel

Much interest has been shown in employing LEO satellite communication systems. A novel algorithm is proposed for adaptive bit loading (multilevel modulation assignment) between COFDM subcarriers in a frequency selective fading channel. Two-dimensional alignment has been carried out. The system performance is greatly improved at low elevation angles compared to that using fixed bit loading. Furthermore. The comparison shows that this adaptive bit loading COFDM system is suitable for frequency selective slow fading channels, which have time-varying deep nulls in the frequency response     

Duobinary transmission with p-i-n f.e.t. optical receivers

Duobinary transmission in a fibre optic system using a p-i-n f.e.t. high impedance receiver has been investigated theoretically and practically. For high bit rates the method gives a sensitivity improvement of 1.5 dB compared to a binary system operating at the same information rate.     

Digital stereo FM modulator

A digital FM modulator, incorporating a digital stereo generator, has been built using a direct digital synthesiser with a variable bit output. Simulations and hardware experiments have been used to show that a 10 bit output is sufficient to produce demodulated signals with signal to distortion ratios of more than 80 dB     

The electrical century. I. Introduction and overview

A little bit of close inspection reveals that not only the beginning and end of our century but every decade in between has been underpinned by electrical, electronic, or computing technologies of monumental importance. No one would deny that even the technologies we associate most closely with our nuclear and space ages are themselves dependent on electronics and computing. In all, this truly has been the century of electrical and computing engineering. To celebrate the accomplishments of the Electrical Century, the IEEE History Center have launched a series of articles looking back at 100 years of electrical history and pointing the way to the future     

精细分级编码在H.264视频编码中的一种实现

介绍了分级编码方法的基本原理,对几种典型实用的精细分级编码算法作了总结分析,并在此基础上实现了一个支持精细分级编码(FGS)的H.264编解码器,对FGS码流在基于IP的Intemet网络上的传输性能进行了研究.实验结果表明,该方案具有良好效果.     

Experiment in frequency-shift-keying adjacent-channel interference

The error performance of a frequency-shift-keying system is investigated experimentally in the presence of Gaussian noise and adjacent-channel interference. It has been found that, for a peak-to-peak frequency deviation of 0.7 times the bit rate and a receiver bandwidth of 1.0 times the bit rate, the frequency spacing between channels can be set to about 1.6 times the bit rate without causing an undue amount of performance degradation.     

Postprocessing of low bit-rate block DCT coded images based on a fields of experts prior.

Transform coding using the discrete cosine transform (DCT) has been widely used in image and video coding standards, but at low bit rates, the coded images suffer from severe visual distortions which prevent further bit reduction. Postprocessing can reduce these distortions and alleviate the conflict between bit rate reduction and quality preservation. Viewing postprocessing as an inverse problem, we propose to solve it by the maximum a posteriori criterion. The distortion caused by coding is modeled as additive, spatially correlated Gaussian noise, while the original image is modeled as a high order Markov random field based on the fields of experts framework. Experimental results show that the proposed method, in most cases, achieves higher PSNR gain than other methods and the processed images possess good visual quality. In addition, we examine the noise model used and its parameter setting. The noise model assumes that the DCT coefficients and their quantization errors are independent. This assumption is no longer valid when the coefficients are truncated. We explain how this problem can be rectified using the current parameter setting.     

Adjacent-channel interference in f.s.k. transmission

The performance of a frequency-shift-keying system is investigated as a function of the amount of adjacent-channel interference. New quantitative results are presented which show that, for a peak-to-peak frequency deviation of 0.7 times the bit rate and a receiver bandwidth of one times the bit rate, the frequency separation between channels can be reduced to about 1.6 times the bit rate without causing an undue amount of performance degradation.