Trellis: Portability across architectures with a high-level framework

The increasing computational needs of parallel applications inevitably require portability across parallel architectures, which now include heterogeneous processing resources, such as CPUs and GPUs, and multiple SIMD/SIMT widths. However, the lack of a common parallel programming paradigm that provides predictable, near-optimal performance on each resource leads to the use of low-level frameworks with architecture-specific optimizations, which in turn cause the code base to diverge and makes porting difficult. Our experiences with parallel applications and frameworks lead us to the conclusion that achieving performance portability requires a common set of high-level directives and efficient mapping onto each architecture.     

Integrated cognitive architectures: a survey

This article aims to present an account of the state of the art research in the field of integrated cognitive architectures by providing a review of six cognitive architectures, namely Soar, ACT-R, ICARUS, BDI, the subsumption architecture and CLARION. We conduct a detailed functional comparison by looking at a wide range of cognitive components, including perception, memory, goal representation, planning, problem solving, reasoning, learning, and relevance to neurobiology. In addition, we study the range of benchmarks and applications that these architectures have been applied to. Although no single cognitive architecture has provided a full solution with the level of human intelligence, important design principles have emerged, pointing to promising directions towards generic and scalable architectures with close analogy to human brains.     

Stability assessment of aspect-oriented software architectures: A quantitative study

Design of stable software architectures has increasingly been a deep challenge to software developers due to the high volatility of their concerns and respective design decisions. Architecture stability is the ability of the high-level design units to sustain their modularity properties and not succumb to modifications. Architectural aspects are new modularity units aimed at improving design stability through the modularization of otherwise crosscutting concerns. However, there is no empirical knowledge about the positive and negative influences of aspectual decompositions on architecture stability. This paper presents an exploratory analysis of the influence exerted by aspect-oriented composition mechanisms in the stability of architectural modules addressing typical crosscutting concerns, such as error handling and security. Our investigation encompassed a comparative analysis of aspectual and non-aspectual decompositions based on different architectural styles applied to an evolving multi-agent software architecture. In particular, we assessed various facets of components’ and compositions’ stability through such alternative designs of the same multi-agent system using conventional quantitative indicators. We have also investigated the key characteristics of aspectual decompositions that led to (in)stabilities being observed in the target architectural options. The evaluation focused upon a number of architecturally-relevant changes that are typically performed through real-life maintenance tasks.     

FPGA and CPLD architectures: a tutorial

This tutorial surveys commercially available, high-capacity field-programmable devices. The authors describe the three main categories of FPDs: simple and complex programmable logic devices, and field-programmable gate arrays. They then give architectural details of the most important chips and example applications of each type of device     

The effects of scaffolded computerized science problem-solving on achievement outcomes: a comparative study of support programs

Abstract   This study examined the effect of scaffolding learning components in a computerized environment, for students solving qualitative science problems in a simulation of laboratory experiments. Four scaffolding components were identified (structural, reflective, subject-matter and enrichment) and used in different configurations to construct four unique cognitive and meta-cognitive support programs based on human teaching. These ranged from low (Enrichment) to full support (Integrated). We compared the scaffolded groups with one another and with a non-scaffolded control group. A 'mathematics and reading comprehension' questionnaire was used to divide the participants ( n  = 473) into ability levels. At different points of time, achievement outcomes were measured by three open-ended subject-matter questionnaires, tapping knowledge and understanding. The findings indicate differential effects of the support programs mostly in the following order: Integrated > Strategic > Operative >  Enrichment > Control. The structural component seems to be a sine qua non for success and has a consistent and powerful influence. The combination of reflection and structural components, however, are needed for superior achievement. Both reflection and subject-matter components work cumulatively over time.     

Development of service-oriented architectures using model-driven development: A mapping study

ContextModel-Driven Development (MDD) and Service-Oriented Architecture (SOA) are two challenging research areas in software engineering. MDD is about improving software development whilst SOA is a service-based conceptual development style, therefore investigating the available proposals in the literature to use MDD when developing SOA may be insightful. However, no studies have been found with this purpose.ObjectiveThis work aims at assessing the state of the art in MDD for SOA systems. It mainly focuses on: what are the characteristics of MDD approaches that support SOA; what types of SOA are supported; how do they handle non-functional requirements.MethodWe conducted a mapping study following a rigorous protocol. We identified the representative set of venues that should be included in the study. We applied a search string over the set of selected venues. As result, 129 papers were selected and analysed (both frequency analysis and correlation analysis) with respect to the defined classification criteria derived from the research questions. Threats to validity were identified and mitigated whenever possible.ResultsThe analysis allows us to answer the research questions. We highlight: (1) predominance of papers from Europe and written by researchers only; (2) predominance of top-down transformation in software development activities; (3) inexistence of consolidated methods; (4) significant percentage of works without tool support; (5) SOA systems and service compositions more targeted than single services and SOA enterprise systems; (6) limited use of metamodels; (7) very limited use of NFRs; and (8) limited application in real cases.ConclusionThis mapping study does not just provide the state of the art in the topic, but also identifies several issues that deserve investigation in the future, for instance the need of methods for activities other than software development (e.g., migration) or the need of conducting more real case studies.     

Model formulation as a problem-solving task: Computer-assisted engineering modeling

A central purpose of knowledge acquisition technology is to assist with the formulation of domain models that underlie knowledge systems. In this article we examine the model formulation process itself as a problem-solving task. Drawing from AI research in qualitative reasoning about physical systems, we characterize the model formulation task in terms of the inputs, the reasoning subtasks, and the knowledge needed to perform the problem solving. We describe the elements of a high-level representation of modeling knowledge, and techniques for providing intelligent assistance to the model builder. Applying the results from engineering modeling to knowledge acquisition in general, we identify properties of the representation that facilitate the construction of knowledge systems from libraries of reusable models. © 1993 John Wiley & Sons, Inc.     

An empirical study of team behaviour in a complex and dynamic problem-solving context: a discussion of methodological and analytical aspects

Research issues in the development of methodology and analysis techniques to study how nuclear power plant operators cope with multi-fault incidents are discussed. Simulation was selected as the best means of observing operator behaviour. Factors which influence the retention of realism in the simulation scenario are described. A post-simulation commentary technique was used to obtain data to support the analysis of cognitive processes. The influence of such questions concerning the unit of behaviour, the classification, organization, and assessment of operator behaviour and the associated terminology on die development of the analysis techniques is discussed.     

Embedding learning in behaviour-based architectures: a conceptual approach

This paper addresses the identification of the key elements to be present in a generic, behaviour-based architecture for robot control. These elements include the definition of behaviours aiming at rough task execution and the use of learning to improve the performance of the primitive behaviour set. Experimental results, with real and simulated systems, to demonstrate cooperative behaviour between a mobile platform and a manipulator are presented.     

Biswapped networks: a family of interconnection architectures with advantages over swapped or OTIS networks

We propose a new family of communication architectures called ‘biswapped networks’. Given any n-node basis network Ω, the associated biswapped network Bsw(Ω) is built of 2n copies of Ω, using a simple rule for connectivity that ensures desirable attributes, including regularity, modularity, fault tolerance, and algorithmic efficiency. In particular, if Ω is a Cayley digraph, then so is Bsw(Ω). Our biswapped connectivity provides a systematic scheme for synthesizing large, scalable, modular, and robust parallel architectures. Furthermore, many desirable attributes of the underlying basis network Ω are preserved, as the Bsw(Ω) parameters are related to the corresponding parameters of Ω. We obtain a number of results on internode distances, Hamiltonian cycles, optimal routing, and node-disjoint paths for Bsw(Ω). We explore the relations between biswapped and swapped or optical transpose interconnection system (OTIS) networks, which may use a mix of electronic and optical links. In particular, we demonstrate that the biswapped connectivity removes an inherent asymmetry of swapped/OTIS networks, as well as the attendant complications in analyses and applications. Finally, we show that biswapped networks are complementary to, and offer advantages over, well-known and widely used interconnection architectures for parallel processing.     

Locally recurrent globally feedforward networks: a critical reviewof architectures

In this paper, we will consider a number of local-recurrent-global-feedforward (LRGF) networks that have been introduced by a number of research groups in the past few years. We first analyze the various architectures, with a view to highlighting their differences. Then we introduce a general LRGF network structure that includes most of the network architectures that have been proposed to date. Finally we will indicate some open issues concerning these types of networks.     

Optofluidics: a novel generation of reconfigurable and adaptive compact architectures

The integration of microfluidics and microphotonics brings the ability to tune and reconfigure ultra-compact optical devices. This flexibility is essentially provided by three characteristics of fluids that are scalable at the micron-scale: fluid mobility, large ranges of index modulation, and abrupt interfaces that can be easily reshaped. Several examples of optofluidic devices are presented here to illustrate the achievement of flexible devices on (semi) planar and compact platforms. First, we report an integrated geometry for a compact and tunable interferometer that exploits a sharp and mobile air/water interface. We then describe a class of optically controlled devices that rely on the actuation of optically trapped micron-sized objects within a fluid environment. The last architecture results from the infiltration of photonic crystal devices with fluids. This produces tunable and reconfigurable photonic devices, like optical switches. Higher degrees of functionality could be achieved with sophisticated optofluidic platforms that associate complex microfluidic delivery and mixing schemes with microphotonic devices. Moreover, optofluidics offers new opportunities for realizing highly responsive and compact sensors.     

Reliability analysis of on-chip communication architectures: An MPEG-2 video decoder case study

In this paper, we present reliability analysis and comparison between on-chip communication architectures: dominant shared-bus AMBA and emerging Network-on-Chip (NoC); in the presence of single-event upsets (SEUs) using MPEG-2 video decoder as a case study. Employing SystemC-based fault simulations, reliability of the decoders is studied in terms of SEUs experienced in the computation cores and communication interconnects. We show that for a given soft error rate (SER), NoC-based decoder experiences lower SEUs than AMBA-based decoder. Using peak signal-to-noise ratio (PSNR) and frame error ratio (FER) metrics to evaluate the impact of SEUs at application-level, we show that NoC-based decoder gives up to 4 dB higher PSNR, while AMBA experiences up to 3% lower FER. Furthermore, we investigate the impact of routing, application task mapping (distribution of tasks among computation cores) and architecture allocation (choice of number of computation cores) on the reliability of the decoders in the presence of SEUs.     

A comparative study of hardware architectures for lightweight block ciphers

A hardware-based performance comparison of lightweight block ciphers is conducted in this paper. The DESL, DESXL, CURUPIRA-1, CURUPIRA-2, HIGHT, PUFFIN, PRESENT and XTEA block ciphers have been employed in this comparison. Our objective is to survey what ciphers are suitable for security in Radio Frequency Identification (RFID) and other security applications with demanding area restrictions. A general architecture option has been followed for the implementation of all ciphers. Specifically, a loop architecture has been used, where one basic round is used iteratively. The basic performance metrics are the area, power consumption and hardware resource cost associated with the implementation resulting throughput of each cipher. The most compact cipher is the 80-bit PRESENT block cipher with a count of 1704 GEs and 206.4 Kbps, while the largest in area cipher is the CURUPIRA-1. The CURUPIRA-1 cipher consumes the highest power of 118.1 μW, while the PRESENT cipher consumes the lowest power of 20 μW. All measurements have been taken at a 100 kHz clock frequency.     

Interface, instructional approach, and domain learning with a mathematics problem-solving environment

In this paper, we conceptualize computer-based instruction (CBI) as involving both a primary task, learning a particular domain, and several secondary tasks centered around learning to use the instructional approach and manipulate the interface efficiently. We argue that the complexity and compatibility of the domain, instructional approach, and system interface separately and interactively influence the ease with which students are able to learn the subject matter. Examples show how looking at CBI in this way provides a framework for better understanding the results of some previous studies of CBI and CBI-related interface design. We also describe an experiment that attempted to dissociate the separate effects of these components on domain learning. The experiment examined the pretest-posttest performance differences of remedial subjects who learned to solve mathematics word problems.     

Consumer applications: a driving force for high-level synthesis ofsignal-processing architectures

An overview of design alternatives for the translation of signal processing systems into silicon addresses for digital signal processing in consumer applications is presented. Since the most appropriate approach varies with the life-cycle phase of the application, the alternatives range from general-purpose to application-specific approaches. The architectures of the Piramid compiler, which supports digital audio, low-end digital video, telecommunications, speech processing, and control applications, and the Phideo compiler, which supports digital video applications such as HDTV in which sampling rates typically approach the maximum feasible clock rates in state-of-the-art CMOS fabrication processes, are discussed