近红外波段Ge光电探测器的研究进展

随着光通信技术的发展,如何制备能与Si基电路单片集成的响应波长在1.3和1.55 μm的高性能光电探测器成为研究热点.总结了SiGe组分变化的缓冲层技术、低温缓冲层技术以及选区外延这三种主流的Ge材料外延技术,介绍了pin结构、金属-半导体-金属(MSM)结构、雪崩光电二极管(APD)结构以及pin结构和MSM结构与光波导集成这四种不同结构的Ge光电探测器,并从这些不同结构的器件制备技术方面阐述了近红外波段Ge光电探测器的研究进展及其应用.     

Ge/SiGe异质结构肖特基源漏MOSFET

制备了氧化铪(HfO2)高k介质栅Si基Ge/SiGe异质结构肖特基源漏场效应晶体管(SB-MOSFET)器件,研究了n型掺杂Si0.16Ge0.84层对器件特性的影响,分析了n型掺杂SiGe层降低器件关态电流的机理。使用UHV CVD沉积系统,采用低温Ge缓冲层技术进行了材料生长,首先在Si衬底上外延Ge缓冲层,随后生长32 nm Si0.16Ge0.84和12 nm Ge,并生长1 nm Si作为钝化层。使用原子力显微镜和X射线衍射对材料形貌和晶体质量进行表征,在源漏区沉积Ni薄膜并退火形成NiGe/Ge肖特基结,制备的p型沟道肖特基源漏MOSFET,其未掺杂Ge/SiGe异质结构MOSFET器件的空穴有效迁移率比相同工艺条件制备的硅器件的高1.5倍,比传统硅器件空穴有效迁移率提高了80%,掺杂器件的空穴有效迁移率与传统硅器件的相当。     

与CMOS兼容的硅基波导型光电探测器的研究

硅基波导型光电探测器作为一类重要的光电探测器,由于其能与标准的CMOS工艺兼容以及制备工艺简单等性能,因而在光电子单片集成方面具备广阔的市场应用前景.文章着重阐述了通过离子注入引入深能级、Ge/Si自组装岛、SOI波导共振腔增强和AlGaInAs-Si混合集成等四种方式来制备硅基光电探测器的研究现状和研究进展,并对四类器件的结构,制作工艺和光电性能指标进行了详细地介绍.     

硅缓冲层提高选区外延生长硅基锗薄膜质量

研究了Si缓冲层对选区外延Si基Ge薄膜的晶体质量的影响。利用超高真空化学气相沉积系统,结合低温Ge缓冲层和选区外延技术,通过插入Si缓冲层,在Si/SiO_2图形衬底上选择性外延生长Ge薄膜。采用X射线衍射(XRD)、扫描电子显微镜(SEM)、原子力显微镜(AFM)表征了Ge薄膜的晶体质量和表面形貌。测试结果表明,选区外延Ge薄膜的晶体质量比无图形衬底外延得到薄膜的晶体质量要高;选区外延Ge薄膜前插入Si缓冲层得到Ge薄膜具有较低的XRD曲线半高宽以及表面粗糙度,位错密度低至5.9×10~5/cm^2,且薄膜经过高低温循环退火后,XRD曲线半高宽和位错密度进一步降低。通过插入Si缓冲层可提高选区外延Si基Ge薄膜的晶体质量,该技术有望应用于Si基光电集成。     

金属Al与半导体Ge欧姆接触的制备和表征

基于圆形传输线模型,通过测试样品的比接 触电阻率和电流-电压(I-V)特性曲线,分析 对比了Al与Si基上外延生长的p型Ge、n型Ge和n型Si的接触特性。实验结果发现,由于金 属与Ge材料接触存在强烈的费米钉效应,导致金属与n型Ge接触有高的接触电阻,难实 现低的比接触电阻率;而Al与p型Ge在掺杂浓度为4.2×10¹⁸ cm－3时,并且经过退火,比接 触电阻率能达到4.0×10－7 Ω·cm²;Al与n型Ge和n型Si接 触电极相比,后者可形成良好的 欧姆接触,其比接触电阻率较n型Ge接触降低了1个量级,经合金化处理后的Al/n⁺Si接触 电阻率能达到5.21×10－5 Ω·cm²,达到了制作高性能Ge 光电器件的要求。     

硅基外延锗金属-半导体-金属光电探测器及其特性分析

利用超高真空化学汽相淀积(UHV/CVD)设备,以低温下生长的薄的Si1-xGex和Ge作为缓冲层,在Si(100)衬底上外延出表面平整(粗糙度＜1 nm)、位错密度低(＜5×105 cm-2、厚度约为500 nm的高质量纯Ge层.Ge层受到由于Si和Ge热膨胀系数不同引入的张应变,应变大小约为0.2%.以外延的Ge层为吸收区、在硅基上制备了台面面积为195×150 μm2的金属-半导体-金属(MSM)光电探测器.在-1 V偏压下,暗电流为2.4×10-7 A;在零偏压下,光响应波长范围扩展到1.6 μm以上.     

硅基IV族光电器件研究进展(二)——光电探测器

基于Ge、GeSn等IV族材料的硅基探测器与Si CMOS工艺兼容性好,成本低廉,并且易于与硅基波导器件集成,因而具有非常重要的应用价值。介绍了中国科学院半导体研究所在相关硅基IV族合金材料外延制备及相关器件方面的研究,重点介绍在硅基Ge面入射探测器、波导型探测器、吸收电荷倍增分离型(SACM)结构雪崩光电探测器以及GeSn光电探测器方面的一些研究进展。     

Si基Ge波导光电探测器的制备和特性研究

以外延Ge薄膜为吸收区,在Si基上制备了Ge波导光电探测器。利用超高真空化学汽相淀积(UHV/CVD)设备,采取低温高温两步法,在Si(100)衬底上外延出厚度约为500nm的高质量纯Ge层。探测器采用脊型波导结构,Al电极分别制作在波导的台面上下形成背对背肖特基结。I-V特性测试表明,在-1V偏压下,暗电流密度为0.2mA/cm2。由于Si与Ge热失配引起外延的Ge薄膜受到0.2%张应变,减小了Ge带隙,光响应波长范围扩展到1.60μm以上。在70mW、1.55μm入射光照射下,测得光电流比暗电流高出近1个数量级。     

用于共振腔光电探测器的Si基Bragg反射器

Si基共振腔型光电探测器的关键工艺是隐埋Bragg反射器镜面的制备.用PECVD方法在Si衬底上制备了SiOxNy/Si Bragg反射器,研究了Bragg反射器的反射谱和退火行为.     

用于共振腔光电探测器的Si基Bragg反射器

Si基共振腔型光电探测器的关键工艺是隐埋Bragg反射器镜面的制备.用PECVD方法在Si衬底上制备了SiOxNy/SiBragg反射器,研究了Bragg反射器的反射谱和退火行为.     

Research progress of Si-based germanium materials and devices

Si-based germanium is considered to be a promising platform for the integration of electronic and photonic devices due to its high carrier mobility, good optical properties, and compatibility with Si CMOS technology. However, some great challenges have to be confronted, such as: (1) the nature of indirect band gap of Ge; (2) the epitaxy of dislocation-free Ge layers on Si substrate; and (3) the immature technology for Ge devices. The aim of this paper is to give a review of the recent progress made in the field of epitaxy and optical properties of Ge heterostructures on Si substrate, as well as some key technologies on Ge devices. High crystal quality Ge epilayers, as well as Ge/SiGe multiple quantum wells with high Ge content, were successfully grown on Si substrate with a low-temperature Ge buffer layer. A local Ge condensation technique was proposed to prepare germanium-on-insulator (GOI) materials with high tensile strain for enhanced Ge direct band photoluminescence. The advances in formation of Ge n⁺p shallow junctions and the modulation of Schottky barrier height of metal/Ge contacts were a significant progress in Ge technology. Finally, the progress of Si-based Ge light emitters, photodetectors, and MOSFETs was briefly introduced. These results show that Si-based Ge heterostructure materials are promising for use in the next-generation of integrated circuits and optoelectronic circuits.     

硅基锗PIN光电探测器的研究进展

随着硅基锗薄膜外延技术的突破,基于硅基锗材料的光电子器件快速发展,其中以硅基锗光电探测器最为突出。由于锗可以实现近红外通信波段的光吸收,而且完全兼容硅的CMOS工艺,硅基锗探测器几乎成为硅基光探测的唯一选择。文章主要介绍了面入射和波导耦合两类常见硅基锗光电探测器的研究进展,包括典型的器件结构,以及提升响应度和带宽等性能的主要途径。     

UHV/CVD法生长硅基低位错密度厚锗外延层

采用超高真空化学气相淀积系统,以高纯Si2 H6和GeH4作为生长气源,用低温缓冲层技术在Si(001)衬底上成功生长出厚的纯Ge外延层.对Si衬底上外延的纯Ge层用反射式高能电子衍射仪、原子力显微镜、X射线双晶衍射曲线和Ra-man谱进行了表征.结果表明在Si基上生长的约550nm厚的Ge外延层,表面粗糙度小于1nm,XRD双晶衍射曲线和Ra-man谱Ge-Ge模半高宽分别为530'和5.5cm-1,具有良好的结晶质量.位错腐蚀结果显示线位错密度小于5×105cm-2可用于制备Si基长波长集成光电探测器和Si基高速电子器件.     

Ge/Si Self-Assembled Quantum Dots and Their Optoelectronic Device Applications

In recent years, quantum dots have been successfully grown by self-assembling processes. For optoelectronic device applications, the quantum-dot structures have advantages such as reduced phonon scattering, longer carrier lifetime, and lower detector noise due to low-dimensional confinement effect. Comparing to traditional optoelectronic III-V and other materials, self-assembled Ge quantum dots grown on Si substrates have a potential to be monolithically integrated with advanced Si-based technology. In this paper, we describe the growth of self-assembled, guided Ge quantum dots, and Ge quantum-dot superlattices on Si. For dot growth, issues such as growth conditions and their effects on the dot morphology are reviewed. Then vertical correlation and dot morphology evolution are addressed in relation to the critical thickness of Ge quantum-dot superlattices. In addition, we also discuss the quantum-dot p-i-p photodetectors (QDIPs) and n-i-n photodetectors for mid-infrared applications, and the quantum-dot p-i-n photodetectors for 1.3-1.55 mum for communications applications. The wavelength of SiGe p-i-p QDIP can be tuned by the size as grown by various patterning methods. Photoresponse is demonstrated for an n-i-n structure in both the mid-infrared and far-infrared wavelength ranges. The p-i-n diodes exhibit low dark current and high quantum efficiency. The characteristics of fabricated light-emitting diode (LED) devices are also discussed, and room-temperature electroluminescence is observed for Ge quantum-dot LED. The results indicate that Ge dot materials are potentially applicable for mid-infrared (8-12 mum) detectors as well as fiber-optic (1.3-1.55 mum) communications.     

NiSi/Si界面的剖面透射电镜研究

采用不同硅化工艺制备了NiSi薄膜并用剖面透射电镜(XTEM)对样品的NiSi/Si界面进行了研究.在未掺杂和掺杂(包括As和B)的硅衬底上通过物理溅射淀积Ni薄膜,经快速热处理过程(RTP)完成硅化反应.X射线衍射和喇曼散射谱分析表明在各种样品中都形成了NiSi.还研究了硅衬底掺杂和退火过程对NiSi/Si界面的影响.研究表明:使用一步RTP形成NiSi的硅化工艺,在未掺杂和掺As的硅衬底上,NiSi/Si界面较粗糙;而使用两步RTP形成NiSi所对应的NiSi/Si界面要比一步RTP的平坦得多.高分辨率XTEM分析表明,在所有样品中都形成了沿衬底硅〈111〉方向的轴延-NiSi薄膜中的一些特定晶面与衬底硅中的(111)面对准生长.同时讨论了轴延中的晶面失配问题.     

Doping and processing epitaxial GexSi1−x films on Si(100) by ion implantation for Si-based heterojunction devices applications

The question of whether one can effectively dope or process epitaxial Si(100)/GeSi heterostructures by ion implantation for the fabrication of Si-based heterojunction devices is experimentally investigated. Results that cover several differention species (B, C, Si, P, Ge, As, BF₂, and Sb), doses (10¹³ to 10¹⁶/cm²), implantation temperatures (room temperature to 150°C), as well as annealing techniques (steady-state and rapid thermal annealing) are included in this minireview, and the data are compared with those available in the literature whenever possible. Implantation-induced damage and strain and their annealing behavior for both strained and relaxed GeSi are measured and contrasted with those in Si and Ge. The damage and strain generated in pseudomorphic GeSi by room-temperature implantation are considerably higher than the values interpolated from those of Si and Ge. Implantation at slightly elevated substrate temperatures (e.g., 100°C) can very effectively suppress the implantation-induced damage and strain in GeSi. The fractions of electrically active dopants in both Si and GeSi are measured and compared for several doses and under various annealing conditions. Solid-phase epitaxial regrowth of GeSi amorphized by implantation has also been studied and compared with regrowth in Si and Ge. For the case of metastable epi-GeSi amorphized by implantation, the pseudomorphic strain in the regrown GeSi is always lost and the layer contains a high density of defects, which is very different from the clean regrowth of Si(100). Solid-phase epitaxy, however, facilitates the activation of dopants in both GeSi and Si, irrespective of the annealing techniques used. For metastable GeSi films that are not amorphized by implantation, rapid thermal annealing is shown to outperform steady-state annealing for the preservation of pseudomorphic strain and the activation of dopants. In general, defects generated by ion implantation can enhance the strain relaxation process of strained GeSi during post-implantation annealing. The processing window that is optimized for ion-implanted Si, therefore, has to be modified considerably for ion-implanted GeSi. However, with these modifications, the mature ion implantation technology can be used to effectively dope and process Si/GeSi heterostructures for device applications. Possible impacts of implantation-induced damage on the reliability of Si/GeSi heterojunction devices are briefly discussed.     

N-type implantation doping of GaN

Doping characteristics of N/Si and N/Ge co-implanted GaN have been systematically investigated. N-type regions were produced in undoped GaN films by the co-implantation and subsequent annealing with an SiO₂ encapsulation layer at high temperatures. The annealing procedures above 1100 and 1200°C were required to achieve an n-type activation for N/Si and N/Ge co-implanted GaN, respectively. The both samples show effective activation efficiencies of 50% after annealing at 1300°C. However, actual Si activation seems to be much higher than the Ge activation due to the different behaviors of implantation-induced damage.     

Study of NiSi/Si Interface by Cross-Section Transmission Electron Microscopy

采用不同硅化工艺制备了NiSi薄膜并用剖面透射电镜(XTEM)对样品的NiSi/Si界面进行了研究.在未掺杂和掺杂(包括As和B)的硅衬底上通过物理溅射淀积Ni薄膜,经快速热处理过程(RTP)完成硅化反应.X射线衍射和喇曼散射谱分析表明在各种样品中都形成了NiSi.还研究了硅衬底掺杂和退火过程对NiSi/Si界面的影响.研究表明:使用一步RTP形成NiSi的硅化工艺,在未掺杂和掺As的硅衬底上,NiSi/Si界面较粗糙;而使用两步RTP形成NiSi所对应的NiSi/Si界面要比一步RTP的平坦得多.高分辨率XTEM分析表明,在所有样品中都形成了沿衬底硅〈111〉方向的轴延-NiSi薄膜中的一些特定晶面与衬底硅中的(111)面对准生长.同时讨论了轴延中的晶面失配问题.