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1.
Posbist reliability theory is based on the possibility assumption and the binary-state assumption. In this paper we discuss posbist reliability behaviour of fault-tolerant systems, including cold redundant systems and warm redundant systems. In each type of fault-tolerant systems, the conversion switchs may behave in different ways, such as absolutely reliable, non-absolutely reliable with 0–1 mode, non-absolutely reliable with continuous mode. So the system posbist reliability behaviour varies. We express the system posbist reliability in terms of a system lifetime. When the system posbist reliability exhibits as a fuzzy variable in itself, we redefine the system posbist reliability by use of a new expression.  相似文献   

2.
Application of Boole's inequality results in a simple lower bound for system reliability in terms of reliabilities of subsystems for a k-out-of-n:G system. No assumptions regarding statistical dependence or independence of the outcomes (success or failure) for the subsystems are used. The no assumption lower bound for pure series or parallel systems has been previously published, but the more general case of the title has been overlooked. On the other hand, using the assumption of association of the outcomes, the lower bound in this paper can be improved upon slightly as shown in Barlow and Proschan (1981)  相似文献   

3.
An interdependence among individual knowledge items makes any development of large reliability knowledge bases difficult. The key problem is to maintain a reasonable level of internal consistency in spite of heterogeneity of different knowledge items. A fairly general and efficient formal tools are presented in [1, 2]. They have been used for evaluation of an internal (in)consistency (represented e.g. by a level of chaos) of industrial knowledge bases. The only precondition for their application is an ability to distinguish between specific and general fuzzy items. A realistic case study (control valves) is presented in details.  相似文献   

4.
In this paper it is presented a new method to compute reliability characteristics of repairable m-out-of-n systems by arbitrary distributed time to failure and time to repair. The method allows to consider the systems with large number of units and does not take much computational times.  相似文献   

5.
The authors address the issue of optimal design (in terms of the number of processors) of a distributed system which is based on a recursive algorithm for fault tolerance (RAFT). The reliability and performance of the system using RAFT are determined as a function of reliability of individual processors and the number of fault modes in a processor. Also discussed are how to determine the design policies when the objective is to minimize the average system failure. Several numerical examples illustrate the results  相似文献   

6.
A method is presented for software reliability estimation that is input-domain based. It was developed to overcome some of the difficulties in using existing reliability models in critical applications. The method classifies the faults that could be in a software program. Then it accounts for the distribution over the input-domain of input values which could activate each fault-type. The method assumes that these distributions change, by reducing their extent, with the number of test cases correctly executed. Using a simple example, the paper suggests a convenient fault classification and a choice of distributions for each fault-type. The introduction of the distributions permit better use of the information collected during the testing phase  相似文献   

7.
High computing capabilities and limited number of input/output pins of modern integrated circuits require an efficient and reliable interconnection architecture. The proposed communication scheme allows a large number of IP cores to send data over a single wire using logic code division multiple access (LCDMA) technique. Reliability is increased by using hardware redundancy, and three LCDMA-based fault tolerant designs are proposed: (a) duplication with logic comparison (DLC), (b) conventional triple modular redundancy (TMR), and (c) triple modular redundancy with sign voter (TSV). With aim to detect a received bit from chip sequence, LCDMA–DLC and LCDMA–TSV designs compare absolute values of the sums, while LCDMA–TMR compares only sign bits of the sums generated at the outputs of decoders. All proposed designs are implemented in FPGA and ASIC technologies. MATLAB simulation results show that increasing the length of spreading codes affects to an increase in reliability. A comparative analysis of the proposed fault tolerant designs in terms of hardware complexity, latency, power consumption and error detecting and correcting capability is conducted. It is shown that LCDMA–DLC design has lower hardware overhead and power consumption, with satisfactory better bit error rate (BER) performance, in comparison to LCDMA–TMR and LCDMA–TSV approach.  相似文献   

8.
为了在多学科系统中深入研究可靠性分析方法,同时考虑到不确定性因素的影响,将模拟退火算法与可靠性分析相结合,提出一种新的基于模拟退火的协同优化可靠性分析方法。详细介绍了该方法的模型、数学表达式及算法流程,并以实际算例加以验证。算例结果表明该方法用来进行多学科环境下的可靠性分析时,比蒙特卡罗法更加计算准确,并且降低了计算成本。  相似文献   

9.
鲁靖  卞树檀 《电子设计工程》2013,21(17):153-155
针对产品同一状态信息的融合问题,提出了基于证据理论的多个验后信息加权融合法。该方法在充分考虑多个验后分布一致度的基础上,结合D-S证据理论计算权重因子,再通过加权融合法的一般思路得到一个综合的验后分布形式,进一步提高了统计推断的精度和置信度,最后以实例计算验证了方法的有效性和可行性。  相似文献   

10.
A combined performance and reliability (performability) measure for gracefully degradable fault-tolerant systems is introduced and a closed-form, analytic solution is provided for computing the performability of a class of unrepairable systems which can be modeled by general acyclic Markov processes. This allows the study of models which consider the degradation of more than one type of system component, e.g. processors, memories, buses. An efficient evaluation algorithm is provided, with an extensive analysis of its time and space complexity. A numerical example is provided which shows how the combined performance/reliability measure provides for a complete evaluation of the relative merits of different multiprocessor structures  相似文献   

11.
This paper presents a novel application of recurrent neural network (RRN) to fault-tolerant control (FTC) of automated sequential manufacturing systems (ASMS) subject to sensor faults. Two RRNs are employed: the first one acts as an I/O relations recognizer and is able to detect faulty sensors and the latter is used as an inverse model of the AMSM to compute the desired control action in a faulty case according to nominal specifications. The learning process of these networks is carried out based on training data generated from the healthy manufacturing system controlled by a programmable logic controller (PLC). Design of the proposed fault-tolerant control system (FTCS) scheme is based on utilizing the two RNNs, a reconfigurable controller and a fault decision subsystem. The design procedure of the proposed FTCS is introduced. The proposed FTCS has been implemented and tested experimentally for a benchmark industrial ASMS subject to single or multiple faulty sensors. Experimental results show the effectiveness of the procedure for a real simple plant. In addition, the results prove these features of the proposed FTCS: (a) effectively improving the faulty control system behaviors, (b) accomplishing its proper functionality in handling single and multiple sensor faults, (c) identifying the sensor faults, and (d) being advantageous in reducing the complexity of the hardware redundancy.  相似文献   

12.
For the shock model (t) = E{ N(t)}, where {N(t), t 0} is a renewal process having the inter-arrival distribution F(t) with a finite mean, we discuss its bounds under the cases as below: (i) F(t) is IFR (DFR). (ii) F(t) is NBUE(NWUE) and obtain more concise results for some specific cases. These results are useful in life testing and quality control management.  相似文献   

13.
An expert system for diagnosing rough ride problems in heavy trucks has been developed and can be used on a personal computer. The system operates on two levels of knowledge data base: shallow — acquired from truck service personnel and causal obtained from a multiprobe vibration analysis system (MVAS) through a preprocessing neural network. The justification for selecting neural networks is presented as are virtues and drawbacks of the developed system.  相似文献   

14.
This paper presents a bound dynamic programming for solving reliability optimization problems, in which the optimal solution is obtained in the bound region of the problem by using dynamic programming. This algorithm is based on the studies of the characters of the problem and Misra [IEEE Trans. Reliability 40, 81–91 (1991)] bound search technique. With some examples, the proposed algorithm has been found to be more economical and effective than Misra integer programming to obtain the exact solutions of reliability redundancy optimization problems.  相似文献   

15.
This paper presents the concept of the bound region and proposes a solution method for the nonlinear integer programming refined from the optimal allocation of redundant components, which optimal solution has been proved in the bound region of the problem. In this method, any heuristic technique could be used to obtain a new and better bound point from any given bound point in the bound region. With some examples, the effect of the new algorithm and existing methods are compared. The results show that our method is better than any existing heuristic methods and can obtain optimal solutions in most cases.  相似文献   

16.
Mean time to failure (MTTF) is one of the most frequently used dependability measures in practice. By convention, MTTF is the expected time for a system to reach any one of the failure states. For some systems, however, the mean time to absorb to a subset of the failure states is of interest. Therefore, the concept of conditional MTTF may well be useful. In this paper, we formalize the definition of conditional MTTF and cumulative conditional MTTF with an efficient computation method in a finite state space Markov model. Analysis of a fault-tolerant disk array system and a fault-tolerant software structure are given to illustrate application of the conditional MTTF.  相似文献   

17.
This paper presents a newly developed probability tree procedure to evaluate reliability of three-state device networks. Reliability networks containing four and five independent and non-identical units are studied with the aid of probability tree approach. Independent unit network configurations such as series, parallel, series-parallel, parallel-series and bridge are analyzed. Expressions for system reliability, open mode and short mode failure probabilities are developed.  相似文献   

18.
We extend a low-rate improvement of the random coding bound on the reliability of a classical discrete memoryless channel (DMC) to its quantum counterpart. The key observation that we make is that the problem of bounding below the error exponent for a quantum channel relying on the class of stabilizer codes is equivalent to the problem of deriving error exponents for a certain symmetric classical channel.  相似文献   

19.
This paper describes a statistical approach to simulating the reliability of systems with HBT devices. Compared to the conventional worst-case method, the described approach utilizes statistical reliability information of the HBT individual devices, along with analysis on the critical paths of the system, to provide more accurate and more comprehensive reliability evaluation of the systems utilizing HBT devices.  相似文献   

20.
Caches, which are comprised much of a CPU chip area and transistor counts, are reasonable targets for transient single and multiple faults induced from energetic particles. This paper presents: (1) a new fault detection scheme for tag arrays of cache memories and (2) an architectural cache to improve performance as well as dependability. In this architecture, cache space is divided into sets of different sizes and different tag lengths. Using the proposed fault detection scheme, i.e., GParity, when single and multiple errors are detected in a word, the word is rewritten by its correct data from memory and its GParity code is recomputed. The error detection scheme and the cache architecture have been evaluated using a trace driven simulation with soft error injection and SPEC 2000 applications. Moreover, reliability and mean-time-to-failure (MTTF) equations are derived and estimated. The results of GParity code are compared with those of other protection codes and memory systems without redundancies and with single parity codes. The results show that error detection improvement varies between 66% and 96% as compared with the already available single parity in microprocessors.  相似文献   

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