A unified SPICE compatible average model of PWM converters

A simple, unified, and topology-independent model of basic pulse-width modulated (PWM) power converters is developed using the switched inductor approach presented by S. Ben-Yaakov (1989). The model is compatible with SPICE or other similar general-purpose electronic circuit simulators. It can be used to simulate DC, small signal, and transient behavior of PWM converters operating in both discontinuous conduction mode (DCM) and continuous conduction mode (CCM). During simulation, the model automatically follows the CCM and DCM operation, with fewer convergence problems compared to previous simulation models. An effective measurement technique using the HP3562A dynamic signal analyzer (DSA) is presented and applied to compare simulation runs with experimental data. The two were found to be in good agreement     

Averaged modeling of PWM converters operating in discontinuousconduction mode

Various aspects of averaged modeling of hard-switching pulse-width modulated (PWM) converters operating in the discontinuous conduction mode (DCM) are studied. A more streamlined modeling procedure is proposed which serves as a general framework for comparing different models. A duty ratio constraint that defines the diode conduction interval is identified to be the key to accurate prediction of high-frequency behavior. A new duty-ratio constraint is proposed that leads to full-order averaged models of DCM converters. Numerical analyses and experimental measurements confirm that the new models correctly predict the small-signal responses up to one third of the switching frequency and are more accurate than all previous models. Moreover, new analytical results are included to show the origin of the high-frequency pole in DCM operation and to explain why the full-order model is capable of accurately predicting it. Averaged circuit counterparts of the new models are developed in the form of averaged switch models to facilitate circuit simulation     

Estimative current mode control technique for DC-DC converters operating in discontinuous conduction mode

A new control technique for DC-DC converters is introduced and applied to a boost converter operating in discontinuous conduction mode (DCM). In contrast to conventional control methods, the principal idea of the proposed control scheme is to obtain samples of the required signals and estimate the required switch-on time. The proposed technique is applicable to any converter operating in DCM, including power factor correctors (PFC), however, this letter mainly focuses on boost topology. In this letter, the main mathematical concept of a new control algorithm is introduced, as well as the robustness investigation of the proposed method with simulation and experimental results.     

The electrothermal macromodel of voltage mode PWM controllers for SPICE

In the paper the problem of modelling PWM voltage mode controllers for SPICE is considered. SPICE library isothermal macromodel and a new form of the authors' electrothermal (including selfheating) macromodel of SG3525A controller are presented and compared. To illustrate the correctness and usefulness of these macromodels, some results of measurements and calculations of SG3525A controller operating in the catalogue test circuit and in the real BOOST converter are given as well.     

Switch failure diagnosis based on inductor current observation for boost converters

Face to the growing number of applications using DC–DC power converters, the improvement of their reliability is subject to an increasing number of studies. Especially in safety critical applications, designing fault-tolerant converters is becoming mandatory. In this paper, a switch fault-tolerant DC–DC converter is studied. First, some of the fastest Fault Detection Algorithms (FDAs) are recalled. Then, a fast switch FDA is proposed which can detect both types of failures; open circuit fault as well as short circuit fault can be detected in less than one switching period. Second, a fault-tolerant converter which can be reconfigured under those types of fault is introduced. Hardware-In-the-Loop (HIL) results and experimental validations are given to verify the validity of the proposed switch fault-tolerant approach in the case of a single switch DC–DC boost converter with one redundant switch.     

A design method for paralleling current mode controlled DC-DC converters

This paper proposes a new current sharing method. It is based on current mode controlled dc-dc converters and achieves the current sharing by forcing all inner current loops to have the same current reference. Meanwhile, this method decouples control loops from the voltage regulation and current-sharing regulation instead of adding control loops as in traditional master-slave methods. Therefore, the large signal performance is good while its stability is guaranteed. Further, unlike multi-module methods, the modularity of single dc-dc converter is retained. Design rules and small signal analysis are presented. The advantages of the proposed method are verified by experimental results.     

BiCMOS circuits for high speed current mode D/A converters

A new BiCMOS current cell and a BiCMOS current switch for high speed, self-calibrating, current-steering D/A converters are described. The BiCMOS current cell can be realized in a BiCMOS process or in a conventional CMOS process using a substrate PNP transistor, while the BiCMOS current switch is intended for implementation in a BiCMOS process. The performance of these circuits has been demonstrated in 0.8 μm BiCMOS and 1.2-μm CMOS technologies. A detailed noise analysis of the BiCMOS current cell indicates that noise during the calibration phase limits its relative accuracy to about 150 ppm. This is substantiated by measured results which show a relative matching of about 100-150 ppm, which is the equivalent of about 13 b performance. Measurement results also indicate that the absolute accuracy of the BiCMOS current cell is better than 0.5% over the designed current range, which is better than that of previously reported designs. Test results for the BiCMOS current switch indicate that a 10-90% switching time of 0.9 ns has been achieved. Furthermore, the switching time of the new BiCMOS switch is very insensitive to current level and input waveform compared to conventional CMOS switches. A 4-b D/A converter based on these components has been fabricated, and test results have demonstrated that it is functional. This DAC will be used as the internal DAC of a ΣΔ modulator for over-sampled video and digital radio applications     

A refined nonlinear averaged model for constant frequency currentmode controlled PWM converters

A refined, duo-mode model for current programmed buck power converters is presented. The refined model uses a form of the current mode control law which is truly invariant with respect to operating conditions. That is, it is valid for both transient and steady-state operating conditions regardless of the converter operating mode, which could be either continuous conduction mode (CCM) or discontinuous conduction mode (DCM). The large-signal transient response predicted using the refined average model is shown to be virtually indistinguishable, in an average sense, from that predicted using a pulse-by-pulse simulation. The refined model is shown to exhibit improved high-frequency accuracy in both time and frequency domains. The model has been implemented in SPICE 2G6 and runs with default analysis options     

A comparison of parallel resonant converters operating in laggingpower factor mode

Three different parallel resonant converter (PRC) configurations are compared for their performance. The discontinuous capacitor voltage mode is emphasized in the comparison and is shown not to exist in the case of PRC with the resonating capacitor on the primary side of the high-frequency (HF) transformer. It is further shown that the condition for discontinuous capacitor voltage (DCV) mode in the case of a PRC with the assumption of an ideal HF transformer and a PRC with secondary-side resonance differ only in the ratio M/(M+L+L_p), which is equal to 1.0 for PRCs with the assumption of an ideal HF transformer. The comparison study shows that the PRC with the resonating capacitor on the primary side of a nonideal HF transformer is more appropriate for low-voltage high-current applications, while the PRC with resonating capacitor on the secondary side of a nonideal HF transformer is better suited to supply large-voltage medium- and low-current loads. Experimental results obtained from prototype units designed and built are presented to support the theory     

Unified model of PWM switch including inductor in DCM

The conventional small-signal circuit model in the discontinuous conduction mode (DCM) shows large discrepancies at high frequencies. A new unified small-signal circuit model of the pulsewidth modulation (PWM) switch including inductor in the DCM is proposed to overcome the inaccuracy of the conventional small-signal circuit model     

A sliding mode current control scheme for PWM brushless DC motordrives

This paper proposes a sliding mode current control scheme for pulsewidth modulation (PWM) brushless DC motor drives. An improved “equivalent control” method is used in this scheme. A simple algorithm is proposed that differs from the original equivalent control method, which requires extensive calculation to estimate the load parameters. This algorithm can be implemented using logic circuits. Moreover, using autotuning, the proposed algorithm can be applied without load information. An operating principle for the power stage switching devices called single-side firing is also proposed. Single-side firing solves the dead-time problem, allowing the PWM frequency to be increased and the sampling rate to be raised. This paper explains the current control algorithm, single-side firing principle, and implementation of the proposed scheme in detail. Simulations and experimental results are given to show the validity of this scheme     

A ZCT auxiliary commutation circuit for interleaved boost converters operating in critical conduction mode

This paper investigates a power-factor-corrector (PFC) circuit based on interleaved boost converters in critical conduction mode (C-DCM) with a zero current transition (ZCT) circuit. By using the interleaved converters technique, the input current ripple is minimized, and due to the operation in C-DCM, the main switches turn-on occurs naturally under zero current and the reverse recovery losses of the diodes are minimized. The use of auxiliary commutation circuits provides ZCT at main switches turn-off, minimizing the related turn-off losses. The command circuit of the converters has been implemented by using a single erasable programmable logic device (EPLD) EPM7128SLC84-15. Operating principles, theoretical analysis, design guidelines and a design example are described and verified experimentally by a 1.2 kW prototype. Finally, the measured losses in the PFC interleaved boost converters with and without the proposed ZCT commutation cell, as well as a previously published ZCT cell are presented and discussed.     

A general unified large signal model for current programmedDC-to-DC converters

A general and unified large signal averaged circuit model for current programmed DC-to-DC converters is proposed. In the averaged circuit model, the active switch is modeled by a current source, with its value equal to the averaged current flowing through it, and the diode is modeled hy the voltage source, with its value equal to the averaged voltage across it. The averaged circuit model has the same topology as the switching converter. The large signal averaged circuit model for current programmed buck, boost, buck-boost and Cuk converters are proposed, from which the large signal characteristics can be obtained. The steady-state and small signal transfer functions of the current programmed DC-to-DC converters can all be derived from their large signal averaged circuit models. The large signal characteristics of the current programmed buck converter are studied by both the phase plane trajectory and the time domain analysis. Experimental prototypes for a current programmed buck converter, with and without an input filter, are breadboarded to verify the analysis     

A true ZCZVT commutation cell for PWM converters

This paper introduces a true zero-current and zero-voltage transition (ZCZVT) commutation cell for DC-DC pulsewidth modulation (PWM) converters operating with an input voltage less than half the output voltage. It provides zero-current switching (ZCS) and zero-voltage switching (ZVS) simultaneously, at both turn on and turn off of the main switch and ZVS for the main diode. The proposed soft-switching technique is suitable for both minority and majority carrier semiconductor devices and can be implemented in several DC-DC PWM converters. The ZCZVT commutation cell is placed out of the power path, and, therefore, there are no voltage stresses on power semiconductor devices. The commutation cell consists of a few auxiliary devices, rated at low power, and it is only activated during the main switch commutations. The ZCZVT commutation cell, applied to a boost converter, has been analyzed theoretically and verified experimentally. A 1 kW boost converter operating at 40 kHz with an efficiency of 97.9% demonstrates the feasibility of the proposed commutation cell     

A new approach to the modeling of converters for SPICE simulation

An approach to the modeling of DC-DC converters for SPICE simulation is developed in which the average current in the energy-storage inductor is first simulated in a SPICE subcircuit for both the continuous and discontinuous modes of operation. The inductor current is then weighted and redistributed to related branches of the circuit to simulate the average input and output currents of the converter. Based on this technique, various converter models, including that of the Cuk converter with coupled inductors, which are valid for both continuous and discontinuous modes of operation, are developed     

On the modeling of PWM converters for large signal analysis indiscontinuous conduction mode

Several methods have been developed until today for the analysis of PWM converters operating in discontinuous conduction mode (DCM) and many endeavours have been done in order to solve two well known problems: the nontrivial calculation of the internally controlled instant at which the current flowing into the diode falls to zero and the subsequent order reduction of the state-space model of the circuit due to the disappearance of one state variable. In this work a new approach to the modeling of PWM converters for the large signal analysis in DCM operation is presented. It is based on a closed-form discrete-time state-space model obtained by introducing a time-adaptive function for the calculation of the instant at which the diode current falls to zero, and an equivalent fictitious configuration of the circuit during the idle phase, in order to prevent the unconditioned order reduction of the state-space model. A four-terminal device is also introduced which allows a unified representation of the PWM buck, boost, buck-boost, and Cuk converters in DCM operation using the fictitious configuration. The model proposed can be used for circuit oriented simulations both in open and closed loop operation and for an accurate ripple inspection, automatically accounting for DCM to CCM (continuous conduction mode) transitions and vice versa     

基于Verilog-A的一种电流模PWM开关电源的大信号模型

首先,本文以Buck变换器为例通过观察其大信号参数在CCM和DCM模式下的相互关系,建立了兼容两种工作模式的电流模PWM开关电源的大信号模型。随后,本文利用Verilog-A语言以模块化形式描述了该大信号模型。通过与晶体管级仿真对比实验和理论计算,本文验证了该模型具有评估系统动态特性、方便判断系统工作模式、计算系统占空比等大信号参数的优点。最后通过与Ridley模型的仿真结果对比,验证了本文所提出的采用该模型做小信号分析方法的有效性。     

Sensorless current mode control-an observer-based technique forDC-DC converters

Sensorless current mode (SCM) control is an observer method that provides the operating benefits of current mode control without current sensing. SCM has significant advantages over both conventional peak and average current-mode control techniques in noise susceptibility and dynamic range in both continuous mode and discontinuous mode. The method supports line and bulk load regulation, and reduces control complexity to a single loop. It also supports conventional two-loop control for tight load regulation. Encompassing one-cycle control as a special case, the general SCM method is a public domain control technique     

Switched link PWM current source converters with harmonicelimination at the mains

Novel switched link pulse-width-modulated (PWM) current source converters are presented. These converters supply a controlled DC current to the load with a concurrent elimination of selected harmonics in the AC mains. The new topologies permit minimal constraints to be formulated resulting in significantly more efficient PWM patterns than hitherto reported in the literature. A higher number of harmonics are thus eliminated at the mains for a given switching frequency while maintaining a control capability of the output DC current in a wide range. Simulation results confirm the theoretical findings. Also discussed in the paper is the selection of capacitor filters to mitigate the residual harmonics     

Numerical state-space average-value modeling of PWM DC-DC converters operating in DCM and CCM

State-space average-value modeling of pulsewidth modulation converters in continuous and discontinuous modes has received significant attention in the literature, and various models have been developed. This paper presents a new approach for generating the state-space average-value model. In the proposed methodology, the so-called duty-ratio constraint and the correction term are extracted numerically using the detailed simulation and are expressed as nonlinear functions of the duty cycle and average-value of the fast state variable. The parasitic effects of circuit elements are readily included. The resulting average-value model is compared to a hardware prototype, a detailed simulation, and several previously published models. The proposed model is shown to be very accurate in predicting the large-signal time-domain transients as well as the small-signal frequency-domain characteristics.