The frequency tuning characteristics of transistor voltage‐controlled oscillators with distributed parameters

The frequency varactor tuning characteristics of voltage‐controlled oscillators (VCO) on elements with distributed parameters are analysed and presented in a generalized form. The recommendations on the choice of transmission line type, circuit and varactor parameters for the purposes of widening and linearization of the voltage frequency tuning characteristics are given. Large amounts of numerical and experimental results are performed to illustrate the theoretical assumptions. Copyright © 1999 John Wiley & Sons, Ltd.     

A 4.8–6.8 GHz low phase noise LC VCO in 0.13‐µm CMOS technology

This letter presents a novel LC voltage controlled oscillator (VCO) supporting the high‐speed serial transmission standard of RapidIO in 0.13‐µm complementary metal‐oxide semiconductor technology. The low phase noise is achieved through several techniques including current source switching, parallel coupled negative transconductance cell, and varactor bias combination scheme. Measured results of proposed circuit show a low phase noise of ?120 dBc/Hz at 1 MHz offset from 6.25 GHz carrier and tuning range of 4.8 ~ 6.8 GHz (34.48%) while consuming 7.4 mW under the supply voltage of 1.2 V. Copyright © 2015 John Wiley & Sons, Ltd.     

Optimum design of high power and high efficiency mm‐wave fundamental oscillators

A systematic method to design high power and high efficiency mm‐wave fundamental oscillators is presented. By using a linear time variant method, we first obtain the optimum conditions and show that these conditions can be significantly different for high power and high efficiency fundamental oscillation. Next, we propose a modified multistage ring oscillator with interstage passive networks to exploit the full capacity of the transistors in terms of output power or efficiency. Analytical expressions are also derived to determine the value of passive elements used in the oscillator. To verify the validity of the method, a 77‐GHz two‐stage (differential) VCO is designed in a 65‐nm CMOS process. Careful electromagnetic and circuit simulations demonstrate that the designed VCO has 2‐GHz tuning range, maximum output power of 10.5 dBm and maximum DC to RF efficiency of 24.1%. The designed VCO shows 54.8% and 108.7% improvement in terms of maximum output power and efficiency compared with a conventional cross‐coupled VCO with the same tuning range.     

宽带低相噪分立VCO的设计

压控振荡器(VCO)在通信、雷达、测试仪器等领域中的应用非常广泛,但宽带调谐、低相噪一直是VcO设计的瓶颈.通过对负阻原理的分析,根据三极管的等效电路参数采用准线性法对最佳谐振元件进行了估算,从而提高了对VCO设计的准确性和时效性.由变容二极管对和PC电感组成的并联谐振网络,实现了宽带调谐、低相噪,并对三次谐波分量有所...     

A study of parallel tuner with voltage‐dependent capacitance

A study of varactor tuned LC circuits is presented. Nonlinear time domain circuit differential equation is rewritten in terms of phase plane variables, which can then be solved in closed form. General expressions are derived, which are applicable to any capacitance–voltage relationship. Two types of circuit structures, namely single‐ended and balanced, with MOS diodes as the variable capacitance elements, are specifically considered. The nature of the voltage waveforms across the two circuits is determined by phase plane plots. Variation of voltage with time is calculated numerically. It is shown that the voltage waveform for the single‐ended circuit is asymmetric, with higher harmonics present. Furthermore, the fundamental resonant frequency is dependent on amplitude of oscillation and could decrease to 94% of its small signal value for large voltage swings. Near 34% control over frequency is calculated, for a bias voltage range of 8 to 1. On the other hand, the balanced structure results in symmetric voltage waveform, with negligible harmonic content. Dependence of frequency on amplitude is weak, only decreasing to 98% of its small signal value, for the largest swings. The tuning range is marginally improved by the balanced structure. The results are compared with those obtained from Fourier‐based calculations and experimental data in literature, and good agreement is obtained. Copyright © 2011 John Wiley & Sons, Ltd.     

Memristor‐based voltage‐controlled relaxation oscillators

This paper introduces two voltage‐controlled memristor‐based reactance‐less oscillators with analytical and circuit simulations. Two different topologies which are R‐M and M‐R are discussed as a function of the reference voltage where the generalized formulas of the oscillation frequency and conditions for oscillation for each topology are derived. The effect of the reference voltage on the circuit performance is studied and validated through different examples using PSpice simulations. A memristor‐based voltage‐controlled oscillator (VCO) is introduced as an application for the proposed circuits which is nano‐size and more efficient compared to the conventional VCOs. Copyright © 2013 John Wiley & Sons, Ltd.     

A 3.6‐mW 6‐GHz current‐reuse VCO‐buffer with improved load drivability in 65‐nm CMOS

A new current‐reuse voltage‐controlled oscillator (VCO)‐buffer with enhanced load drivability is proposed. It incorporates a PMOS‐based source follower stacked atop a NMOS‐based LC VCO to share the bias current, while preventing the voltage stress at any oscillation node from exceeding the 1.2‐V technology voltage limit. Also, ac‐coupling networks are avoided between the VCO and buffer, improving the Q of the LC tank while minimizing parasitics. With internal buffering, the VCO can directly drive up a 50‐Ω load for testing, or to withstand a large capacitive load in on‐chip local oscillator distribution, particularly suitable for multi‐band MIMO WLAN radios . The fabricated VCO‐buffer in 65‐nm CMOS measures 13.8% tuning range from 5.64 to 6.4 GHz, consumes 3.6 mW at 1.2 V and exhibits ?108.84 dBc/Hz phase noise at 1‐MHz offset. Copyright © 2013 John Wiley & Sons, Ltd.     

LLC resonant DC–DC converter with series‐connected primary windings of transformer

This paper proposes a zero‐voltage switching (ZVS) LLC resonant step up DC–DC converter with series‐connected primary windings of the transformer. The series resonant inverter in the proposed topology has two power switches (MOSFETs), two resonant capacitors, two resonant inductors, and only one transformer with center‐tapped primary windings. The power switches are connected in the form of a half‐bridge network. Resonant capacitors and inductors along with the primary windings of the transformer form two series resonant circuits. The series resonant circuits are fed alternately by operating the power switches with an interleaved half switching cycle. The secondary winding of transformer is connected to a bridge rectifier circuit to rectify the output voltage. The converter operates within a narrow frequency range below the resonance frequency to achieve ZVS, and its output power is regulated by pulse frequency modulation. The converter has lower conduction and switching losses and therefore higher efficiency. The experimental results of a 500‐W prototype of proposed converter are presented. The results confirm the good operation and performance of the converter. © 2014 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.     

Series resonant high‐voltage DC–DC converter with reduced component count

This paper proposes a novel zero‐current‐switching series resonant high‐voltage DC–DC converter with reduced component count. The series resonant inverter in the proposed topology has two power switches (insulated‐gate bipolar transistors, IGBTs), two resonant capacitors, and only one high‐voltage transformer (HVT) with center‐tapped primary windings. The power switches are connected in the form of a half‐bridge network. The leakage inductances of the transformer's primary windings together with the resonant capacitors form two series resonant circuits. The series resonant circuits are fed alternately by operating the power switches with interleaved half switching cycle. The secondary winding of the HVT is connected to a bridge rectifier circuit to rectify the secondary voltage. The converter operates in the discontinuous conduction mode (DCM) and its output voltage is regulated by pulse frequency modulation. Therefore, all the power switches turn on and off at the zero‐current switching condition. The main features of the proposed converter are its lower core loss, lower cost, and smaller size compared to previously proposed double series resonant high voltage DC–DC converters. The experimental results of a 130‐W prototype of the proposed converter are presented. The results confirm the excellent operation and performance of the converter. © 2016 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.     

A novel prototype of auxiliary edge resonant bridge leg link snubber‐assisted soft‐switching sine‐wave PWM inverter

This paper proposes a new circuit topology of the three‐phase soft‐switching PWM inverter and PFC converter using IGBT power modules, which has the improved active auxiliary switch and edge resonant bridge leg‐commutation‐link soft‐switching snubber circuit with pulse current regenerative feedback loop as compared with the typical auxiliary resonant pole snubber discussed previously. This three‐phase soft‐switching PWM double converter is more suitable and acceptable for a large‐capacity uninterruptible power supply, PFC converter, utility‐interactive bidirectional converter, and so forth. In this paper, the soft‐switching operation and optimum circuit design of the novel type active auxiliary edge resonant bridge leg commutation link snubber treated here are described for high‐power applications. Both the main active power switches and the auxiliary active power switches achieve soft switching under the principles of ZVS or ZCS in this three‐phase inverter switching. This three‐phase soft‐switching commutation scheme can effectively minimize the switching surge‐related electromagnetic noise and the switching power losses of the power semiconductor devices; IGBTs and modules used here. This three‐phase inverter and rectifier coupled double converter system does not need any sensing circuit and its peripheral logic control circuits to detect the voltage or the current and does not require any unwanted chemical electrolytic capacitor to make the neutral point of the DC power supply voltage source. The performances of this power conditioner are proved on the basis of the experimental and simulation results. Because the power semiconductor switches (IGBT module packages) have a trade‐off relation in the switching fall time and tail current interval characteristics as well as the conductive saturation voltage characteristics, this three‐phase soft‐switching PWM double converter can improve actual efficiency in the output power ranges with a trench gate controlled MOS power semiconductor device which is much improved regarding low saturation voltage. The effectiveness of this is verified from a practical point of view. © 2006 Wiley Periodicals, Inc. Electr Eng Jpn, 155(4): 64–76, 2006; Published online in Wiley InterScience ( www.interscience.wiley.com ). DOI 10.1002/eej.20207     

A linear,ultra wideband,low‐power, 2.1–5 GHz,VCO

A linear, Ultra Wideband, low‐power VCO, suitable for UWB‐FM applications is proposed, forming the main part of a UWB‐FM transmitter. The VCO is designed in TSMC 90thinspacenm digital CMOS process and includes a Source‐Coupled Multivibrator, used as current‐controlled oscillator (CCO) which generates output frequencies between 2.1 and 5 GHz and a voltage‐to‐current (V‐to‐I) converter which translates the VCO input voltage modulation signal to current. Two single‐ended inverter buffers are employed to drive either a differential or a single‐ended UWB antenna. The presented VCO is designed for 1 V power supply and exhibits a linear tuning range of 2.1–5 GHz, a differential output power of ?7.83 dBm±0.78 dB and low power consumption of 8.26 mW, including the output buffers, at the maximum oscillation frequency. It is optimized for a very high ratio of tuning range (81.69%) over power consumption equal to 9.95 dB. The desired frequency band of 3.1–5 GHz for UWB‐FM applications is covered for the entire industrial temperature range (?40 to 125^°C). Copyright © 2010 John Wiley & Sons, Ltd.     

A low‐power delay stage ring VCO based on wrap‐gate CNTFET technology for X‐band satellite communication applications

Over the past few years, with lower power consumption, reasonable layout area, and the ease of integration with standard circuit design technologies compared to the other counterparts, delay stage ring voltage‐controlled oscillators (VCOs) have been in the limelight of microelectronics scientists. However, few efforts have focused on representing high‐performance delay stage ring VCOs in the deep nanometric regime. In this regard, by virtue of outstanding electrical properties of carbon nanotube wrap‐gate transistors, this work aims to propose a carbon nanotube field‐effect transistor (CNTFET)–based delay stage ring VCO. After performing rigorous simulations, the proposed ring VCO which has been designed by 10‐nm gate‐all‐around (GAA) CNTFET technology shows suitable electrical performance metrics. The simulation results demonstrate that the proposed GAA‐CNTFET‐based ring VCO consumes 85.176 μW at with a 6.12‐ to 10.42‐GHz frequency tuning range. At the worst‐case noise conditions, the proposed design presents ‐90.747 dBc/Hz phase noise at 1 MHz offset frequency. With occupying 1.414 μm² physical area, the proposed VCO is appropriate for the ultracompact nanoscale radio frequency apparatus. Our simulation results accentuate that with further improvements and commercializing the fabrication techniques for CNTFET transistors, the proposed GAA‐CNTFET‐based VCO can be considered as a potential candidate for X‐band satellite communication applications.     

Hyperchaotic behaviour of two bi‐directionally coupled Chua's circuits

In this paper, a non‐linear bi‐directional coupling of two Chua's circuits is presented. The coupling is obtained by using polynomial functions that are symmetric with respect to the state variables of the two Chua's circuits. Both a transverse and a tangent system are studied to ensure a global validity of the results in the state space. First, it is shown that the transverse system is an autonomous Chua's circuit, which directly allows the evaluation of the conditions on its chaotic behaviour, i.e. the absence of synchronization between the coupled circuits. Moreover, it is demonstrated that the tangent system is also a Chua's circuit, forced by the transverse system; therefore, its dynamics is ruled by a time‐dependent equation. Thus, the calculus of conditional Lyapunov exponents is necessary in order to exclude antisynchronization along the tangent manifold. The properties of the transverse and tangent systems simplify the study of the coupled Chua's circuits and the determination of the conditions on their hyperchaotic behaviour. In particular, it is shown that hyperchaotic behaviour occurs for proper values of the coupling strength between the two Chua's circuits. Finally, numerical examples are given and discussed. Copyright © 2002 John Wiley & Sons, Ltd.     

Control and performance of a zero‐current‐switched,three‐phase PWM inverter equipped with resonant circuits on the ac side

This paper presents a zero‐current‐switched voltage‐fed inverter equipped with resonant circuits on the ac side. The current flowing through a switching device, that is, IGBT, is the sum of the load current and the resonant current. When the amplitude of the resonant current is larger than that of the load current, the current in the switching device becomes zero at an instant in each resonant cycle. This allows the switching device to be turned on or off at the zero current. The zero‐current switching makes a significant contribution to reduction of switching losses and electromagnetic noises. In this paper, the principle of zero‐current‐switching operation, along with a novel control scheme, is described from a theoretical and practical point of view. Experimental results obtained from a laboratory system of 5 kVA verify the practicability. Moreover, the switching and conduction losses of the proposed soft‐switched inverter are compared with those of a conventional hard‐switched inverter. © 2000 Scripta Technica, Electr Eng Jpn, 131(4): 85–95, 2000     

LC‐active VCO for CMOS RF transceivers

A novel fully integrated CMOS LC tank VCO is presented. The LC tanks are implemented by exploiting the active circuit ‘boot‐strapped inductor’ (BSI), which behaves like a high‐quality factor inductor. Particularly, the LC tanks have been implemented by introducing a new version of the CMOS BSI circuit, which provides better versatility and design reliability. In order to verify the effectiveness of such an approach, a case study for 5–6 GHz direct‐conversion multi‐standard WLAN transceivers is presented. The VCO has been designed in a 0.35µm standard CMOS technology. The new BSI exhibits a high‐quality factor (higher than 25 over the all frequency range) and provides a high selectivity without introducing a relevant excess of noise, for a better spectral purity and a lower phase noise (PN) of the VCO. The overall VCO circuit consumes 9 mW. The VCO produces an oscillation in the tuning range from 4.91 to 5.93 GHz (nearly equal to 19%). The circuit exhibits a PN of ?129dBc/Hz at 1 MHz of frequency offset from the central frequency (5.4 GHz) and a FOM equal to 189.5 dBc/Hz at 100 kHz and 194.1 dBc/Hz at 1 MHz of frequency offset, respectively. Copyright © 2009 John Wiley & Sons, Ltd.     

A high output power and low phase noise GaN HEMT VCO with array of switchable inductors

This paper presents cross‐coupled voltage‐controlled oscillators (VCOs) involving array of switchable inductors (i.e., N  = 1 and N  = 2 switchable inductors) and implemented using gallium‐nitride high electron mobility transistors on Si substrate technology for worldwide interoperability for microwave access applications. Band selection and coarse frequency tuning were achieved using the array of switchable inductors, whereas fine tuning was controlled using varactors. Two bands were obtained using the one‐stage switchable inductor VCO operating in the ranges 3.41–3.57 GHz and 3.85–3.94 GHz. The VCO output power (P_out) was 21.8 dBm at 3.57 GHz from a 10‐V power supply. Four continuous bands were obtained using the two‐stage switchable inductors VCO operating in the range of 3.16–3.4, 3.25–3.64, 3.48–3.71 and 3.64–3.9 GHz, respectively. An additional band was generated by fine‐tuning the inductance through mutual coupling between the transmission line and one of the inductors. The proposed two‐stage switchable inductors VCO provided a 21% tuning range at frequencies ranging with a control voltage ranging from 12 to 20 V, a low phase noise of −123 dBc/Hz at a 1‐MHz offset from a 3.3‐GHz carrier and a P_out of 21 dBm at 3.5 GHz from a 10‐V power supply. Copyright © 2017 John Wiley & Sons, Ltd.     

A proposal for high‐performance CCII‐based analogue CMOS design

A novel fully differential CMOS second‐generation current conveyor (CCII) topology is presented. It can be considered as a universal fully differential programmable active element. The circuit operates in moderate inversion region, and features high linearity over a wide input range. Current gain between terminals X and Z can be continuously tuned in a wide range. These features are essential to extend the utilization of CCII‐based circuits to high‐performance VLSI applications. Analogue design based on this new cell is illustrated by various examples. The proposed CCII has been fabricated in a 0.5‐µm CMOS technology and its main performance characteristics have been measured. They are in good agreement with theory and demonstrate that operation in moderate inversion can lead to distortion levels much lower than those achieved in strong inversion. Experimental results for a Tow–Thomas biquadratic filter fabricated on the same chip are also presented, showing continuous frequency tuning in more than a decade. Copyright © 2005 John Wiley & Sons, Ltd.     

Double‐Switch Series‐Resonant Cell‐Voltage Equalizer Using a Voltage Multiplier for Series‐Connected Energy Storage Cells

Series connections of energy storage cells, such as lithium‐ion cells and electric double‐layer capacitors (EDLCs), require cell‐voltage equalizers to ensure years of operation. Conventional equalizers require multiple switches, magnetic components, and/or secondary windings of a multiwinding transformer in proportion to the number of series connections, which usually makes them complex, expensive, bulky, and less extendable with increasing series connections. A double‐switch series‐resonant equalizer using a voltage multiplier is proposed in this paper. The double‐switch operation without a multiwinding transformer achieves simplified circuitry and good modularity at reduced size and cost, compared to conventional equalizers. Operational analyses were separately performed for the following two functional parts of the proposed equalizer: a series‐resonant inverter and a voltage multiplier. The mathematical analyses derived a dc‐equivalent circuit of the proposed equalizer, with which simulation analyses of even an hour's duration can be completed in an instant. Simulation analyses were separately performed for both the original and equivalent circuits. The simulation results of the derived circuit correlated well with those of the original circuit, thus verifying the derived dc‐equivalent circuit. A 5‐W prototype of the proposed equalizer was built for eight cells connected in series and an experimental equalization was performed for series‐connected EDLCs from an initially voltage‐imbalanced condition. The voltage imbalance was gradually eliminated over time, and the standard deviation in the cell voltages decreased to approximately 5 mV at the end of the experiment, thus demonstrating the equalization performance of the proposed equalizer.     

Design and implementation of switched coil LC‐VCOs in the GHz range using the self‐inductance technique

This paper presents the design and implementation of dual‐band LC‐VCOs in the GHz‐range featuring a switched coil LC‐tank. The proposed design exploits the self‐inductance technique. The design of the coil starts from simple considerations and back‐of‐the‐envelope calculations, then electromagnetic simulations are used to optimize the coil layout. The sizing of the switch and its impact on the VCO performance are addressed as well. The VCOs have been implemented in 65 nm CMOS technology. Good correlation between simulated and measured tuning range and phase noise is obtained for all designs, thus confirming the validity and robustness of the design methodology and coil models. Copyright © 2013 John Wiley & Sons, Ltd.     

Wide‐band divide‐by‐2 injection‐locked frequency divider using MOSFET mixers DC‐biased in subthreshold region

A novel wide locking range divide‐by‐2 injection‐locked frequency divider (ILFD) is proposed in the paper and was implemented in the TSMC 0.18‐µm 1P6M CMOS process. The divide‐by‐2 ILFD is based on a cross‐coupled voltage‐controlled oscillator (VCO) with an LC resonator and injection MOSFETs with source voltage coupled from ILFD output, and the injection MOSFET mixer is biased in subthreshold region. At the drain–source bias of 0.9 V, and at the incident power of 0 dBm the locking range of the divide‐by‐2 ILFD is 6.4 GHz; from the incident frequency 3.7 GHz to 10.1 GHz, the percentage is 92.75%. The core power consumption is 16.56 mW. The die area is 0.839 × 0.566 mm². Copyright © 2015 John Wiley & Sons, Ltd.