Vacuum lamination approach to fabrication of high-performance single-crystal organic field-effect transistors

A novel vacuum lamination approach to fabrication of high-performance single-crystal organic field-effect transistors has been developed. The non-destructive nature of this method allows a direct comparison of field-effect mobilities achieved with various gate dielectrics using the same single-crystal sample. The method also allows gating delicate systems, such as n -type crystals and SAM-coated surfaces, without perturbation.     

Parallel core-shell metal-dielectric-semiconductor germanium nanowires for high-current surround-gate field-effect transistors

Core-shell germanium nanowires (GeNW) are formed with a single-crystalline Ge core and concentric shells of nitride and silicon passivation layer by chemical vapor deposition (CVD), an Al2O3 gate dielectric layer by atomic layer deposition (ALD), and an Al metal surround-gate (SG) shell by isotropic magnetron sputter deposition. Surround-gate nanowire field-effect transistors (FETs) are then constructed using a novel self-aligned fabrication approach. Individual SG GeNW FETs show improved switching over GeNW FETs with planar gate stacks owing to improved electrostatics. FET devices comprised of multiple quasi-aligned SG GeNWs in parallel are also constructed. Collectively, tens of SG GeNWs afford on-currents exceeding 0.1 mA at low source-drain bias voltages. The self-aligned surround-gate scheme can be generalized to various semiconductor nanowire materials.     

Fabrication and device characterization of omega-shaped-gate ZnO nanowire field-effect transistors

Omega-shaped-gate (OSG) nanowire-based field effect transistors (FETs) have attracted a great deal of attention recently, because theoretical simulations predicted that they should have a higher device performance than nanowire-based FETs with other gate geometries. OSG FETs with channels composed of ZnO nanowires were successfully fabricated in this study using photolithographic processes. In the OSG FETs fabricated on oxidized Si substrates, the channels composed of ZnO nanowires with diameters of about 110 nm are coated with Al(2)O(3) using atomic layer deposition, which surrounds the channels and acts as a gate dielectric. About 80% of the surfaces of the nanowires coated with Al(2)O(3) are covered with the gate metal to form OSG FETs. A representative OSG FET fabricated in this study exhibits a mobility of 30.2 cm(2)/ (V s), a peak transconductance of 0.4 muS (V(g) = -2.2 V), and an I(on)/I(off) ratio of 10(7). To the best of our knowledge, the value of the I(on)/I(off) ratio obtained from this OSG FET is higher than that of any of the previously reported nanowire-based FETs. Its mobility, peak transconductance, and I(on)/I(off) ratio are remarkably enhanced by 3.5, 32, and 10(6) times, respectively, compared with a back-gate FET with the same ZnO nanowire channel as utilized in the OSG FET.     

High-mobility air-stable n-type field-effect transistors based on large-area solution-processed organic single-crystal arrays

Nano Research - Solution-processed n-type organic semiconductor micro/nanocrystals (OSMCs) are fundamental elements for developing low-cost, large-area, and all organic logic/complementary...     

Low-resistance ohmic contacts to SiC nanowires and their applications to field-effect transistors

We report on the electrical characterization of two ohmic contacts (Ti/Au and Ni/Au) to unintentionally doped silicon carbide nanowires (SiCNWs) using the modified transmission line model (TLM) method. Our results indicate that subsequently deposited Ni/Au ohmic contacts on SiCNWs had ～40 times lower specific contact resistances (SCRs) of 5.9 × 10(-6) ± 8.8 × 10(-6)?Ω?cm(2) compared to the values of Ti/Au ohmic contacts (2.6 × 10(-4) ± 3.4 × 10(-4)?Ω?cm(2)). We also conducted a comparison study of the electrical characteristics of top-gated SiCNW field-effect transistors (FETs) with two different ohmic contacts as used for ohmic contact studies. The electrical transport measurements on the SiCNW FET with Ni/Au ohmic contacts show much lower resistance contacts to SiC NWs and better FET performances than those for Ti/Au ohmic contact-based FETs.     

Perylenediimide nanowires and their use in fabricating field-effect transistors and complementary inverters

Perylenetetracarboxyldiimide (PTCDI) nanowires self-assembled from commercially available materials are demonstrated as the n-channel semiconductor in organic field-effect transistors (OFETs) and as a building block in high-performance complementary inverters. Devices based on a network of PTCDI nanowires have electron mobilities and current on/off ratios on the order of 10(-2) cm2/Vs and 10(4), respectively. Complementary inverters based on n-channel PTCDI nanowire transistors and p-channel hexathiapentacene (HTP) nanowire OFETs achieved gains as high as 8. These results demonstrate the first example of the use of one-dimensional organic semiconductors in complementary inverters.     

Fabrication of nanometer-scale carbon nanotube field-effect transistors on flexible and transparent substrate

We have successfully fabricated nanometer-scale carbon nanotube field effect transistors (CNT FETs) on a flexible and transparent substrate by electron-beam lithography. The measured current-voltage data show good hole conduction FET characteristics, and the on/off ratio of the current is more than 10(2). The conductance (as well as current) systematically decreases with the increase of the strain, suggesting that the bending of the substrate still affects the deformation condition of the short channel CNT FETs.     

Graphene-graphite oxide field-effect transistors

Graphene's high mobility and two-dimensional nature make it an attractive material for field-effect transistors. Previous efforts in this area have used bulk gate dielectric materials such as SiO(2) or HfO(2). In contrast, we have studied the use of an ultrathin layered material, graphene's insulating analogue, graphite oxide. We have fabricated transistors comprising single or bilayer graphene channels, graphite oxide gate insulators, and metal top-gates. The graphite oxide layers show relatively minimal leakage at room temperature. The breakdown electric field of graphite oxide was found to be comparable to SiO(2), typically ~1-3 × 10(8) V/m, while its dielectric constant is slightly higher, κ ≈ 4.3.     

Organic field-effect transistors using perylene

Organic thin-film field-effect transistors using organic semiconductor, perylene are fabricated, and electrical measurements are performed. The field-effect mobility of the device using perylene shows only p-type behavior while the electron and hole mobilities of its single crystal form are 5.5 and 0.5 cm²/V s, respectively. Stacked layers of perlyene (a layer fabricated with low deposition rate followed by another layer with high deposition rate) are formed for the active layer. Furthermore, hexadecafluorocopperphthalocyanine (F₁₆CuPc) and pentacene buffer layers are also used to modify the interface. For all of these devices, perylene layers acts as p-type. Electron trapping at grain boundaries and interface is thought to be a crucial factor. Hole mobility of 3.9×10⁻⁴ cm²/V s is obtained for the perylene film field-effect transistor device.     

Carbon nanotube multi-channeled field-effect transistors

Field-effect transistors (FETs) with multiple channels of single-wall carbon nanotubes (SWCNTs) have been constructed. SWCNT channels of the FETs are dispersedly aligned between the source and the drain by electric-field manipulation of surface decorated SWCNTs. The obtained multichanneled FETs not only can meet the requirement of large output current and high transconductance, but also manifested good reliability and applicability. It is found that the transconductance of the multi-channel FET has an almost linear dependency on the SWCNT channel number, which opens up a promising way to tune the transconductance of FETs by controlling the channel number.     

Optimization of single-gate carbon-nanotube field-effect transistors

The performance of Schottky-barrier carbon-nanotube field-effect transistors (CNTFETs) critically depends on the device geometry. Asymmetric gate contacts, the drain and source contact thickness, and inhomogenous dielectrics above and below the nanotube influence the device operation. An optimizer has been used to extract geometries with steep subthreshold slope and high I/sub on//I/sub off/ ratio. It is found that the best performance improvements can be achieved using asymmetric gates centered above the source contact, where the optimum position and length of the gate contact varies with the oxide thickness. The main advantages of geometries with asymmetric gate contacts are the increased I/sub on//I/sub off/ ratio and the fact that the gate voltage required to attain minimum drain current is shifted toward zero, whereas symmetric geometries require V/sub g/=V/sub d//2. Our results suggest that the subthreshold slope of single-gate CNTFETs scales linearly with the gate-oxide thickness and can be reduced by a factor of two reaching a value below 100 mV/dec for devices with oxide thicknesses smaller than 5 nm by geometry optimization.     

Facile fabrication of all-SWNT field-effect transistors

Field-effect transistors (FETs) have been fabricated using as-grown single-walled carbon nanotubes (SWNTs) for the channel as well as both source and drain electrodes. The underlying Si substrate was employed as the back-gate electrode. Fabrication consisted of patterned catalyst deposition by surface modification followed by dip-coating and synthesis of SWNTs by alcohol chemical vapor deposition (CVD). The electrodes and channel were grown simultaneously in one CVD process. The resulting FETs exhibited excellent performance, with an I _ON/I _OFF ratio of 10⁶ and a maximum ON-state current (I _ON) exceeding 13 μA. The large I _ON is attributed to SWNT bundles connecting the SWNT channel with the SWNT electrodes. Bundling creates a large contact area, which results in a small contact resistance despite the presence of Schottky barriers at metallic-semiconducting interfaces. The approach described here demonstrates a significant step toward the realization of metal-free electronics.      

Solvothermal growth of single-crystal CdS nanowires

Cadmium sulfide (CdS) nanowires (NWs) were prepared by the solvothermal method using ethylenediamine as a solvent. Two sets of CdS NWs were synthesized at 160 and 200 °C for various reaction durations (3?5, 7, and 24 h). Scanning/tunneling electron microscopy was used to examine the surface morphology of the grown NWs. Their dimensions are found to depend on the reaction temperature and duration. The CdS NWs grown at 200 °C for all durations are longer than those prepared at 160 °C, with diameters ranging from 15 to 40 nm. A three-armed structure is exhibited by all the samples. The grown CdS NWs display a hexagonal wurtzite phase and grows along the \(\mathbf {\left \langle {001}\right \rangle }\) direction. The optical absorption of the grown NWs shows a sharp absorption edge with a blueshift, which indicates an expansion of the optical band gap. All prepared samples show two emission peaks in their photoluminescence spectra. The emission peak location depends on the reaction temperature and duration. The CdS NWs prepared at 160 °C show a sharp band–band emission compared with those prepared at 200 °C. Raman analysis indicates that the optical properties of the grown NWs are enhanced with increased temperature and reaction duration.     

Proton-induced failures in high-power field-effect transistors

The effect of 1000-MeV protons on high-power metal-oxide-semiconductor field-effect transistors (MOSFETs) manufactured using microelectronic technology has been studied. It is established that high-energy proton bombardment leads to breakdown of the gate insulator (oxide) in the MOSFET structure that results in a “catastrophic” failure of the device. A model explaining the appearance of these failures is proposed that is based on the formation of fast residual particles as a result of nuclear reactions between high-energy protons and nuclei of the semiconductor material.     

Organic semiconductors for organic field-effect transistors

Abstract

The advantages of organic field-effect transistors (OFETs), such as low cost, flexibility and large-area fabrication, have recently attracted much attention due to their electronic applications. Practical transistors require high mobility, large on/off ratio, low threshold voltage and high stability. Development of new organic semiconductors is key to achieving these parameters. Recently, organic semiconductors have been synthesized showing comparable mobilities to amorphous-silicon-based FETs. These materials make OFETs more attractive and their applications have been attempted. New organic semiconductors resulting in high-performance FET devices are described here and the relationship between transistor characteristics and chemical structure is discussed.     

Fabrication of single- and multilayer MoS2 film-based field-effect transistors for sensing NO at room temperature

Single- and multilayer MoS(2) films are deposited onto Si/SiO(2) using the mechanical exfoliation technique. The films were then used for the fabrication of field-effect transistors (FETs). These FET devices can be used as gas sensors to detect nitrous oxide (NO). Although the single-layer MoS(2) device shows a rapid response after exposure to NO, the current was found to be unstable. The two-, three-, and four-layer MoS(2) devices show both stable and sensitive responses to NO down to a concentration of 0.8 ppm.     

Short channel field-effect transistors from highly enriched semiconducting carbon nanotubes

Semiconducting single-walled carbon nanotubes (s-SWNTs) with a purity of ∼98% have been obtained by gel filtration of arc-discharge grown SWNTs with diameters in the range 1.2–1.6 nm. Multi-laser Raman spectroscopy confirmed the presence of less than 2% of metallic SWNTs (m-SWNTs) in the s-SWNT enriched sample. Measurement of ∼50 individual tubes in Pd-contacted devices with channel length 200 nm showed on/off ratios of >10⁴, conductances of 1.38–5.8 μS, and mobilities in the range 40–150 cm²·V/s. Short channel multi-tube devices with ∼100 tubes showed lower on/off ratios due to residual m-SWNTs, although the on-current was greatly increased relative to the devices made from individual tubes.