Electromigration effects in aluminum alloy metallization

An investigation of electromigration-induced failure in aluminum alloy films, with the major emphasis on aluminum-copper-silicon, was conducted. Flash evaporation was utilized for alloy deposition and yielded aluminum-copper films having electromigration resistance comparable to that of such films prepared by other techniques. Results for aluminum-copper-silicon and aluminum-copper were similar indicating the passive role of silicon in the presence of copper. Additions of four weight percent copper resulted in near-optimum electromigration resistance. In addition, hot-substrate deposition was beneficial in attaining greater lifetime. For films deposited on unheated substrates, or having lower copper contents, heat treatment seriously degraded electromigration resistance. Heat treatment effects were considered to be a consequence of copper redistribution. Lifetime decrease at large copper contents and possible saturation at large thicknesses were interpreted in terms of clustering of CuAl₂ precipitates. The superior reliability of copper-alloyed metallization when compared with aluminum or aluminum-silicon was clearly demonstrated. Lifetime improvement could be accounted for by the increased activation energy for the failure process in the aluminum-copper alloys.     

Reservoir effect in SiCN capped copper/SiO2 interconnects

By analyzing electromigration in large lines, the reservoir effect due to via connecting matrices has been studied evidencing the key role of the (via + via inter-space) area parameter to gain lifetime. This extra-lifetime can be converted into effective current density increase, useful for circuits very demanding in current, depending on metal level. The understanding of the reservoir effect finally allowed the comparison of electromigration performance of lines of different width. It pointed out that the lifetime decreases with increasing line width, which evidences the copper diffusion at grain boundaries as mechanism.     

Relationship between texture and electromigration lifetime in sputtered AI-1% Si thin films

The relationship among the grain structure, texture, and electromigration lifetime of four Al-1% silicon metallizations produced under similar sputtering conditions was explored. The grain sizes and distributions were similar and the grain structure was near-bamboo for all metallizations. All metallizations exhibited a near-(111) fiber texture, as determined by the pole figure technique. Differences in electromigration behavior were noted. Three of the metallizations exhibited a bimodal failure distribution while the fourth was monomodal and had the longest electromigration lifetime. The electromigration lifetime was directly related to the strength of the (111) fiber texture in the metallization as anticipated. However, whereas the grain size distribution has an effect on the electromigration lifetime when metallization lines are several grains wide, the electromigration lifetime of these near-bamboo metallizations appeared independent of the grain structure. It was also observed that a number of failures occurred in the 8 μm interconnect supplying the 5 μm wide test lines. This apparently reflects an increased susceptibility of the wider interconnect lines to electromigration damage.     

Experimental investigation on the impact of stress free temperature on the electromigration performance of copper dual damascene submicron interconnect

Electromigration experiments are conducted for submicron dual damascene copper lower level interconnect samples of different stress free temperatures. The electromigration life-time is found to be strongly depend on the stress state of the metallization and the stress gradient that exist due to thermal mismatch of various materials surrounding the copper metallization. It is found that by reducing the stress free temperature, electromigration lifetime can be improved. In order to explain the life-time behavior, an atomic flux divergence based coupled field finite element model is developed. The model predicts a reduction in the atomic flux divergence at the electromigration test condition due to the reduction in the stress free temperature as the key factor responsible for longer electromigration life-time observed experimentally.     

A scanning electron microscope study of electromigration in an Al-2% Cu thin film

Electromigration in an Al-27% Cu metallization thin film deposited on a silicon transistor structure has been studied in situ using the electron beam induced current mode (EBIC) of the scanning electron microscope. In this mode electrons which are transmitted through the metallization generate a signal which depends on the thin film thickness and its mass density. During the initial stages of the electromigration experiment the copper rich precipitates on the surface coarsened. Also, there was a preferential coarsening towards the positive end. Once the negative end became depleted of these surface precipitates grain thinning occurred. Voids nucleated and grew in from the sides of the metallization in these depleted regions finally causing film failure. However almost no voids were observed at grain boundaries or triple points. The copper rich precipitates in the interior of the metal film were stationary and showed no signs of coarsening or depleting any region. These observations suggest that surface diffusion is the predominant mode of atom migration in these alloys; grain boundary diffusion has been reduced compared to pure aluminum.     

Investigation of the influence of thermal treatment on interconnect-barrier interfaces in copper metallization systems

In this paper, we present recent results dealing with the influence of a high temperature anneal on the Cu–Ta interface in copper metallization systems. The electromigration lifetime data show a strong dependency of the electromigration robustness on the temperature budget. A bimodal behavior was observed after annealing the metallization at temperatures of 470 °C and above for more than 10 h. Surprisingly the high temperature anneal produces a late failure mode in electromigration lifetime tests resulting in a 10 times higher MTTF. To understand the influence of temperature pretreatment on electromigration behavior, TEM and SIMS have been performed on untreated samples (as fabricated) and on samples stored at 500 °C for 10 h. The TEM investigation shows no significant change in Cu grain size due to the high temperature. The Tof-SIMS investigations show that Ta diffuses into the Cu interconnect at the high temperature. A diffusion length for Ta of about 150 nm was observed for samples stored at 500 °C for 10 h. This effect has a strong impact on the results of the electromigration tests, done on lines after high temperature anneal.     

Surface Morphology of Sn-Rich Solder Interconnects After Electrical Loading

Morphological changes from electromigration were examined on microsized Sn-Ag-Cu, pure Sn, and single-crystal Sn solder interconnects. It was found that both grain structure and alloying had a strong influence on the form of electromigration damage. In polycrystal Sn, grain boundary grooves were the primary form of electromigration damage, while in single-crystal Sn interconnects wavy surface relief appeared following electromigration. Alloying with Ag and Cu encouraged formation of Sn hillocks and Cu₆Sn₅ intermetallic compound (IMC) segregation. The grain boundary grooves were related to the divergence of the vacancy concentration at grain boundaries, which induced Sn grain tilting or sliding. Removal of the grain boundaries in the single-crystal interconnect made surface diffusion the primary electromigration mechanism, resulting in wavy surface relief after long electromigration time. In Sn-Ag-Cu alloy, directional flow of Cu caused Cu₆Sn₅ IMC segregation, which produced large compressive stress, driving the stressed grains to grow into hillocks.     

A copper-dielectric cap interface with high resistance to electromigration for high performance semiconductor devices

In highly integrated semiconductor devices the time to failure of copper interconnects strongly depends on the properties of the copper-dielectric cap interface. In this work a production capable preparation of copper-dielectric cap interfaces with a high resistance to electromigration (EM) has been developed for 90 and 65 nm dual damascene technologies. With a new soft silicidation pretreatment of the copper metallization followed by a deposition of a SiCN or SiN cap the EM lifetime could be improved 3.5× referring to a standard SiCN capping process. The new pretreatment enables the formation of an epitaxial copper silicide layer on top of the copper metal lines which is seen as the key factor of the lifetime improvement. The new kind of cap layer process enables the lifetime improvement with only negligible increase of metal sheet resistance. The surface damage of copper and the low k inter-level dielectric which is typically caused during the copper precleaning could be minimized significantly. It is shown that there is no linear correlation between adhesion to copper and electromigration performance.     

Microstructure and reliability of copper interconnects

The effects of texture and grain structure on the electromigration lifetime of Cu interconnects are reported. Using different seed layers, (111)- and (200)-textured CVD Cu films with similar grain size distributions are obtained. The electromigration lifetime of (111) CVD Cu is about four times longer than that of (200) CVD Cu. For Damascene CVD Cu interconnects, the electromigration lifetime degrades for linewidths in the deep submicron range because the grains are confined as a result of conformal deposition in narrow trenches. In contrast, electroplated Cu has relatively larger grains in Damascene structure, resulting in longer electromigration lifetime than CVD Cu and no degradation for linewidths in the deep submicron range     

A compact model for early electromigration failures of copper dual-damascene interconnects

A compact model for early electromigration failures in copper dual-damascene interconnects is proposed. The model is based on the combination of a complete void nucleation model together with a simple mechanism of slit void growth under the via. It is demonstrated that the early electromigration lifetime is well described by a simple analytical expression, from where a statistical distribution can be conveniently obtained. Furthermore, it is shown that the simulation results provide a reasonable estimation for the lifetimes.     

Mechanism of pre-annealing effect on electromigration immunity of Al–Cu line

In this work, we have investigated effects of pre-annealing, which means annealing performed prior to electromigration (EM) test, on EM lifetime of Al–Cu lines. We also investigated the relationships between void formation and size of Cu precipitated area in the line under various pre-annealing conditions. It is found that EM lifetime decreases while the size of the Cu precipitated area increases with lengthening of the pre-annealing period. However, no void is observed after this pre-annealing treatment. The results indicate that the tiny voids generated by formation of Cu precipitation do not move during the pre-annealing period. In the case of EM testing, Cu precipitation occurs followed by void formation at the cathode area, probably due to diffusion of vacancies which are generated by Cu atom movement by electron wind. As a result, resistance of the line increases and eventually it fails completely.It is demonstrated that pre-annealing helps Cu atoms to accumulate at the grain boundary forming the Cu precipitates. However, in samples with no pre-annealing treatment, the accumulation of Cu atoms at the grain boundaries begins just after the start of the EM testing and then the Cu precipitates diffuse toward the anode. Since EM test conditions are the same for samples with and without pre-annealing treatment, the only variation is the incubation time to accumulate Cu atoms at the grain boundaries. This is the reason why EM lifetime of pre-annealed samples is shorter than that of samples with no pre-annealing treatment.     

Atomic bonding and properties of Al-Cu alloy with ϑ(Al2Cu)

Atomic bonding of ϑ (Al₂Cu) in an Al-Cu thin-film alloy is calculated by using empirical electron theory (EET) in solids. Results show that the Cu-Cu bond in the ϑ phase is the strongest, while the second strongest bond is the Al-Cu bond. All of these bonds are stronger than the strongest Cu-Cu bond in pure Cu metal. This is the reason that only ϑ precipitation in the Al-Cu thin-film alloy can be found and not ϑ″ and ϑ′ phases. The electromigration lifetime of Al-Cu thin-film alloy for interconnects is influenced by the stronger atomic bonding in ϑ particles, which are dispersed in the matrix of the alloy. The ϑ precipitation in the Al-Cu thin-film alloy can enhance the strength of the alloy by the stronger bond net and increase the electromigration lifetime for interconnects.     

Electromigration properties of electroless plated Cu metallization

The electromigration properties of electroless plated copper films have been evaluated under DC stress conditions. The formation of microvoids and the diffusion of copper through the seed layer caused an increase of the line resistance in the initial stage of the stressing. The current density dependence and the activation energy of the lifetime were determined     

Reliability studies of barrier layers for Cu/PAE low-k interconnects

Electromigration and electrical breakdown are two of the most important concerns in the reliability of modern electronic devices. The electromigration lifetimes and electrical breakdown field (E_BD) in single damascene copper lines/porous polyarylene ether (PAE) dielectric with different diffusion barrier materials (i.e., amorphous-SiC:H and TaN/Ta) were studied. The results showed a “wafer edge effect” in both groups of samples. The electromigration lifetime of samples taken from the center of the wafer is five to nine times longer of those taken from the wafer edge in the accelerated test. The samples from wafer edge showed a bi-modal failure characteristic. It was also found that electromigration resistance of the structure with new diffusion barrier a-SiC:H/Ta was comparable to that with the conventional TaN/Ta. On the other hand, the electrical testing showed that E_BD of the a-SiC:H/Ta structure is about twice of that with TaN/Ta barrier, indicating a significant improvement of the electrical performance.     

Nano- and micrometer-scale thin-film-interconnection failure theory and simulation and metallization lifetime prediction,Part 2: Polycrystalline-line degradation and bulk failure

The degradation and bulk failure of a polycrystalline interconnect line caused by vacancy electromigration along grain boundaries and vacancy-cluster nucleation at triple points in the bulk conductor are investigated within the general theory of the electromigration-induced degradation and failure of thin-film on-chip interconnect lines, presented in Part 1 [1]. The general equations are tailored to deal with vacancy electromigration, mechanical-stress generation, and void nucleation at triple points. Appropriate boundaryvalue problems are formulated, and numerical methods and procedures to solve them are developed and implemented in software. Computer simulations are performed to identify a pattern of electromigration failure at triple points. On this basis, (1) interconnect lifetime is investigated over wide ranges of variation of material, structural, geometric, and operating parameters, and (2) the current-density and temperature dependence—of the mechanical stress, vacancy concentration, and level of vacancy supersaturation at a triple point, and of void radius and time to nucleation-is examined and explained. The simulation results are found to agree well with previous experiments. This investigation could be seen as a natural continuation of our study of electromigration failures developed by multilevel-metallization systems as a result of interconnect failure near via junctions or at open ends [1]. Together they cover most mechanisms of electromigration failure suffered by metallization systems.     

Electromigration in sputtered copper film on plasma-treated hydrogen silsesquioxane dielectric

Electromigration (EM) damage is one of the major causes for the failure of interconnects. Plasma treatment, such as dry etching, is frequently employed in the fabrication of multilevel interconnection patterns. This work investigates the hydrogen silsesquioxane (HSQ) and copper integrated systems and the effect of H₂ plasma treatment on the EM of Cu. Hydrogen plasma bombardment induces a rough HSQ surface and results in a coarse morphology of the Cu film deposited on HSQ. The crystallographic texture of Cu is also affected by the plasma treatment. A decrease in the Cu I(111)/I(200) peak ratio is observed for a specimen treated with H₂ plasma. The activation energy for EM in Cu and the EM lifetime of the Cu interconnect decreases with an increased degree of plasma treatment. The activation energies obtained, ranging from 0.76 eV to 0.94 eV, suggest that the electromigration in copper proceeds via an interfacial diffusion path. Possible mechanisms for the effects of plasma treatment are explored. The rough surface and the retarded Cu (111) orientation induced by H₂ plasma bombardment are the major causes for the decrease of activation energy and EM lifetime.     

Activation energies for the different electromigration mechanisms in aluminum

The activation energies concerning all electromigration contributions in aluminum are theoretically determined starting from the activation energy for self-diffusion. For grain boundary electromigration the activation energy was found to be E_g = 0.4–0.5 ± 0.04 eV, whereas all other contributions except the surface electromigration are described by higher activation energies. For comparing with experimental results the grain boundary activation energy was determined by direct measurement of aluminum drift velocities. It is shown that the known measuring method is valid only in combination with some modifications. The measured activation energies agree well with the estimated ones.     

Additional microstructural analysis on the samples examined in the paper ‘Are high resolution resistometric methods really useful for the early detection of electromigration damage?’

In a previous paper (A. Scorzoni, S. Franceschini, R. Balboni, M. Impronta, I. De Munari, and F. Fantini, Are high resolution resistometric methods really useful for the early detection of electromigration damage? Microelectr. Reliab. 1997;37(10/11):1479–1482), we reported largely different electromigration lifetimes and different high resolution early resistance changes measured on two nominally identical lots of 4 μm wide lines tested at moderately accelerated stress conditions. A microstructural analysis on unstressed samples was performed in order to detect the reason which induced these differences. The analysis confirmed a major defectivity of the lot with shorter lifetime: we detected the presence of TiAl₃ precipitates at the interface between the Al–Cu and the Ti-based metal barrier. This was not easily detectable by means of simple visual inspection. These additional findings confirm that a quick electrical detection of the metallization quality could be feasible by means of high resolution resistance measurements without the need of time-consuming direct examination of production lots.     

Electromigration reliability of tungsten and aluminum vias andimprovements under AC current stress

The reliability with respect to electromigration failure of tungsten and aluminum vias under DC, pulse-DC, and AC stressing has been studied using Kelvin test structures. The results indicate that although W-plug vias can eliminate the step coverage problem, this metallization system is not ideal because the intermetallic contact represents an undesirable flux divergence location for electromigration. Al vias are more reliable than W-plug vias with respect to electromigration failure. The unidirectional 50% duty factor pulse-DC lifetime is found to be twice the DC lifetime in the low-frequency region (<200 Hz) and four times the DC lifetime in the normal frequency region (> 10 kHz). The via lifetimes under bidirectional stressing current are found to be orders of magnitude longer than DC lifetimes under the same stressing current density for both W and Al vias. All the observations are in agreement with a vacancy relaxation model     

Copper interconnection lines: SARF characterization and lifetime test

Copper thin films have been deposited onto silicon substrates by means of two different deposition techniques, resulting in metallizations with different microstructure. In particular, transmission electron microscopy (TEM) observations have shown that the two types of films are characterized by different distributions of the grain size. Lifetime and SARF (Spectral Analysis of Resistance Fluctuations) tests have been performed on lines obtained from the two metallizations in order to compare their resistance to electromigration. The results of the tests confirm those already obtained in A1 based lines; in fact, a clear correlation exists among the average grain size, the lifetime and the level of electromigration noise.