Dual-band ultra-wide tuning range CMOS voltage-controlled oscillator

A dual-band wide-tuning range LC CMOS voltage controlled oscillator (VCO) topology is proposed. Dual-band operation is realised by employing a double-tuned double-driven transformer as a resonator. The proposed approach eliminates MOS switches, which are typically used in multi-standard oscillators, and thus improves phase noise and tuning range characteristics. The concept is demonstrated through the design of an LC VCO in a standard 0.18 mum CMOS process. Two frequency bands are realised (2.4 and 6 GHz) with 740 MHz tuning range in the first band and 1.56 GHz tuning range in the second band. Operating from a 1.8 V supply, the VCO has a simulated phase noise of -119 dBc/Hz in the 2.4 GHz band and -110 dBc/Hz in the 6 GHz band at 600 KHz offset from the carrier     

4.6 GHz CMOS voltage-controlled oscillator

A 4.6 GHz voltage-controlled oscillator (VCO) was designed and fabricated using 0.25 μm CMOS technology. A careful circuit design based on a trade-off between frequency-tuning range and phase-noise characteristics, realised both a sufficient frequency-tuning range of 230 MHz and a low phase-noise characteristic of -118.1 dBc/Hz at 1 MHz offset. This phase-noise characteristic is superior to previously reported VCOs     

A low-noise, 900-MHz VCO in 0.6-μm CMOS

This paper describes a low-noise, 900-MHz, voltage-controlled oscillator (VCO) fabricated in a 0.6-μm CMOS technology. The VCO consists of four-stage fully differential delay cells performing full switching. It utilizes dual-delay path techniques to achieve high oscillation frequency and obtain a wide tuning range. The VCO operates at 750 MHz to 1.2 GHz, and the tuning range is as large as 50%. The measured results of the phase noise are -101 dBc/Hz at 100-kHz offset and -117 dBc/Hz at 600-kHz offset from the carrier frequency. This value is comparable to that of LC-based integrated oscillators. The oscillator consumes 10 mA from a 3.0-V power supply. A prototype frequency synthesizer with the VCO is also implemented in the same technology, and the measured phase noise of the synthesizer is -113 dSc/Hz at 100-kHz offset     

9.3-10.4-GHz-band cross-coupled complementary oscillator with low phase-noise performance

A fully integrated 10-GHz-band voltage-controlled oscillator (VCO) has been designed and fabricated using commercial 0.18-/spl mu/m CMOS technology. The complementary cross-coupled differential topology is adopted in the design. The measured phase-noise is around -89 dBc/Hz at the offset frequency of 100 kHz from the center frequency of 9.83 GHz, the output frequency tuning range of the fabricated VCO is 1.1 GHz ranging from 9.3 to 10.4 GHz, and the power consumption of the core VCO circuit is 5.8 mW. The design is the first one that adopts the complementary cross-coupled circuit structure for 10-GHz-band oscillators, and whose performances of the VCO are the best ones for 10-GHz-band oscillators, compared with the 10-GHz-band CMOS oscillators reported earlier.     

面向5GHz无线应用的单片InGaP/GaAs HBT压控振荡器

介绍了一种由商用InGaP/GaAs异质结双极晶体管工艺制成、基于负阻原理的单片压控振荡器,此电路定位于5GHz频段下的无线应用.在实际使用中,除了旁路和去耦电容外,无需外接其他外部元件.测试得到的输出频率范围超过300MHz,为4.17～4.56GHz,与仿真结果非常吻合;相位噪声为-112dBc/Hz@1MHz;在3.3V电源电压下,其核心部分的直流功耗为15.5mW,输出功率为0～2dBm.为了与其他振荡器比较,还通过计算得到了相位噪声优值,约为-173.2dBc/Hz.同时,还讨论了负阻振荡器的原理和设计方法.     

CMOS Colpitts Quadrature VCO Using the Body Injection-Locked Coupling Technique

This paper presents a new low phase noise quadrature voltage-controlled oscillator (QVCO), which consists of two differential complementary Colpitts voltage-controlled oscillators (VCOs) with a tail inductor. The output of the tail inductor in one differential VCO is injected to the bodies of the nMOSFETs in the other differential VCO and vice versa. The proposed CMOS QVCO has been implemented with the TSMC 0.18 mum CMOS technology and the die area is 0.725 times 0.839 mm². At the supply voltage of 1.1 V, the total power consumption is 9.9 mW. The free-running frequency of the QVCO is tunable from 5.26 GHz to 5.477 GHz as the tuning voltage is varied from 0.0 V to 1.1 V. The measured phase noise at 1 MHz frequency offset is -124.36 dBc/Hz at the oscillation frequency of 5.44 GHz and the figure of merit (FOM) of the proposed QVCO is -189.1 dBc/Hz.     

A 5.6 GHz Low Power Balanced VCO in 0.18 $mu$m CMOS

A 5.6 GHz balanced voltage-controlled oscillator (VCO) is designed and implemented in a 0.18 mum CMOS 1P6M process. It consists of two single-ended complementary Colpitts LC-tank VCOs coupled by two pairs of varactors. At the supply voltage of 1.2 V, the output phase noise of the VCO is -119.13 dBc/Hz at 1MHz offset frequency from the carrier frequency of 5.6 GHz, and the figure of merit is -190.29 dBc/Hz. Total VCO core power consumption is 2.4 mW. Tuning range is about 600 MHz, from 5.36 to 5.96 GHz, while the control voltage was tuned from 0 to 1.2 V.     

A 6 GHz high power and low phase noise VCO using an InGaP/GaAs HBT

A 6 GHz voltage controlled oscillator (VCO) optimized for power and noise performance was designed and characterized. This VCO was designed with the negative-resistance (Neg-R) method, utilizing an InGaP/GaAs hetero-junction bipolar transistor in the negative-resistance block. A proper output matching network and a high Q stripe line resonator were used to enhance output power and depress phase noise. Measured central frequency of the VCO was 6.008 GHz. The tuning range was more than 200 MHz. At the central frequency, an output power of 9.8 dBm and phase noise of -122.33 dBc/Hz at 1 MHz offset were achieved, the calculated RF to DC efficiency was about 14%, and the figure of merit was -179.2 dBc/Hz.     

A 0.6 V, 4.32 mW, 68 GHz Low Phase-Noise VCO With Intrinsic-Tuned Technique in 0.13 $mu$m CMOS

An intrinsic-tuned, 68 GHz voltage controlled oscillator (VCO) without an extra on-chip accumulation-mode metal oxide semiconductor (MOS)-varactor is demonstrated in a standard, 0.13 mum CMOS technology. This VCO exhibits phase noises of -98.4 dBc/Hz and -115.2 dBc/Hz at 1 and 10 MHz offset, respectively, along with a tuning range of 4.5 % even under a small power consumption of 4.32 mW. Besides, the highest figure-of-merit (taking frequency tuning range into account) of -182 dBc/Hz under the 1 MHz offset condition is achieved among all previously reported >60 GHz CMOS-based VCOs, which is attributed to the proposed intrinsic tuning mechanism.     

A filtering technique to lower LC oscillator phase noise

Based on a physical understanding of phase-noise mechanisms, a passive LC filter is found to lower the phase-noise factor in a differential oscillator to its fundamental minimum. Three fully integrated LC voltage-controlled oscillators (VCOs) serve as a proof of concept. Two 1.1-GHz VCOs achieve -153 dBc/Hz at 3 MHz offset, biased at 3.7 mA from 2.5 V. A 2.1-GHz VCO achieves -148 dBc/Hz at 15 MHz offset, taking 4 mA from a 2.7-V supply. All oscillators use fully integrated resonators, and the first two exceed discrete transistor modules in figure of merit. Practical aspects and repercussions of the technique are discussed     

面向5GHz无线应用的单片InGaP/GaAs HBT压控振荡器

介绍了一种由商用InGaP/GaAs异质结双极晶体管工艺制成、基于负阻原理的单片压控振荡器,此电路定位于5GHz频段下的无线应用.在实际使用中,除了旁路和去耦电容外,无需外接其他外部元件.测试得到的输出频率范围超过300MHz,为4.17～4.56GHz,与仿真结果非常吻合;相位噪声为-112dBc/Hz@1MHz;在3.3V电源电压下,其核心部分的直流功耗为15.5mW,输出功率为0～2dBm.为了与其他振荡器比较,还通过计算得到了相位噪声优值,约为-173.2dBc/Hz.同时,还讨论了负阻振荡器的原理和设计方法.     

应用于IMT-A和UWB系统的0.13μm CMOS宽带压控振荡器设计

基于TSMC 0.13μm CMOS工艺设计并实现了应用于IMT-Advanced和UWB系统的双频段宽带频率合成器中的电感电容压控振荡器(LC-VCO)。此压控振荡器的设计采用了开关电流源、开关交叉耦合对和噪声滤波等技术,以优化电路的相位噪声,功耗,振荡幅度,调谐范围等性能。为达到宽的调谐范围,核心电路采用了4比特可重构的开关电容调谐阵列。整个芯片包括焊盘面积为1.11′0.98 mm₂。测试结果表明,在1.2V电源电压下,两个频段压控振荡器所消耗的电流分别为3mA和4.5mA,压控振荡器的调谐范围为3.86~5.28GHz和3.14~3.88GHz。在振荡频率3.5GHz和4.2GHz上,1MHz频偏处,压控振荡器的相位噪声分别为-123dBc/Hz与-119dBc/Hz。     

A 2.4 GHz high-linearity low-phase-noise CMOS LC-VCO based on capacitance compensation

A 2.4 GHz high-linearity low-phase-noise cross-coupled CMOS LC voltage-controlled oscillator(VCO) is implemented in standard 0.18-μm CMOS technology.An equalization structure for tuning sensitivity base on the three-stage distributed biased switched-varactor bank and the differential switched-capacitor bank is adopted to reduce the variations of the VCO gain,achieve high linearity,and optimize the phase-noise performance.Compared to the conventional VCO,the proposed VCO has more constant gain over the en...     

Novel 53/106 GHz Dual-Band MMW LC Oscillator Implemented in SiGe BiCMOS Technology

In this Paper, we present a fully integrated millimeter wave LC voltage-controlled oscillator (VCO), which employs a novel topology, operating at dual-band frequency of 53.22 GHz-band and 106.44 GHz-band. The low-phase noise performance of ?107.3 dBc/Hz and ?106.1 dBc/Hz at the offset frequency of 600 kHz, ?111.8 dBc/Hz and ?110.6 dBc/Hz at the offset frequency of 1 MHz around 53.22 GHz and 106.44 GHz are achieved using IBM BiCMOS-6HP technology, respectively. Two tuning ranges, of 52.7 - 53.8 GHz and 105.4 - 107.6 GHz for the proposed LC VCO are obtained. The output voltage swing of this VCO is around 1.8 V_p-p at the operation frequency of 53.22 GHz and 0.45 V_p-p at 106.44 GHz; the total power consumption is about 16.5 mW. To our knowledge, this is the first oscillator which operates at dual-band frequency above 50 GHz with the best preformance.     

A low-power ka-band Voltage-controlled oscillator implemented in 200-GHz SiGe HBT technology

An integrated low-power low phase-noise Ka-band differential voltage-controlled oscillator (VCO) is developed in a 0.12-/spl mu/m 200-GHz silicon-germanium heterojunction bipolar transistor technology. The use of line inductors instead of transmission lines is demonstrated to be feasible in LC-tuned resonators for Ka-band applications. This VCO can operate from a supply voltage of 1.6-2.5 V. A single-sideband phase noise of -99 dBc/Hz at 1-MHz offset from the carrier frequency of 33 GHz is achieved, together with a VCO figure-of-merit of -183.7 dBc/Hz. The frequency tuning constant of the VCO in the linear regime is -0.547 GHz/V.     

A novel complementary Colpitts differential CMOS VCO with low phase noise performance

A low phase noise Ka-band CMOS voltage-controlled oscillator is proposed in this paper. A new complementary Colpitts structure was adopted in a 0.18-μm CMOS process to achieve differential-ended outputs, low phase-noise performance, and low-power consumption. The designed VCO oscillates from 29.8 to 30 GHz with 200 MHz tuning range. The measured phase noise at 1-MHz offset is −109 dBc/Hz at 30 GHz and −105.5 dBc/Hz at 29.8 GHz. The power consumption of VCO is only 27 mW. In addition, compared with the published papers, the proposed CMOS VCO achieves the best figure of merit (FOM) of −185 dB at 29.95-GHz band.     

A low-noise, low-power VCO with automatic amplitude control forwireless applications

Voltage controlled oscillators (VCOs) used in portable wireless communications applications, such as cellular telephony, are required to achieve low phase-noise levels while consuming minimal power. This paper presents the design challenges of a VCO with automatic amplitude control, which operates in the 300 MHz to 1.2 GHz frequency range using different external resonators. The VCO phase noise level is -106 dBc/Hz at 100-KHz offset from an 800-MHz carrier, and it consumes 1.6 mA from a 2.7-V power supply. An extensive phase-noise analysis is employed for this VCO design in order to identify the most important noise sources in the circuit and to find the optimum tradeoff between noise performance and power consumption     

A 1.8-V 2.4/5.15-GHz dual-band LCVCO in 0.18-/spl mu/m CMOS technology

A dual band, fully integrated, low phase-noise and low-power LC voltage-controlled oscillator (VCO) operating at the 2.4-GHz industrial scientific and medical band and 5.15-GHz unlicensed national information infrastructure band has been demonstrated in an 0.18-/spl mu/m CMOS process. At 1.8-V power supply voltage, the power dissipation is only 5.4mW for a 2.4-GHz band and 8mW for a 5.15-GHz band. The proposed VCO features phase-noise of -135dBc/Hz at 3-MHz offset frequency away from the carrier frequency of 2.74GHz and -126dBc/Hz at 3-MHz offset frequency away from 5.49GHz. The oscillator is tuned from 2.2 to 2.85GHz in the low band (2.4-GHz band) and from 4.4 to 5.7GHz in the high band (5.15-GHz band).     

A 2 V 1.8 GHz fully integrated CMOS dual-loop frequency synthesizer

A 2 V 1.8 GHz fully integrated CMOS dual-loop frequency synthesizer is designed in a standard 0.5 /spl mu/m digital CMOS process for wireless communication. The voltage-controlled oscillator (VCO) required for the low-frequency loop is designed using a ring-type VCO and achieves a tuning range of 89% from 356 to 931 MHz and a phase noise of -109.2 dBc/Hz at 600 kHz offset from 856 MHz. With an active chip area of 2000/spl times/1000 /spl mu/m/sup 2/ and at a 2 V supply voltage, the whole synthesizer achieves a tuning range from 1.8492 to 1.8698 GHz in 200 kHz steps with a measured phase noise of -112 dBc/Hz at 600 kHz offset from 1.86 GHz. The measured settling time is 128 /spl mu/s and the total power consumption is 95 mW.     

射频卫星电视天线电路中LC压控振荡器设计

本文设计了一款应用于卫星电视天线电路中低功耗、低相噪的宽带单片集成压控振荡器。该振荡器利用PMOS尾电流源和MIM电容阵列结构。在保证调谐范围的前提下,有效的降低了相位噪声。使得该压控振荡器实现了3.384GHz~4.022GHz频段的覆盖,在中心频率为3.7GHz时,100Hz和1MHz频偏处的相位噪声分别为-90.4dBc/Hz和-119.1dBc/Hz,工作电压下为1.8V,功耗仅为2.5mW。