ZnO Thin Film, Device, and Circuit Fabrication using Low-Temperature PECVD Processes

We report undoped ZnO films deposited at low temperature (200°C) using plasma-enhanced chemical vapor deposition (PECVD). ZnO thin-film transistors (TFTs) fabricated using ZnO and Al₂O₃ deposited in situ by PECVD with moderate gate leakage show a field-effect mobility of 10 cm²/V s, threshold voltage of 7.5 V, subthreshold slope <1 V/dec, and current on/off ratios >10⁴. Inverter circuits fabricated using these ZnO TFTs show peak gain magnitude (dV _out/dV _in) ~5. These devices appear to be strongly limited by interface states and reducing the gate leakage results in TFTs with lower mobility. For example, ZnO TFTs fabricated with low-leakage Al₂O₃ have mobility near 0.05 cm²/V s, and five-stage ring-oscillator integrated circuits fabricated using these TFTs have a 1.2 kHz oscillation frequency at 60 V, likely limited by interface states.     

ZnO TFT Devices Built on Glass Substrates

ZnO thin-film transistors (TFTs) were built on glass substrates. The device with a top gate configuration operates in the depletion mode. The ZnO channel was grown by metalorganic chemical vapor deposition (MOCVD) on glass at low temperature. SiO₂ was used as the gate dielectric. The TFT has an on/off ratio of ∼4.0 × 10⁴ and a channel field-effect mobility of ∼4.0 cm²/V s. The average transmittance of the ZnO film in the visible wavelength is ∼80%. To compare the characteristics of the TFTs prepared by using a poly-ZnO and epitaxial-ZnO channel, an epi-ZnO TFT with the same configuration and dimensions was made on an r-Al₂O₃ substrate. The epi-ZnO TFT shows higher field-effect mobility of ∼35 cm²/V s and on/off ratio of ∼10⁸.     

Growth of rubrene crystalline thin films using thermal annealing on DPPC LB monolayer

High crystalline thin films of 5,6,11,12-tetraphenylnaphthacene (rubrene) can be obtained after in situ thermal post annealing using SiO₂ gate dielectric modified with a 1,2-dipalmitoyl-sn-glycero-3-phosphocholine (DPPC) monolayer obtained via Langmuir–Blodgett transfer. Such formed rubrene crystalline films are interconnected and highly ordered with defined molecular orientation. Organic thin film transistors (OTFTs) with high performance are reproducibly demonstrated with the mobility of 0.98 cm²/V s, the threshold voltage of −8 V and the on–off current ratio of higher than 10⁷. The results indicate that our approach is a promising one for preparing high quality rubrene crystalline films.     

High-performance pentacene field-effect transistors using Al2O3 gate dielectrics prepared by atomic layer deposition (ALD)

High-performance pentacene field-effect transistors have been fabricated using Al₂O₃ as a gate dielectric material grown by atomic layer deposition (ALD). Hole mobility values of 1.5 ± 0.2 cm²/V s and 0.9 ± 0.1 cm²/V s were obtained when using heavily n-doped silicon (n⁺-Si) and ITO-coated glass as gate electrodes, respectively. These transistors were operated in enhancement mode with a zero turn-on voltage and exhibited a low threshold voltage (< −10 V) as well as a low sub-threshold slope (<1 V/decade) and an on/off current ratio larger than 10⁶. Atomic force microscopy (AFM) images of pentacene films on Al₂O₃ treated with octadecyltrichlorosilane (OTS) revealed well-ordered island formation, and X-ray diffraction patterns showed characteristics of a “thin film” phase. Low surface trap density and high capacitance density of Al₂O₃ gate insulators also contributed to the high performance of pentacene field-effect transistors.     

Characterization of Zn1?xMgxO Films Prepared by the Sol–Gel Process and Their Application for Thin-Film Transistors

Transparent semiconductor thin films of Zn_1−x Mg _x O (0 ≤ x ≤ 0.36) were prepared using a sol–gel process; the crystallinity levels, microstructures, and optical properties affected by Mg content were studied. The experimental results showed that addition of Mg species in ZnO films markedly decreased the surface roughness and improved transparency in the visible range. A Zn_1−x Mg _x O film with an x-value of 0.2 exhibited the best average transmittance, namely 93.7%, and a root-mean-square (RMS) roughness of 1.63 nm. Therefore, thin-film transistors (TFTs) with a Zn_0.8Mg_0.2O active channel layer were fabricated and found to have n-type enhancement mode. The Zn_0.8Mg_0.2O TFT had a field-effect mobility of 0.1 cm²/V s, threshold voltage of 6.0 V, and drain current on/off ratio of more than 10⁷.     

Air stable C60 based n-type organic field effect transistor using a perfluoropolymer insulator

Air stable n-type organic field effect transistors (OFETs) based on C₆₀ are realized using a perfluoropolymer as the gate dielectric layer. The devices showed the field-effect mobility of 0.049 cm²/V s in ambient air. Replacing the gate dielectric material by SiO₂ resulted in no transistor action in ambient air. Perfluorinated gate dielectric layer reduces interface traps significantly for the n-type semiconductor even in air.     

TiSiOx gate dielectrics produced by reactive sputtering for high performance InGaZnO thin film transistors

High dielectric constant TiSiOx thin films are produced by reactive sputtering under different oxygen partial pressure ratio (P_O2) from 15% to 30%. All the TiSiOx films show an excellent transmittance value of almost 95%. The TiSiOx film has a low leakage current density by optimizing oxygen partial pressure, and the leakage current density of TiSiOx film under P_O2 of 20% is 4.88×10⁻⁷ A/cm² at electrical field strength of 2 MV/cm. Meanwhile, their associated InGaZnO thin-film transistors (IGZO-TFTs) with different P_O2 TiSiOx thin films as gate insulators are fabricated. IGZO-TFTs under P_O2 of 20% shows an optimized electrical performance, and the threshold voltage, sub-threshold swing, field effect mobility and I_on/I_off ratio of this device are 2.22 V, 0.33 V/decade, 29.3 cm²/V s and 5.03×10⁷, respectively. Moreover, the density of states (DOS) is calculated by temperature-dependent field-effect measurement. The enhancements of electrical performance and temperature stability are attributed to better active/insulator interface and smaller DOS.     

High performance top-gate field-effect transistors based on poly(3-alkylthiophenes) with different alkyl chain lengths

The device characteristics of top-gate field-effect transistors (FETs) based on typical polymer semiconductor regioregular poly(3-alkylthiophenes) (P3ATs) with different alkyl chain lengths are investigated. High field-effect mobilities of ∼10⁻² cm²/Vs are obtained irrespective of alkyl chain length even when polymer gate insulators with different dielectric constants (2.1–3.9) are used. This is attributed to the spontaneous formation of highly ordered edge-on lamellar structures at the surface of P3AT thin films that are the channel regions in top-gate FETs. In addition, top-gate P3AT FETs containing different gate insulators exhibit high operational stability, with low threshold voltage shifts of <0.5 V following prolonged gate bias stress, which is comparable to that of hydrogenated amorphous silicon thin film transistors.     

Interface effect in pentacene field-effect transistors from high energy proton beam irradiation

We report the effect of irradiation using 10 MeV high energy proton beams on pentacene organic field-effect transistors (OFETs). The electrical characteristics of the pentacene OFETs were measured before and after proton beam irradiation with fluence (dose) conditions of 10¹², 10¹³, and 10¹⁴ cm⁻². After proton beam irradiation with fluences of 10¹² or 10¹³ cm⁻², the threshold voltage of the OFET devices shifted to the positive gate voltage direction with an increase in the current level and mobility. In contrast, for a high proton beam fluence condition of 10¹⁴ cm⁻², the threshold voltage shifted to the negative gate voltage direction with a decrease in the current level and mobility. It is evident from the electrical characteristics of the pentacene OFETs treated with a self-assembled monolayer that these experimental observations can be attributed to the trapped charges in the dielectric layer and pentacene/SiO₂ interface. Our study will enhance the understanding of the influence of high energy particles on organic field-effect transistors.     

Bottom-contact organic field-effect transistors based on single-crystalline domains of 6,13-bis(triisopropylsilylethynyl) pentacene prepared by electrostatic spray deposition

Large crystalline domains (a few hundred micrometers in size) of 6,13-bis(triisopropylsilylethynyl) pentacene (TIPS pentacene) were prepared by electrostatic spray deposition (ESD) and used as the active layers of bottom-contact organic field-effect transistors. The TIPS pentacene active layers were directly patterned via a shadow mask in the ESD process. The device, which had a 5-μm-long channel composed of a single-crystalline domain, exhibited a high field-effect mobility of more than 0.1 cm²/V s but resulted in a high threshold voltage of −17 V. The threshold voltage could be lowered to −6.4 V by reducing the thickness of the BC electrodes from 30 to 10 nm; this threshold voltage lowering was probably due to an improvement in the charge injection from the source electrode to the active layer.     

Complementary-like inverters based on an ambipolar solution-processed molecular bis(naphthalene diimide)-dithienopyrrole derivative

We report on high-mobility top-gate organic field-effect transistors (OFETs) and complementary-like inverters fabricated with a solution-processed molecular bis(naphthalene diimide)-dithienopyrrole derivative as the channel semiconductor and a CYTOP/Al₂O₃ bilayer as the gate dielectric. The OFETs showed ambipolar behavior with average electron and hole mobility values of 1.2 and 0.01 cm² V^?1 s^?1, respectively. Complementary-like inverters fabricated with two ambipolar OFETs showed hysteresis-free voltage transfer characteristics with negligible variations of switching threshold voltages and yielded very high DC gain values of more than 90 V/V (up to 122 V/V) at a supply voltage of 25 V.     

Transfer printing approach to all-carbon nanoelectronics

Transfer printing methods are used to pattern and assemble monolithic carbon nanotube (CNT) thin-film transistors on large-area transparent, flexible substrates. Airbrushed CNT thin-films with sheet resistance 1 kΩ sq⁻¹ at 80% transparency were used as electrodes, and high quality chemical vapor deposition (CVD)-grown CNT networks were used as the semiconductor component. Transfer printing was used to pre-pattern and assemble thin film transistors on polyethylene terephthalate (PET) substrates which incorporated Al₂O₃/poly-methylmethacrylate (PMMA) dielectric bi-layer. CNT-based ambipolar devices exhibit field-effect mobility in range 1-33 cm²/V s and on/off ratio ∼10³, comparable to the control devices fabricated using Au as the electrode material.     

Characteristics of tetracene-based field-effect transistors on pretreated surfaces

Tetracene-based organic thin-film transistors (OTFTs) were prepared using a neutral cluster beam deposition (NCBD) method. The effect of surface modification with an amphiphilic surfactant, octadecyltrichlorosilane (OTS), on the formation of thin films and the geometric influence of channel length and width on the transistor characteristics were systematically examined. The estimated trap density and temperature-dependence of the field-effect mobility in the range of 10–300 K demonstrated that surfactant pretreatment decreased the total trap density and activation energy for hole-transport by reducing structural disorder in the active layer. In particular, the room-temperature hole mobilities of 0.162 and 0.252 cm²/Vs for untreated and OTS-pretreated devices were among the best to date for polycrystalline tetracene-based transistors using SiO₂ gate dielectric layers without any thermal post-treatment.     

Organic field-effect transistors based on low-temperature processable transparent polymer dielectrics with low leakage current

A solution-based transparent polymer was investigated as the gate dielectric for organic field-effect transistors (OFETs). Organic thin films (400 nm) are readily fabricated by spin-coating a polyhydrazide solution under ambient conditions on the ITO substrates, followed by annealing at a low temperature (120 °C). The smooth transparent dielectrics exhibited excellent insulating properties with very low leakage current densities of ～10^?8 A/cm². High performance OFETs with evaporated pentacene as organic semiconductor function at a low operate voltage (?15 V). The mobility could reach as high as 0.7 cm²/Vs and on/off current ratio up to 10⁴. Solution-processed TIPS-pentacene OFETs also work well with this polymer dielectric.     

Inserting a Mn-doped TiO2 layer for improving performance of pentacene organic thin-film transistors

Device performance of pentacene organic thin-film transistors (OTFTs) was significantly improved via inserting a Mn-doped TiO₂ layer between pentacene semiconductor and the source–drain electrodes. In comparison with the OTFTs with only-Au electrodes, the introduction of a thin Mn-doped TiO₂ layer leads to saturation current increasing from 31.9 μA to 0.22 mA, effective field-effect mobility improving from 0.24 to 1.13 cm²/V s, and threshold voltage downshifting from −11 to −2 V. These performance enhancements are ascribed to the significant reduction of contact resistance and smoothed surface of pentacene layer. This work may provide an effective approach to improve the performance of the pentacene based OTFTs by inserting a Mn-doped TiO₂ layer.     

Dielectric surface-polarity tuning and enhanced operation stability of solution-processed organic field-effect transistors

The electrical performance of triethylsilylethynyl anthradithiophene (TES-ADT) organic field-effect transistors (OFETs) was significantly affected by dielectric surface polarity controlled by grafting hexamethyldisilazane and dimethyl chlorosilane-terminated polystyrene (PS-Si(CH₃)₂Cl) to 300-nm-thick SiO₂ dielectrics. On the untreated and treated SiO₂ dielectrics, solvent–vapor annealed TES-ADT films contained millimeter-sized crystals with low grain boundaries (GBs). The operation and bias stability of OFETs containing similar crystalline structures of TES-ADT could be significantly increased with a decrease in dielectric surface polarity. Among dielectrics with similar capacitances (10.5–11 nF cm⁻²) and surface roughnesses (0.40–0.44 nm), the TES-ADT/PS-grafted dielectric interface contained the fewest trap sites and therefore the OFET produced using it had low-voltage operation and a charge-carrier mobility ∼1.32 cm² V⁻¹ s⁻¹, on–off current ratio >10⁶, threshold voltage ∼0 V, and long-term operation stability under negative bias stress.     

Perylene diimides functionalized with N-thiadiazole substituents: Synthesis and electronic properties in OFET devices

Two new perylene diimide derivatives N,N′-bis(5-tridecyl-1,3,4-thiadiazol-2-yl)perylene-3,4,9,10-tetracarboxylic 3,4:9,10-diimide (PDI-T1) and N,N′-bis[5-(1-hexyl)nonyl-1,3,4-thiadiazol-2-yl]perylene-3,4,9,10-tetracarboxylic 3,4:9,10-diimide (PDI-T2), achieved by functionalizing the basic perylene molecular core at imide nitrogen with 1,3,4-thiadiazole rings, have been synthesized. Both these compounds make possible the fabrication of n-type organic thin-film transistors able to work in air, even when bare SiO₂ surfaces are utilized as gate dielectric. As active channels of transistors in the bottom-contact bottom-gate configuration, PDI-T1 evaporated films exhibited a maximum mobility of 0.016 cm²/V s in vacuum. For evaporated PDI-T2 films, instead, mobility values were found to be more than one order of magnitude lower, because of their reduced degree of crystalline order. However, PDI-T2 films can be also deposited by solution techniques and field-effect transistors were fabricated by spin-coating, displaying mobility values ranging between 10⁻⁶ and 10⁻⁵ cm²/V s. Similar to what previously found for other perylene diimide derivatives, our experimental work also demonstrates that the electrical response of both PDI-T1 and PDI-T2 transistors under ambient conditions can be improved by increasing the level of hydrophobicity of the dielectric surface.     

High‐Performance Amorphous Multilayered ZnO‐SnO2 Heterostructure Thin‐Film Transistors: Fabrication and Characteristics

Multilayered ZnO‐SnO₂ heterostructure thin films consisting of ZnO and SnO₂ layers are produced by alternating the pulsed laser ablation of ZnO and SnO₂ targets, and their structural and field‐effect electronic transport properties are investigated as a function of the thickness of the ZnO and SnO₂ layers. The performance parameters of amorphous multilayered ZnO‐SnO₂ heterostructure thin‐film transistors (TFTs) are highly dependent on the thickness of the ZnO and SnO₂ layers. A highest electron mobility of 43 cm²/V·s, a low subthreshold swing of a 0.22 V/dec, a threshold voltage of 1 V, and a high drain current on‐to‐off ratio of 10¹⁰ are obtained for the amorphous multilayered ZnO(1.5 nm)‐SnO₂(1.5 nm) heterostructure TFTs, which is adequate for the operation of next‐generation microelectronic devices. These results are presumed to be due to the unique electronic structure of amorphous multilayered ZnO‐SnO₂ heterostructure film consisting of ZnO, SnO₂, and ZnO‐SnO₂ interface layers.     

Flexible organic field-effect transistors with TIPS-Pentacene crystals exhibiting high electrical stability upon bending

Flexible organic field-effect transistors with high electrical stability upon bending are demonstrated on indium tin oxide coated polyethylene terephthalate substrates with TIPS-Pentacene semiconductor crystals formed by drop casting on a hybrid gate dielectric consisting hafnium dioxide grown by atomic layer deposition and spin coated poly(4-vinylphenol). Fabricated devices exhibited excellent p-channel characteristics with field-effect mobility up to 0.12 cm²/Vs with high current on/off ratio >10⁴ and low threshold voltage of −0.2 V. Device performance was slightly affected by mechanical strain applied by bending for 5 min with radius varying from 12.5 mm to as low as 5.0 mm; and a high stability in performance was demonstrated upon applying constant tensile strain for more than 48 h at bending radius of 5.0 mm. It was found that strain induced changes in the device performance primarily occur due to increase in dielectric surface roughness; and the semiconductor-dielectric interface uniformity is influenced more with magnitude of strain rather than its duration.