Investigation of Ambipolar Conduction and RF Stability Performance in Novel Germanium Source Dual Halo Dual Dielectric Triple Material Surrounding Gate TFET

Silicon - In this study, we present an ambipolar conduction and RF stability performance for a Germanium Source Dual Halo Dual Dielectric Triple Material Surrounding Gate Tunnel FET...     

Germanium Source Metal Drain Tunnel FET with Dual Dielectric Underlap

Silicon - In this paper, we propose, design and simulate a new double gate (DG) tunnel field effect transistor (TFET), using germanium (Ge) source, dual dielectric gate oxide, gate/drain underlap...     

Influence of Threshold Voltage Performance Analysis on Dual Halo Gate Stacked Triple Material Dual Gate TFET for Ultra Low Power Applications

Silicon - In this article, a two dimensional (2-D) threshold voltage modeling based gate and channel engineering are developed analytically for Dual Halo Gate Stacked Triple Material Dual Gate...     

Modeling and Simulation Based Investigation of Triple Material Surrounding Gate Tunnel FET for Low Power Application

Silicon - A two-dimensional analytical model is proposed in this paper for surface potential and drain current on Triple Material Surrounding Gate Junctionless Tunnel Field Effect Transistor...     

Low-K Dielectric Pocket and Workfunction Engineering for DC and Analog/RF Performance Improvement in Dual Material Stack Gate Oxide Double Gate TFET

Silicon - In this paper, we investigate the effect of low K dielectric pocket on DC and analog/RF performance in dual material stack gate oxide double gate tunnel field effect transistor. For this,...     

Optimization of Device Dimensions of High-k Gate Dielectric Based DG-TFET for Improved Analog/RF Performance

Silicon - The optimization of device dimensions along with high-k gate dielectric is investigated in this work for improving RF/analog performance of double gate (DG) TFET device. Through...     

Analog/RF Performance of Graded Channel Gate Stack Triple Material Double Gate Strained-Si MOSFET with Fixed Charges

Silicon - The performances of analog/RF parameters of a graded channel gate stack triple material double gate (GCGS-TMDG) strained-Silicon (s-Si) MOSFET with fixed charges are analyzed by using...     

Impact of Drain Underlap and High Bandgap Strip on Cylindrical Gate All Around Tunnel FET and its Influence on Analog/RF Performance

Silicon - This paper comprises of design and analysis of novel gate all around (GAA) cylindrical tunnel field effect transistor (TFET) using technology computer aided designing (TCAD) tool. The...     

Quantum Analytical Model for Lateral Dual Gate UTBB SOI MOSFET for Analog/RF Performance

Silicon - This paper presents a quantum analytical modeling of UTBB SOIMOSFET as lateral dual gate for the first time. In this paper, a 2-dimensional analytical modeling of electric field...     

Influence of Source Stack and Heterogeneous Gate Dielectric on Band to Band Tunneling Rate of Tunnel FET

In this paper, the presence of source stack and heterogeneous gate dielectric material in the structure of an n-channel tunnel FET (TFET) is investigated.     

Drain Current Modelling of Asymmetric Junctionless Dual Material Double Gate MOSFET with High K Gate Stack for Analog and RF Performance

Silicon - This paper presents the continuous 2D analytical modelling of electrostatic potential, threshold voltage (Vth), subthreshold swing, drain induced barrier lowering (DIBL) and drain current...     

Triple Metal Surrounding Gate Junctionless Tunnel FET Based 6T SRAM Design for Low Leakage Memory System

Silicon - The promising capability of Triple Material Surrounding Gate Junctionless Tunnel FET (TMSG – JL – TFET) based 6 T SRAM structure is demonstrated by employing...     

A 2-D Analytical Modeling of Dual Work Function Metal Gate MOSFET Using High-K Gate Dielectric with Enhanced RF/Analog Performance for Low Power Applications

A 2-dimensional electrostatic potential modeling of fully depleted channel, with high-k based dual work function double gate (DWFDG) MOSFET, has been devel     

Analytical Modelling and Simulation of Si-Ge Hetero-Junction Dual Material Gate Vertical T-Shaped Tunnel FET

Silicon - In this paper, a compact 2D analytical modelling of surface potential and simulation of Si-Ge hetero-junction Dual Material Gate Vertical t-shape T-FET is presented. In the proposed...     

Investigation of Charge-plasma Based Dopingless Tunnel FET for Analog/RF and Linear Applications

Silicon - Tunnel FET (TFET) based upon charged-plasma (CP) concept have came out as a potential Metal-Oxide-Semiconductor-Field-Effect-Transistor (MOSFET) replacement as it provides immunization...     

Dual-Channel Junctionless FETs for Improved Analog/RF Performance

Silicon - A dual-channel single gate junctionless FET (DCJLT) is investigated to improve the analog/RF performance. The gate of proposed structure is placed in a vertical trench and two channels...     

Performance Analysis of Heterojunction and Hetero Dielectric Triple Material Double Gate TFET

Silicon - The gate material work function engineering and hetero-dielectric engineering concepts are discussed in this paper to design a novel triple material DG Tunnel FET. The three different...     

Improved Drive Capability of Silicon Nano Tube Tunnel FET Using Halo Implantation

Silicon - In this paper, we focus on the improvement of comprehensive device performance of Silicon Nanotube Tunnel Field Effect Transistor (NT_TFET) for ultra low power applications. In the design...     

Improvement of Subthreshold Characteristics of Dopingless Tunnel FET Using Hetero Gate Dielectric Material: Analytical Modeling and Simulation

An improved subthreshold analytical model of Dual Material Double Gate Junctionless Tunnel FET (DMDG JLTFET) with stacked / hetero-dielectric gate oxide structure is proposed. The stacked gate oxide structure comprises of Silicon-dioxide (SiO₂) and Titanium Oxide (TiO₂). The high-K gate stack engineered device overcomes the Short Channel Effects (SCEs) caused by the ultrathin silicon devices. The subthreshold analysis is carried out by solving a two-dimensional Poisson’s equation using Parabolic approximation method. These characteristics are analyzed against various device parameters. Also, the impact of different high-K gate oxide materials with SiO₂ is also studied. A comparative analysis of short channel effects for DMDG TFET and DMDG JLTFET has been carried out. The results reveal that the proposed device provides better I_ON current, low leakage current and improved Transconductance-to-drain current ratio. Using TCAD Sentaurus device simulator, the subthreshold analytical model results have been simulated and verified with other TFET models.