高性能分段温度曲率补偿基准电压源设计

针对带隙基准电压源温漂高、电源抑制比(PSRR)低的问题,提出一种新颖的分段曲率补偿技术.该电路将基准源工作的全温度范围划分为3个区间,对各段温度区间进行不同的温度补偿,同时引入电流环负反馈结构,提高电路在低频时的电源抑制比,实现在-40～150℃内,温度系数为1.24×10-6,在DC时电源抑制比为-137dB.该电路采用TSMC0.6μmBCD工艺设计实现,芯片面积为0.5mm2,关断电流小于0.1μA,工作静态功耗为125μW.投片测试结果验证了电路设计的正确性,当电源电压为2.5～6.0V时,该基准源输出电压摆幅仅为0.220mV.     

一种CMOS高阶曲率补偿的带隙基准源电路的设计

为解决传统CMOS带隙基准电压源的温度系数较高的问题,采用高阶曲率补偿方法,提出了一种新型的带隙基准电压源,这种基准电压源的结构简单同时具有良好耗能性能,并且基准电压的温度系数得到一定的优化.利用NMOS管工作在亚阈值区域时漏电流和栅源电压的非线性特性,通过引入与基准电压温度系数成相反趋势的高阶补偿电流,降低基准电压的温度系数,以较少的硬件消耗为代价大幅提高了其温度特性,最后推导出补偿后的基准电压的计算公式.基于0.18μm BCD工艺进行仿真,结果表明:在-40℃~150℃温度范围内,基准电压的温度系数为6.94×10~(-6);电源电压VDD在2.5~5.0 V范围内,线性调整率为0.033%,电路在5 V电源电压为下工作电流为7.36μA;在典型工艺下(TT),电源抑制比(PSRR)为77.4 dB.基准电压的温度特性的理论分析结果与仿真结果吻合较好,通过高阶补偿后,带隙基准电压源表现出优良的性能,满足了带隙基准源的低功耗和低温漂的设计要求.     

高精度电流求和型分段曲率补偿的基准电流源

基于电流求和原理和跨导线性结构,设计了一款分段曲率补偿的基准电流源,并对电阻进行了温度特性优化。所设计的电路无需运算放大器,具有功耗低、结构简单、精度高和电源抑制比高等优点。在0.4 μm BCD工艺下,经HSPICE仿真验证表明,在-40℃~125℃的温度范围内电流仅变化0.06 μA,温度系数为27 ppm/℃;在25℃、7~20 V范围内,基准电流变化率0.000 68%/V;在12 V工作电压下,电路的静态电流为128.09 μA。该电路可用于高电压、低功耗、高精度的系统设计中。     

CMOS带隙基准电压源电路的模拟

利用CSMC0．6μmCMOS标准工艺及OrCAD模拟电路设计软件环境,设计了2种具有曲率补偿的带隙基准电压源电路,并用Hspice对电路的温漂、电源抑制比、电源电压稳定性及电路功耗进行了仿真。仿真结果表明,第1种在-20℃～130℃温度范围内,温度系数为29．97×10^-6／℃;第2种在-20℃～130℃温度范围内,温度系数为12．73×10^-6／℃。     

一种二阶曲率补偿的高精度带隙基准电压源

提出了一种输出电压可调的带隙基准电路．通过对双极晶体管基极-发射极电压的二阶温度补偿,大大改善了带隙基准的温度特性,并增加嵌套密勒补偿,进一步提高了系统的稳定性．基于0.6μm CMOS工艺,利用Hspice进行了仿真验证,结果表明,在-40～120℃温度范围内,0.8V基准电压的温度系数为6.1×10^-6／℃,低频时电源抑制比为-82dB,正常工作时静态工作电流小于6.5μA．     

一种高精度低温漂带隙基准源的设计

该文参考了带隙基准电压源领域的现阶段技术,结合自偏置共源共栅电流镜以及适当的启动电路、补偿电路,设计了一种高精度、低温漂的多输出带隙基准电路。首先简述了传统带隙电压基准的基本原理,然后详细阐述了具体的各电路设计过程。该基准电压源可广泛应用于电源管理芯片等对能耗要求极高的芯片中。     

一种高精度低温漂带隙基准电路的设计与实现

针对带隙基准电路对集成电路精度的影响,提出了一种新的低温漂带隙基准电路。通过分段温度补偿,补偿了带隙基准电路,减小了温度漂移,优化了基准的温度性能。基于西岳公司3μm18V双极工艺,设计了基准电路和版图,并进行流片。仿真和流片结果表明:在典型工艺角下,基准在-55℃~125℃内,温度系数为1.7×10 ^-6~6.0×10 ^-6/℃;在2.2V的电源幅度范围下,具有0.03 mV/V的电源抑制特性。该电路已成功应用于一款线性稳压电源中。     

一种结构简单的曲率补偿CMOS带隙基准源

提出了一种结构简单新颖的高性能曲率补偿带隙电压基准源．电路设计中没有采用典型结构中的差分放大器,而是采用负反馈技术实现电压箝位,简化了电路结构; 输出部分采用调节型共源共栅结构,保证了高的电源抑制比．整个电路采用SMIC 0.18μm标准CMOS工艺实现,并用HSPICE进行仿真,结果表明所设计的电路在-45℃～125℃范围内的温度系数为12.9×10^-6／℃,频率为10Hz时的电源抑制比为67.2dB．该结构可应用于高速模数转换器的设计中．     

带UVLO功能的CMOS零温度系数带隙基准

采用CMOS工艺设计了一种零温度系数的带隙基准与零温度系数欠压闭锁(UVLO)的复用电路。由于这种复用,使其与传统的采用BiCMOS或CMOS工艺设计的电路相比,工艺成本低,易于实现。电路由通过改进的带隙结构产生零温度系数的基准电压,并同时检测输入电压,产生对温度和工艺不敏感的输入电压检测信号跳变阈值,实现欠压闭锁。同时通过反馈实现迟滞,克服了单一阈值的弱抗干扰能力。     

一种二阶补偿的高精度带隙基准电压源设计

基于charter 0.35μm标准CMOS工艺,设计了一种带自启动电路的高精度、低温漂、低功耗带隙基准电压源。电路在传统带隙基准源的基础上进行改进,利用不同材料电阻温漂系数的比值实现二阶补偿。仿真结果表明,在-40-120℃范围内,输出电压达到1.148 V,平均温漂系数为4.9ppm/℃,功耗仅为57μW。     

A low drift curvature-compensated bandgap reference with trimming resistive circuit

A low temperature drift curvature-compensated complementary metal oxide semiconductor (CMOS) bandgap reference is proposed.A dual-differential-pair amplifier was employed to add compensation with a hig...     

Design of a low temperature coefficient bandgap reference with a wide temperature range

In order to meet the requirements of different applications and markets for the accuracy and reliability of IoT chips,a low temperature coefficient bandgap reference with a wide temperature range is proposed.On the basis of the traditional Banba bandgap reference structure,the circuit utilizes high-order temperature compensation technology and piecewise temperature compensation technology to improve the curvature of the output reference voltage.The temperature coefficient of the circuit is reduced.At the same time,the operating temperature range of the circuit is extended.The circuit performances are verified in the TSMC 180 nm CMOS process.Test results show that the temperature coefficient of the circuit is as low as 7.2×10^-6/℃ in the range of-40 ℃ to 160 ℃.The power supply rejection ratio at a low frequency is -48.52 dB.The static current under the 1.8 V power supply voltage is 68.38 μA,and the core area of the chip is 0.025 mm².     

Design of a trimmed current reference with a low temperature drift

Component tolerances and mismatches due to process variations severely degrade the performance of bandgap reference circuits. Based on device mismatch models, a current reference I_ref with adjustable output current from 15μA to 80μA is designed. A compensated circuit is used to reduce the temperature drift. To achieve more accurate current reference, an 8bit bi-directional trimming array with 127 current levels is proposed. This digitally programmable array is binary weighted for accuracy and flexibility. Simulation shows that the temperature coefficient is 26ppm/℃ over the wide range of -40℃ to 120℃when the output current is 15μA. Based on the CMOS 0.13μm technology, the measurement results show that the trimmed range and precision for current reference are -14.3％·I_ref～14.3％·I_ref and 0.11％·I_ref, respectively. The circuit could be applied to high precision A/D and D/A converters.     

A band-gap voltage reference for interface circuit of microsensor

A high performance CMOS band-gap voltage reference circuit that can be used in interface integrated circuit of microsensor and compatible with 0. 6 μm ( double poly) mix process is proposed in this paper. The circuit can be employed in the range of 1. 8 - 8 V and carry out the first-order PTAT ( proportional to absolute temperature) temperature compensation. Through using a two-stage op-amp with a NMOS input pair as a negative feedback op-amp,the PSRR ( power supply rejection ratio) of the entire circuit is increased,and the temperature coefficient of reference voltage is decreased. Results from HSPICE simulation show that the PSRR is - 72. 76 dB in the condition of low-frequency,the temperature coefficient is 2. 4 × 10 -6 in the temperature range from - 10 ℃ to 90 ℃ and the power dissipation is only 14 μW when the supply voltage is 1. 8 V.