垂直腔面发射激光器中GaAs/AlGaAs的选择性刻蚀技术研究

在氧化物限制型垂直腔面发射激光器制备中,刻蚀GaAs/AlGaAs时因异质型材料常出现选择性内蚀现象,这会直接影响后续的氧化工艺及电极钝化的效果。针对因选择性内蚀而出现的"镂空"现象,对湿法刻蚀工艺和干法刻蚀工艺进行详细研究,研究结果表明通过调整刻蚀液体积配比和感应耦合等离子体(ICP)刻蚀下电极射频功率可有效消除"镂空"现象。湿法刻蚀中,当刻蚀液H_3PO_4-H_2O_2-H_2O各物质体积配比为1\:1\:10时,得到了陡直度较好且光滑的侧壁。ICP干法刻蚀时,通过改变下电极RF功率可调整腔室内的化学刻蚀和物理刻蚀的动态平衡,在下电极射频功率为100 W时,"镂空"现象基本消失,且侧壁陡直度大于80°。     

常压射频激励低温冷等离子体刻蚀光刻胶

介绍了一种新型的常压射频激励低温冷等离子体喷射装置,利用电流和电压探针研究了该等离子体的放电特性,利用热电偶研究了喷射出的等离子体束流温度,得到其放电与传统的真空室中电容耦合放电具有一致的特性.利用该等离子体装置在大气压下对AZ9918光刻胶进行了干法刻蚀实验,用电镜观察了刻蚀留胶前后硅表面的效果,研究了放电等离子体功率以及衬底温度对刻蚀速率的影响,在放电功率为300W时,得到刻蚀速率接近500nm/min.     

常压射频激励低温冷等离子体刻蚀光刻胶

介绍了一种新型的常压射频激励低温冷等离子体喷射装置,利用电流和电压探针研究了该等离子体的放电特性,利用热电偶研究了喷射出的等离子体束流温度,得到其放电与传统的真空室中电容耦合放电具有一致的特性．利用该等离子体装置在大气压下对AZ9918光刻胶进行了干法刻蚀实验,用电镜观察了刻蚀留胶前后硅表面的效果,研究了放电等离子体功率以及衬底温度对刻蚀速率的影响,在放电功率为300W时,得到刻蚀速率接近500nm/min．     

基于高深宽比Si干法刻蚀参数优化

为满足体硅MEMS制造工艺进一步发展的需要,对电感耦合等离子体(ICP)刻蚀工艺参数进行了深入分析,着重分析了平板功率对Si干法刻蚀的影响。通过对Si干法刻蚀的主要工艺参数进行正交试验,得出了一组较为理想的刻蚀工艺参数:刻蚀气体SF6和保护气体C4F8的流量均为13cm3·min-1,在一个周期内通入刻蚀气体SF6的时间为4s,通入钝化气体C4F8的时间为3s;线圈功率为400W,平板功率为110W。利用这组优化的工艺参数进行Si的干法刻蚀,所得到的微结构的深宽比将大于20∶1,同时侧壁垂直度能够很好地控制在90°±1°。     

4H-SiC材料干法刻蚀工艺的研究

鉴于SiC材料具有很强的稳定性以及湿法刻蚀的种种缺点,目前主要使用干法刻蚀来刻蚀SiC材料。但是干法刻蚀后样品表面的粗糙度对器件的性能有一定的影响。针对这一问题,采用电感耦合等离子体-反应离子刻蚀技术,对SiC材料进行SF₆/O₂混合气体和SF₆/CF₄/O₂混合气体的刻蚀,并且探究了压强、ICP功率和混合气体比例对样品表面粗糙度的影响。实验结果表明使用SF₆/O₂混合气体刻蚀后,样品的表面平整度较好。在一定RIE功率条件下,当ICP功率为700 W、压强为20 mT和SF₆/O₂为50/40 sccm时,样品表面的粗糙度最小。     

碲镉汞p型接触孔低损伤干法刻蚀技术研究

对碲镉汞材料干法刻蚀损伤进行研究,采用感应耦合等离子体干法刻蚀技术、湿法腐蚀方法完成碲镉汞接触孔刻蚀,通过扫描电子显微镜和激光扫描显微镜分析刻蚀后样品的表面形貌,利用伏安特性曲线分析刻蚀样品的表面损伤。实验结果表明,干法刻蚀工艺极易造成碲镉汞p型接触孔表面反型,提出了一种新型的干法混合刻蚀技术,该技术通过两步干法刻蚀工艺实现,有效地降低了刻蚀引入的表面损伤。     

掺镁铌酸锂晶体的ICP刻蚀性能

掺镁铌酸锂晶体(Mg:LiNbO3)是一种相对难刻蚀的晶体,Mg:LiNbO3的干法刻蚀速率和刻蚀形貌控制是铌酸锂光电子器件加工中的关键技术之一。采用牛津仪器公司的Plasmalab System 100以SF6/Ar为刻蚀气体,具体研究Mg:LiNbO3的刻蚀速率随着感应耦合等离子体(ICP)功率、反应离子刻蚀(RIE)功率、气室压强和气体流量配比等刻蚀参数的变化,同时研究发现SF6/(Ar+SF6)气体流量配比还会影响刻蚀表面的粗糙度。实验结果表明:在ICP功率为1000W,RIE功率为150W,标准状态(0℃,1个标准大气压)下气体总流量为52mL/min,压强为0.532Pa,SF6/(Ar+SF6)气体体积分数为0.077的条件下,刻蚀速率可达到152nm/min,刻蚀表面粗糙度为1.37nm,可获得刻蚀深度为2.5μm,侧壁角度为74.8°的表面平整脊形Mg:LiNbO3结构。     

基于SiCl4/SF6的GaAs/AlAs ICP选择性干法刻蚀

报道了GaAs/AlAs的电感耦合等离子体(ICP)选择性干法刻蚀,刻蚀气体为SiCl4/SF6混合物.研究了在不同SiCl4/SF6气体配比、RF偏压电源功率和气室压力下,GaAs,AlAs的平均刻蚀速率与二者的选择比.合适的SiCl4/SF6气体比例(15/5sccm),低的RF偏压电源功率和高的气室压力将加强AlF3非挥发性生成物的形成,进而提高GaAs/AlAs的选择比.在SiCl4/SF6气体比例为15/5sccm,RF偏压电源功率为10W,主电源功率为500W,气室压力为2Pa时,GaAs/Al-As的选择比达1500以上.采用喇曼光谱仪对不同RF偏压电源功率和气室压力下,GaAs衬底被刻蚀面等离子体损伤进行了测试,表面形貌和被刻蚀侧壁分别采用原子力显微镜(AFM)和扫描电镜(SEM)进行观察.     

基于SiCl4/SF6的GaAs/AlAs ICP选择性干法刻蚀

报道了GaAs/AlAs的电感耦合等离子体(ICP)选择性干法刻蚀,刻蚀气体为SiCl4/SF6混合物.研究了在不同SiCl4/SF6气体配比、RF偏压电源功率和气室压力下,GaAs,AlAs的平均刻蚀速率与二者的选择比.合适的SiCl4/SF6气体比例(15/5sccm),低的RF偏压电源功率和高的气室压力将加强AlF3非挥发性生成物的形成,进而提高GaAs/AlAs的选择比.在SiCl4/SF6气体比例为15/5sccm,RF偏压电源功率为10W,主电源功率为500W,气室压力为2Pa时,GaAs/Al-As的选择比达1500以上.采用喇曼光谱仪对不同RF偏压电源功率和气室压力下,GaAs衬底被刻蚀面等离子体损伤进行了测试,表面形貌和被刻蚀侧壁分别采用原子力显微镜(AFM)和扫描电镜(SEM)进行观察.     

ICP刻蚀GaP研究及对LED性能的影响

深入研究了GaP材料在高密度感应耦合等离子体刻蚀系统中刻蚀选择比和刻蚀速率随刻蚀系统的源功率、射频功率、腔室压强的变化规律,即通过改变其中一个参数而保持其它参数不变来得出变化规律;同时将刻蚀GaP材料应用到红光LED制作,即电流阻挡层和表面粗化这两种工艺中,通过大量试验,得到了刻蚀形貌和最优的刻蚀条件,制作阻挡层的最优条件为:BCl3流量比为3/1,ICP功率为600W,RF功率为100W,腔室压强为1.0×10-2Pa;表面粗化时只用BCl3气体刻蚀,表面粗化后LED的光强提高了30%。     

防离子反馈膜粒子阻透率随环境温度变化的模拟研究

覆有防离子反馈膜的微通道板是第三代微光像增强器的核心部件之一。真空高温烘烤除气过程对防离子反馈膜粒子阻透特性会产生破坏性的影响。文中利用分子动力学方法模拟计算并得到Al2O3 薄膜的膜层密度随环境温度的变化规律。利用蒙特卡洛方法模拟计算了Al2O3 薄膜的电子透过率和离子阻挡率随入射粒子能量的变化曲线。得到Al2O3 薄膜的死电压在235 V 左右,同时得出防离子反馈膜离子阻挡率在入射离子能量降低后有所增加。在入射离子能量降低为250 eV 时,C、N、O 离子被Al2O3 薄膜阻挡的比率高达96%-99%。综合以上因素分析得出,随着外部温度的升高,电子透过率线性增加,而离子阻挡率非线性的下降。合理优化并调整高温烘烤时间和量值将有助于防离子反馈膜工作性能的改善。     

高Al组分In1-xAlx Sb/InSb的MBE生长研究

高Al(10%~15%)组分的In1-xAlx Sb层可作为势垒层以抑制隧穿暗电流、提高器件工作温度而显得很重要。采用分子束外延的方法对InSb(100)衬底高Al组分的In1-xAlx Sb/InSb外延生长进行了实验探索,确定出了Al组分(约12.5%)并讨论了Al组分梯度递变的In1-xAlx Sb缓冲层和生长温度对外延薄膜质量的影响。     

An experimental study of the indium antimonide thin film transistor

In this paper a survey is given of our experimental investigations on the InSb thin film transistor (TFT). The best characteristics were obtained on a two-sided thin film transistor, made by flash evaporations of InSb on a heated substrate of 250°C, followed by an annealing at 350°C for 30 minutes. Furthermore it was found that the presence of minority carriers obstruct the saturation of the transistor characteristics at room temperature. This negative influence of the minority carriers is weakened at lower temperatures, which makes the InSb TFT more attractive for operations in a cryogenic environment.     

电学性能不反常的本征GaAs基InSb异质外延研究

采用三步工艺进行了GaAs基InSb的异质外延生长并结合实验数据和文献资料研究了生长温度和速率、InSb层的厚度、低温缓冲层质量和双In源工艺对材料Hall电学性能等的影响。发现温度和生长速率对室温载流子迁移率和本征载流子浓度影响不太大;晶体XRD FWHM随膜厚的增加而逐渐地减小;低温缓冲层的界面质量和厚度对表面形貌具有一定的影响,低温缓冲层的界面厚度不应小于30 nm,ALE低温缓冲层的方法可以降低局部表面粗糙度;实验发现在优化的工艺参数基础上采用双In源生长工艺可以生长出电学性能不发生反常的理想本征InSb异质外延薄膜材料。获得2μm厚GaAs基InSb层在300 K和77 K的Hall迁移率分别为3.6546×104 cm^2 V^-1 s^-1和7.9453×104 cm^2 V^-1 s^-1,本征载流子迁移率和电子浓度随温度的变化符合理论公式的预期。     

Fabrication of high sensitivity thin-film indium antimonide magnetoresistors

A method is described for fabricating high-sensitivity thin film of InSb. The fabrication procedure consists of the sequential deposition of chromium, antimony and indium. The films are then heat treated to thermo-chemically produce polycrystalline InSb films. The free-electron mobility of these films is found to be 5.4 × 10⁴ cm²/V. sec, and the free carrier density to be 10¹⁶ cm^?3.Magnetoresistors were fabricated from these films with addition of indium, Hall-voltage shorting strips. The magnetoresistance sensitivity of these resistors was found to be 45 per cent K G, which compares very favourably with that obtained from single crystal InSb resistors.     

Processing and Characterization of Dry-Etch Benzocyclobutene as Substrate and Packaging Material for Neural Sensors

Electrode substrate is one of the most important factors affecting the recording or stimulation efficiency and long-term stability of chronically implanted neural sensors for laboratory research. Various biocompatible polymers have been investigated as potential substrate and packaging material for neural sensors in neuroscience research applications. Dry-etch benzocyclobutene (BCB) is one candidate due to its desirable combination of electrical, mechanical, and thermal properties and its biocompatibility. In this paper, processing techniques were investigated to control the uniformity and pin-pole density of dry-etch BCB film. Dry-etch BCB film as thick as 25 mum with a surface roughness less than 1000 A and a pinhole density less than 1.5 x 10^-3 mm^-2 has been acquired using an optimized coating and curing recipe. A traditional surface micro-machining technique was used to form the metallization and etch masks during the fabrication of the neural electrode based on dry-etch BCB substrate. Special consideration was given to the study of dry-etch BCB thin film patterning using plasma reactive ion etching dry etching. The optimized plasma etch condition shows that greater than 1 mum etch rate and 65deg via angle are the most suitable for the packaging and patterning of the neural probes. The results show that this fabrication process is optimal for chronically implantable neural sensors based on dry-etch BCB thin film as substrate. The process may find applications in other devices using BCB as substrate.     

Pb（Zrx，Ti1-x）O3成分梯度铁电薄膜的制备、结构及电性能表征

采用Sol-Gel方法,通过快速热处理,在Pt/Ti/SiO2/Si衬底上制备出Pb(Zrx,Ti1-x)O3成分梯度薄膜.经俄歇微探针能谱仪(AES)对制备的"上梯度"薄膜进行了成分深度分析,结果证实其成分梯度的存在.经XRD分析表明,制备的梯度薄膜为四方结构和三方结构的复合结构,但其晶面存在一定的结构畸变.经介电频谱测试表明,梯度薄膜的介电常数比每个单元的介电常数都大,但介电损耗相近.在10 kHz时,上、下梯度薄膜的介电常数分别为206和219.经不同偏压下电滞回线的测试表明,上、下梯度薄膜均表现出良好的铁电性质,其剩余极化强度Pr分别为24.3和26.8 μC·cm-2.经热释电性能测试表明,热释电系数随着温度的升高逐渐增加,室温下上、下梯度薄膜的热释电系数分别为5.78和4.61×10-8 C·cm-2K-1,高于每个单元的热释电系数.     

基于热扩散制备平面PN结InSb红外焦平面芯片

研究了一种基于在锑化铟衬底材料上以热扩散工艺制备平面PN结的红外焦平面阵列(IRFPA)探测器芯片结构及其工艺流程。根据锑化铟材料的特性设计了新的焦平面器件制备流程,选择了等离子增强化学气相淀积(PECVD)淀积的非晶氧化硅(SiO2)、氮氧化硅(SiON)薄膜作为扩散工艺中的掩膜材料。在此基础上制备出了具有较好的I-V特性曲线的焦平面芯片。     

Effect of substrate bias on the properties of plasma deposited organosilicone (pp-HMDSN) thin films

Organosilicone thin films have been deposited by plasma polymerization (pp) in a plasma enhanced chemical vapor deposition (PECVD) system using hexamethyldisilazane (HMDSN:C6H19Si2N) as a monomer precursor, at different biases of the stainless-steel substrate holder. The substrate bias affected film thickness, surface morphology, chemical composition and photoluminescence (PL) emission. For a negatively biased substrate, it is found that the film thickness is the minimum, while the porosity and PL emission are the maximum. For a positively biased substrate, the thickness and the ratio of Si/N are the maximum which correspond to a blue shift of the PL emission in comparison with the case of non-biased grounded substrate. In addition, the characterization of the plasma using a single cylindrical Langmuir probe has been performed to obtain information about both the electron density and the positive ion energy, where it can be concluded that the ion energy plays a major role in determining film thickness.     

Fabrication of microcrystalline silicon TFTs using a high-densityplasma approach

N-channel microcrystalline silicon (mc-Si) thin film transistors (TFTs) were fabricated using a high density plasma (HDP) approach. An electron cyclotron resonance (ECR) plasma source was employed to deposit all of the thin film materials needed for the transistor; that is, intrinsic mc-Si, n-type mc-Si, and dielectric silicon dioxide were grown with the ECR high density plasmas and the deposition rates for these films were in the range of 120-150 Å/min. The substrate temperatures during these depositions were maintained below 285°C. To complete the fabrication of these TFTs, we used only two masks with one alignment. After 1 h annealing under forming gas atmosphere, the mc-Si TFTs perform with linear field effect mobility of 12 cm²/V-s, on/off ratio of 10⁶, subthreshold swing of 0.3 V/decade, off-current of 4×10^-13 A/μm and threshold voltage of 5 V