Compact CMOS implementation of a low‐power,current‐mode programmable cellular neural network

We report on the design and characterization of a full‐analog programmable current‐mode cellular neural network (CNN) in CMOS technology. In the proposed CNN, a novel cell‐core topology, which allows for an easy programming of both feedback and control templates over a wide range of values, including all those required for many signal processing tasks, is employed. The CMOS implementation of this network features both low‐power consumption and small‐area occupation, making it suitable for the realization of large cell‐grid sizes. Device level and Monte Carlo simulations of the network proved that the proposed CNN can be successfully adopted for several applications in both grey‐scale and binary image processing tasks. Results from the characterization of a preliminary CNN test‐chip (8×1 array), intended as a simple demonstrator of the proposed circuit technique, are also reported and discussed. Copyright © 2001 John Wiley & Sons, Ltd.     

CNN-based difference-controlled adaptive non-linear image filters

In this paper, we develop a common cellular neural network framework for various adaptive non-linear filters based on robust statistic and geometry-driven diffusion paradigms. The base models of both approaches are defined as difference-controlled non-linear CNN templates, while the self-adjusting property is ensured by simple analogic (analog and logic) CNN algorithms. Two adaptive strategies are shown for the order statistic class. When applied to the images distorted by impulse noise both give more visually pleasing results with lower-frequency weighted mean square error than the median base model. Generalizing a variational approach we derive the constrained anisotropic diffusion, where the output of the geometry-driven diffusion model is forced to stay close to a pre-defined morphological constraint. We propose a coarse-grid CNN approach that is capable of calculating an acceptable noise-level estimate (proportional to the variance of the Gaussian noise) and controlling the fine-grid anisotropic diffusion models. A combined geometrical–statistical approach has also been developed for filtering both the impulse and additive Gaussian noise while preserving the image structure. We briefly discuss how these methods can be embedded into a more complex algorithm performing edge detection and image segmentation. The design strategies are analysed primarily from VLSI implementation point of view; therefore all non-linear cell interactions of the CNN architecture are reduced to two fundamental non-linearities, to a sigmoid type and a radial basis function. The proposed non-linear characteristics can be approximated with simple piecewise-linear functions of the voltage difference of neighbouring cells. The simplification makes it possible to convert all space-invariant non-linear templates of this study to a standard instruction set of the CNN Universal Machine, where each instruction is coded by at most a dozen analog numbers. Examples and simulation results are given throughout the text using various intensity images. © 1998 John Wiley & Sons, Ltd.     

Preliminary results from an analog implementation of first‐order TDCNN dynamics

This work falls into the category of linear cellular neural network (CNN) implementations. We detail the first investigative attempt on the CMOS analog VLSI implementation of a recently proposed network formalism, which introduces time‐derivative ‘diffusion’ between CNN cells for nonseparable spatiotemporal filtering applications—the temporal‐derivative CNNs (TDCNNs). The reported circuit consists of an array of Gm‐C filters arranged in a regular pattern across space. We show that the state–space coupling between the Gm‐C‐based array elements realizes stable and linear first‐order (temporal) TDCNN dynamics. The implementation is based on linearized operational transconductance amplifiers and Class‐AB current mirrors. Measured results from the investigative prototype chip that confirms the stability and linearity of the realized TDCNN are provided. The prototype chip has been built in the AMS 0.35 µm CMOS technology and occupies a total area of 12.6 mm sq, while consuming 1.2 µW per processing cell. Copyright © 2010 John Wiley & Sons, Ltd.     

Automatic detection and tracking of moving image target with CNN‐UM via target probability fusion of multiple features

A high speed target detection and tracking algorithm for a CNN‐UM chip is presented in this paper. The target confidence value is computed based on the fusion of target existence probabilities of features using products of weighted sums. The target decision is done with such a confidence value and target initiation is done through the temporal accumulation of the confidence. The probability of the target existence for each feature is created in the region of influence depending on the reliability and the strength of the feature. By virtue of the analogic parallel processing structure of the CNN‐UM (Roska T, Chua LO. The CNN universal machine: an analogic array computer. IEEE Trans. Circuits Systems II 1993; CAS‐40 : 163–173), real time tracking can be achieved with presently available technologies with the speed of several kilo‐frames per second. Due to the utilization of multiple features of target, robust target detection is possible via the proposed algorithm. On‐chip experiments of the proposed target‐tracking algorithm have been done and properties of the proposed approach are disclosed through the various experiments. Copyright © 2003 John Wiley & Sons, Ltd.     

2D operators on topographic and non‐topographic architectures—implementation,efficiency analysis,and architecture selection methodology

Topographic and non‐topographic image processing architectures and chips, developed within the CNN community recently, are analyzed and compared. It is achieved on a way that the 2D operators are collected to classes according to their implementation methods on the different architectures, and the main implementation parameters of the different operator classes are compared. Based on the results, an efficient architecture selection methodology is formalized. Copyright © 2010 John Wiley & Sons, Ltd.     

Robustness of cellular neural networks in image deblurring and texture segmentation

Template parameters of cellular neural networks (CNNs) should be robust enough to random variability of VLSI tolerances and noise. Using the CNN for image processing, one of the main problems is the robustness of a given task in a real VLSI chip. It will be shown that very different tasks such as 2D or 3D deconvolution and texture segmentation can be solved in a real VLSI CNN environment without significant loss of efficiency and accuracy under low precision (about 6–8 bits) and random variability of the VLSI parameters. The CNN turns out to be very robust against template noise, image noise, imperfect estimation of templates and parameter accuracy. The parameters of a template are tuned using genetic learning. These optimized parameters depend on the precision of the architecture. It was found that about 6–8 bits of precision is enough for a complicated multilayer deconvolution, while only 4 bits of precision is enough for difficult texture segmentation in the presence of noise and parameter variances. The tolerance sensitivity of template parameters is considered for VLSI implementation. Theory and examples are demonstrated by many results using real-life microscopic images and natural textures.     

Pixel‐level snakes on the CNNUM: algorithm design,on‐chip implementation and applications

In this paper, a new algorithm for the cellular active contour technique called pixel‐level snakes is proposed. The motivation is twofold: on the one hand, a higher efficiency and flexibility in the contour evolution towards the boundaries of interest are pursued. On the other hand, a higher performance and suitability for its hardware implementation onto a cellular neural network (CNN) chip‐set architecture are also required. Based on the analysis of previous schemes the contour evolution is improved and a new approach to manage the topological transformations is incorporated. Furthermore, new capabilities in the contour guiding are introduced by the incorporation of inflating/deflating terms based on the balloon forces for the parametric active contours. The entire algorithm has been implemented on a CNN universal machine (CNNUM) chip set architecture for which the results of the time performance measurements are also given. To illustrate the validity and efficiency of the new scheme several examples are discussed including real applications from medical imaging. Copyright © 2005 John Wiley & Sons, Ltd.     

Implementation of an OFDM underwater acoustic communication system,on an underwater vehicle with multiprocessor structure

Orthogonal frequency division multiplexing (OFDM) can fully use the frequency band and transmit data at high speeds. The ADSP-TS101 is a high performance digital signal processor (DSP) with good properties that include parallel processing and a high speed. Aimed at the real-time processing requirement of the OFDM algorithm, an underwater acoustic communication system with real-time processing capability is carried out. The system is mainly composed of multiple ADSP-TS101s, a multi-channel synchronous sample module and a field programmable gate array (FPGA) chip. The multiprocessor structure is made up of a cluster/data flow associated multiprocessing parallel processing structure as the operation kernel, and a multi-channel synchronous sample module is designed to realize no phase warp among the multiple channels’ data at the same time. The digital modulation/demodulation methods are applied to the OFDM algorithm. Through experiments in a lake, the results show that the system has good stability and real-time processing capability, thus satisfying the design requirements.     

基于FPGA的高速线阵CCD图像采集系统

针对传统采集方式不灵活的特点设计了一种以FPGA为控制核心的高速图像采集系统.该系统选用线阵CCD作为图像信号采集芯片,采用FPGA产生与控制整个系统的时序,通过A/D对采集到的信号进行处理,最后通过以太网将信号传至上位机.此系统在图像数据的高速实时采集和处理上具有很大优势,且整体电路设计简单、直观、稳定、易修改,还具有设计灵活,传输速度快等特点.实验表明该系统可以有效地完成图像信号的采集,并且具备良好的稳定性与抗噪性.     

Adaboost算法并行硬件架构研究与FPGA验证

Adaboost算法级联目标检测方案使人脸检测向高速实时化迈进了一大步。但是该算法的计算复杂度高,需要存取的数据量非常大,如果采用纯软件的实现方案,会耗费相当多的CPU以及内存资源,难以达到实时检测的要求。本文分析了现有的Adaboost算法硬件架构,对访存效率,耗费的逻辑资源,检测速度等进行了分析,提出了一种基于检测窗口的阵列结构,利用硬件流水特性大大加速了检测过程。本设计通过Xilinx的Spartan3A-DSP型FPGA验证,可满足高清实时人脸检测的要求。     

基于OpenCV和 YOLOv5的车道线检测与识别

为更加快速、准确识别汽车行驶区域并区分车道,实现无人驾驶,提出一种结合视觉OpenCV 算法和改进 YOLOv5算 法的目标检测跟踪模型进行车道线检测的方法。在图像预处理阶段,首先读取视频图像,把每一帧RGB图像转为灰度图,通 过Canny 算子对图像的边缘轮廓进行提取,然后绘制车道线的掩码区域,并与边缘检测结合,采用ROI 技术提取感兴趣区域, 最后进行概率霍夫变换和最小二乘拟合,将得到的直线绘制到原图像中,最终对每一帧处理后的图像进行输出。目标识别模 块采用卷积神经网络(convolutional neural network,CNN)深度学习方法及 YOLOv5算法进行目标识别处理。实验结果表 明,所提检测算法能够实现准确的车道线检测,实时性和准确性比传统算法高很多,且该方法具有良好的鲁棒性。     

Smart CMOS focal plane arrays: a Si CMOS detector array andsigma-delta analog-to-digital converter imaging system

This paper evaluates the potential for the real-time utilization of high frame rate image sequences using a fully parallel readout system. Multiple readout architectures for high frame rate imaging are compared. The application domain for a fully parallel readout system is identified, and the design for a fully parallel, monolithically integrated smart CMOS focal plane array is presented. This focal plane image processing chip, with an 8×8 array of Si CMOS detectors each of which have a dedicated on-chip current input first-order sigma-delta analog-to-digital converter front end, has been fabricated, and test results for uniformity and linearity are presented     

The network behind spatio‐temporal patterns: building low‐complexity retinal models in CNN based on morphology,pharmacology and physiology

In this paper, a vertebrate retina model is described based on a cellular neural network (CNN) architecture. Though largely built on the experience of previous studies, the CNN computational framework is considerably simplified: first‐order RC cells are used with space‐invariant nearest‐neighbour interactions only. All non‐linear synaptic connections are monotonic continuous functions of the pre‐synaptic voltage. Time delays in the interactions are continuous represented by additional first‐order cells. The modelling approach is neuromorphic in its spirit relying on both morphological and pharmacological information. However, the primary motivation lies in fitting the spatio‐temporal output of the model to the data recorded from biological cells (tiger salamander). In order to meet a low‐complexity (VLSI) implementation framework some structural simplifications have been made. Large‐neighbourhood interaction (neurons with large processes), furthermore inter‐layer signal propagation are modelled through diffusion and wave phenomena. This work presents novel CNN models for the outer and some partial models for the inner (light adapted) retina. It describes an approach that focuses on efficient parameter tuning and also makes it possible to discuss adaptation, sensitivity and robustness issues on retinal ‘image processing’ from an engineering point of view. Copyright © 2001 John Wiley & Sons, Ltd.     

Pulse-domain digital image processing for vision chips employing low-voltage operation in deep-submicrometer technologies

A new architecture for pixel-level parallel image processing in the pulse domain for CMOS vision chips has been developed. Image processing such as edge enhancement, edge detection, and blurring are realized based on suppression and promotion of digital pulses; the pixel value is represented by the frequency of digital pulses by use of a pulse-frequency modulation (PFM) photosensor or that with an in-pixel 1-bit analog-to-digital converter. The proposed architecture is suitable for low-voltage operation in deep-submicrometer technologies because the image processing is implemented by 1-bit fully digital circuits with a small number of logic gates. The principles of the image processing are addressed. We have fabricated a 16 /spl times/ 16-pixel prototype vision chip. The relationship between illumination and the output pulse frequency is characterized. Step responses of the prototype vision chip for fundamental image processing operations show good agreement with those expected by correlation-based spatial filtering. A simple image binarization method specific to our architecture is also presented. The histograms of the intervals of the output pulses after image processing show multiple peaks, which indicates that averaging of the intervals is required for longer periods to achieve higher image-processing quality. To improve the linearity of pulse frequency dependence on illumination, usage of random clocks is discussed.     

A new approach for edge detection of noisy image based on CNN

A new approach for edge detection of noisy image by cellular neural network (CNN) is proposed in this paper. In order to get the reasonable template, the statistical characteristics of image are utilized, and Gibbs image model is employed to describe the stochastic dependence of an edge pixel on its neighbourhood. Based on stochastic edge image models, edge detection of noisy image is equivalent to seeking a minimum of a cost function. If the template of CNN is designed carefully, the energy function can be mapped properly to the cost function of stochastic edge image model, then CNN can be used for seeking the minimum of cost function. Genetic algorithm is efficient in the field of optimization, and we also utilized this algorithm to get the correct form of template. The results of computer simulation confirm that the new approach is very effective. Furthermore, this result also confirms that we can design template for many different questions based on statistical image model, and the area of application of CNN will be widened. Copyright © 2003 John Wiley & Sons, Ltd.     

基于FPGA的稀疏卷积神经网络加速器设计

剪枝是一种减少卷积神经网络权重和计算量的有效方法,为CNN的高效部署提供了解决方案。但是,剪枝后的稀疏CNN中权重的不规则分布使硬件计算单元之间的计算负载各不相同,降低了硬件的计算效率。文章提出一种细粒度的CNN模型剪枝方法,该方法根据硬件加速器的架构将整体权重分成若干个局部权重组,并分别对每一组局部权重进行独立剪枝,得到的稀疏CNN在加速器上实现了计算负载平衡。此外,设计一种具有高效PE结构和稀疏度可配置的稀疏CNN加速器并在FPGA上实现,该加速器的高效PE结构提升了乘法器的吞吐率,同时可配置性使其可灵活地适应不同稀疏度的CNN计算。实验结果表明,提出的剪枝算法可将CNN的权重参数减少50%～70%,同时精度损失不到3%。相比于密集型加速器,提出的加速器最高可实现3.65倍的加速比;与其他的稀疏型加速器研究相比,本研究的加速器在硬件效率上提升28%～167%。     

Real-time removal of impulse noise from MR images for radiosurgery applications

In the recent years, image processing techniques are used as a tool to improve detection and diagnostic capabilities in the medical applications. Among these techniques, medical image enhancement algorithms play an essential role in the removal of the noise, which can be produced by medical instruments and during image transfer. Impulse noise is a major type of noise, which is produced by medical imaging systems, such as MRI, computed tomography (CT), and angiography instruments. An embeddable hardware module, which can denoise medical images before and during surgical operations, could be very helpful. In this paper, an accurate algorithm is proposed for real-time removal of impulse noise in medical images. Our algorithm categorizes all image blocks into three types of edge, smooth, and disordered areas. A different reconstruction method is applied to each category of blocks for noise removal. The proposed method is tested on MR images. Simulation results show acceptable denoising accuracy for various levels of noise. Also, an field programmable gate array (FPGA) implementation of our denoising algorithm shows acceptable hardware resource utilization. Hence, the algorithm is suitable for embedding in medical hardware instruments such as radiosurgery devices.     

基于CPU+GPU混合架构的改进型距离徙动算法设计与实现

改进型距离徙动算法是距离徙动算法的一种改进算法,相比于距离徙动算法,该算法可对任意距离切面成像,且无需插值,成像精度更高。改进型距离徙动算法的计算量大,单CPU难以满足实时成像需求,而CPU+GPU混合架构可解决此问题。两种算法的成像结果表明,改进型距离徙动算法的聚焦效果和图像对比度均优于距离徙动算法;NVIDIA GTX 1080Ti和Intel(R)Xeon(R)E5-2650 v4的实测结果表明,CPU+GPU混合架构与单CPU的加速比高达69.88。因此,基于CPU+GPU混合架构的改进型距离徙动算法实现是可行的。     

近景线阵CCD数据采集系统的设计与实现

针对Kodak的RGB三色线阵CCD-KLI14403设计一款基于CPLD的高分辨率线阵CCD实时数据采集系统.系统利用Verilog HDL进行程序设计实现CPLD对各个功能模块和逻辑单元的时序控制,设计采用线阵CCD作为系统图像传感器,以图像专用A/D处理芯片对CCD的输出信号进行噪声处理和模数转换,最后通过USB2.0接口实现上位机与下位机之间控制指令和采集数据的实时传输.这种设计方法不仅降低了对系统各模块之间的协调控制难度,而且具有驱动时序精确、抗干扰性能良好、输出信号稳定等特点.实验结果表明,该设计系统可以有效地完成图像数据的采集和传输,达到了预期效果,且设计灵活,系统性能较好,具有一定的通用性和科研价值.     

Estimating optical flow with cellular neural networks

The cellular neural network is a locally interconnected neural network capable of high-speed computation when implemented in analog VLSI. This work describes a CNN algorithm for estimating the optical flow from an image sequence. The algorithm is based on the spatio-temporal filtering approach to image motion analysis and is shown to estimate the optical flow more accurately than a comparable approach proposed previously. Two innovative features of the algorithm are the exploitation of a biological model for hyperacuity and the development of a new class of spatio-temporal filter better suited for image motion analysis than the commonly used space–time Gabor filter. © 1998 John Wiley & Sons, Ltd.