Novel All-Pass Filter Section Using Differential Difference Amplifier

A novel high-performance first-order all-pass filter employing a single active element and a minimum number of passive components is presented. The proposed circuit is based on differential difference amplifier and is very suitable for low voltage operation. Also, the use of grounded capacitor enables its implementation with standard CMOS technologies. SPICE simulation and experimental results verifying theoretical analyses are also provided.     

Transimpedance Type Fully Integrated Biquadratic Filters Using Operational Transresistance Amplifiers

Operational transresistance amplifier (OTRA) is an inherently suitable active building block for transimpedance type signal processing because of its current input/voltage output nature. It is due to the fact that both input and output terminals of OTRA are characterized by low impedance. In this paper, we present an OTRA based transimpedance type biquadratic filter configuration. It realizes all five different filtering functions, namely low-pass, high-pass, band-pass, notch and all-pass. The configuration can be made fully integrated based on MOS-C realization by making use of current differencing and internally grounded inputs of OTRA.     

A Novel Single-Resistance-Controlled Sinusoidal Oscillator Employing Single Operational Transresistance Amplifier

A novel operational transresistance amplifier (OTRA)-based single-resistance-controlled sinusoidal oscillator (SRCO) is proposed. It uses single OTRA, three resistors and two capacitors. To the best knowledge of author, this is the first oscillator constructed with single OTRA. The oscillator circuit provides independent control of oscillation frequency without disturbing oscillation condition by a resistor. It has also low passive sensitivities. The oscillator circuit is insensitive to parasitic input capacitances and input resistances due to zero internally grounded input terminals of OTRA. PSPICE simulations are given to verify the theoretical analysis.     

Selection of Input Stimulus for Fault Diagnosis of Analog Circuits Using ARMA Model

The paper addresses the problem of fault diagnosis of analog circuits based on dictionary approach. The proposed approach first identifies an adequate set of test frequencies to optimize the process of detection and isolation of simulated fault scenarios. The circuit under test (CUT) is then excited by an input stimulus composed of a set of sinusoidal waveforms with the selected test frequencies. The circuit response, at different fault scenarios, is preprocessed by an autoregressive moving average (ARMA) model to yield a set of features formulating the fault dictionary. Collected features are utilized to train and test a back-propagation (BP) neural network (NN) based classifier. Demonstrative results from soft fault simulation of two active circuit examples prove the excellent effectiveness of the proposed algorithm.     

Novel allpass filter configuration employing single OTRA

A new circuit configuration uses a single operational transresistance amplifier (OTRA) and four passive elements to realize both first- and second-order allpass filters. Owing to internal grounding of the OTRA input terminals, effects of input parasitics are significantly reduced. Applications of the circuit include the realization of the phase equalizer, the quadrature oscillator, and the high-Q bandpass filter for analog signal processing. The performance of the allpass filter is illustrated by circuit-level simulation of a quadrature oscillator with CMOS realization of the OTRA.     

Realization of Voltage and Current Mode KHN Biquads Using CCCIIs

In this work, new Kerwin-Huelsman-Newcomb (KHN) biquads employing current-controlled current conveyors (CCCIIs) in voltage-mode (VM) as well as in current-mode (CM) are presented. The parameters of the proposed circuits can be electronically controlled thanks to the tunability properties of the CCCIIs. The VM circuit is derived from a previously reported one by modifying its summing circuit and replacing the current conveyor(CCIIs) and resistors at their x-input terminals with CCCIIs. On the other hand, the CM circuit is derived from the adjoint graph of the signal-flow graph corresponding to the classical KHN circuit. This circuit is a multi-input single-output CM universal filter, which offers all the main advantages of the CM circuits as well as those of the classical KHN circuit. In addition to the three basic filter responses, they also allow the realization of the notch and the all pass responses.     

Low-Voltage Low-Power CMOS RF Four-Quadrant Multiplier

This paper describes a CMOS four-quadrant multiplier intended for use in the front-end receiver by utilizing the square-law characteristic of the MOS transistor in the saturation region. The circuit was simulated in standard 0.5 μm CMOS level 3 MOSIS (BSIM3 SPICE-based). The mixer has a third-order inter modulation (IM3) of 34.7 dBmV, a third-order intercept point (IP3) of -5.7 dBm, 1-dB compression (P-1dB) of -10.4 dBm and the power consumption is 1.18 mW from a single 1.5 V power supply. One of the features of the proposed design is using two MOS transistors limitation to reduce the supply voltage, which leads to reduce the power consumption.     

Tunable Ladder-Type Realization of Current-Mode Elliptic Filters

It is shown that a new series FDNR-R equivalent circuit using current controlled current conveyors (CCCIIs) allows effective realization of jω-axis zeros which are known to complicate the active implementation of ladder-type elliptic filters. The resulting ladder-type elliptic filter employs all grounded capacitors while keeping the number of active elements small. Also, the filter parameters are electronically tunable, which is important from integration point of view.     

A new tunable current-mode peak detector

The paper presents a completely new realization of peak detector/full-wave rectifier of input sinusoidal signals employing four CCCIIs (controlled current conveyors), metal-oxide–semiconductor transistors and a single grounded capacitor, without any external resistors and components matching the requirements. The circuit gives a DC output voltage that is the peak input voltage over a wide frequency range, with a very low ripple voltage and low harmonic distortion. The proposed circuit uses an all-pass filter as a 90° phase shifter of the square value of the processed input signal. The proposed circuit is very appropriate to be further developed into integrated circuits. To verify the theoretical analysis, the circuit HSPICE simulations were also included, showing good agreement with the theory.     

Versatile voltage-mode active-only biquad with lossless and lossy integrator loop

This paper presents a realization of a voltage-mode active-only biquad using operational amplifiers (OAs) and operational transconductance amplifiers (OTAs). The circuit configuration is obtained from a second-order integrator loop structure with lossless and lossy integrators. The proposed circuit can realize low-pass, band-pass, high-pass, band-stop and all-pass transfer functions by a suitable choice of input and output terminals. The circuit characteristics can be electronically tuned through adjustment of the transconductance gains of the OTAs. An example is given, together with simulated results by PSPICE. The circuit configuration is very suitable for implementation in both bipolar and CMOS technologies.     

High Input Impedance NMOS-based Phase Shifter with Minimum Number of Passive Elements

In this paper, a new voltage-mode (VM) first-order phase shifter (all-pass filter) employing only four NMOS transistors and minimum number of passive elements (i.e. one resistor and one capacitor) is proposed. The proposed VM phase shifter has high input impedance and does not require passive element matching constraints. Moreover, since only two NMOS transistors are stacked between positive and negative supply voltages, the proposed circuit is suitable for low-voltage operation. Electronic tunability can be provided easily by replacing the employed resistor with an NMOS transistor operating in triode region. Simulation results based on 0.18 μm TSMC CMOS parameters with ±0.9 V supply voltages are given to demonstrate the performance of the proposed phase shifter.     

Voltage-mode active-only biquad

This paper presents a realization of a voltage-mode active-only biquadratic circuit. The proposed circuit is constructed employing solely operational amplifiers and operational transconductance amplifiers (OTAs). The circuit configuration is obtained from a second-order structure with two integrator loops. The circuit can realize low-pass, band-pass, high-pass, band-stop, low-pass notch, high-pass notch and all-pass transfer functions by suitably choosing the input and output terminals, and the circuit characteristics can be electronically tuned through adjusting the transconductance gains of OTAs. Some examples are given together with simulated results by PSPICE. The circuit configuration is very suitable for implementation in both bipolar or CMOS technologies.     

Low Voltage Digitally Controlled CMOS Current Conveyor

In this paper, a digitally controlled current conveyo(DCCC) is presented. The proposed DCCC is based on rail-to-rail folded cascode implementation with a current division network (CDN). The CDN is used to provide control on the current gain of the DCCC. The CDN uses a novel current division technique based on differential pairs. The proposed DCCC can operate from ±1.5 V supply voltages. Applications of the proposed DCCC such as variable gain amplifiers (VGA) and digitally tunedfilters have been investigated. PSpice simulations based on the AMI 1.2 µm N-well level 3 parameters are in agreement with the presented work.     

Time Offsets for Non-orthogonal CDMA Signals

A simple interference reduction method for non-orthogonal downlink CDMA channels is presented in which non-orthogonal CDMA signals are transmitted with different time offsets. An expression of multiple access interference (MAI) is developed and a reduction of MAI power is evaluated by using a numerical method and a computer simulation. The value of the time offset is determined in order to minimize the MAI and the implementation complexity. The performance of the proposed method is evaluated for various channel models.     

Robust Space Time Receiver for CDMA-based Antenna Arrays

In this paper, we propose a new robust code division multiple access (CDMA) receiver of which weight vector is obtained by projecting the effective spatio-temporal signature waveform onto the signal subspace of the data covariance matrix. We verified our proposed algorithm by the field measured data obtained with a custom-built wideband CDMA test-bed. It will be shown that the proposed algorithm is robust to the signal mismatch.     

Current mode first order universal filter and multiphase sinusoidal oscillator

In this article a new current mode first order universal filter with single input and multiple outputs is proposed. The realization uses single dual-X multiple output second generation current conveyor (DX-MOCCII) and two passive grounded components. The presented circuit provides high-pass, low-pass and non-inverting and inverting all-pass responses simultaneously, all at different high impedance outputs. The realized circuit does not require any component matching constraint and all the sensitivities are found low. As an application the non-inverting all-pass filter is cascaded in a close loop with the current mode non-inverting integrator to design a current mode multiphase sinusoidal oscillator (MSO) having six phases. Voltage mode six phase sinusoidal oscillator is also achieved by resistively loading the current mode outputs. The analysis such as phase noise, non-ideality, stability and Monte Carlo are presented and discussed. The presented theory and its results are validated using 0.25 µm process parameters of TSMC in PSPICE simulator.     

Network Management Information Models

In the first part of this paper, a basic introduction to network management is given and the demand for standards and models of management information is addressed. Existing and new network management standards are then classified, and an overview on the Common Information Model CIM and the Web-Based Enterprise Management WBEM is given. Furthermore, classes for a Network Security Service and finally a Firewall Policy Model are proposed. The proposals are CIM extensions for security management and are being discussed with the Distributed Management Task Force DMTF to become a standard.     

Comments on "Realization of an all-pass transfer function using the second generation current conveyor"

It is pointed out that an error exists in the circuit given in the above letter [1]. In correcting the circuit, it becomes identical to the general configuration previously described in the literature [1]. The realization of a first-order all-pass transfer function should not be compared with that of a second-order all-pass based on the number of circuit components.     

Derivation of low-power first-order low-pass,high-pass and all-pass filters

In this letter, a new voltage-mode (VM) configuration for providing low-power and simultaneous realization of first-order low-pass, high-pass and all-pass filters is presented. The output of the all-pass filter is taken differentially. The proposed circuit contains low number of components, i.e., only two NMOS transistors, a floating battery, a grounded capacitor and a floating resistor. Adding two NMOS transistors to the proposed circuit it is modified as an all-pass filter with a single-ended output. The main advantage of the presented circuits in comparison with other counterparts is their extremely low power dissipation. Moreover, the floating resistor can be replaced with an additional NMOS transistor in triode region to provide electronic tunability. Simulation results using SPICE program are given to demonstrate the performance of the proposed circuit.     

Realization of n‐th Order Voltage Transfer Function Using a Single Operational Transresistance Amplifier

4 new configuration to realize the most general n‐th order voltage transfer function is proposed. It employs only one operational transresistance amplifier (OTRA) as the active element. In the synthesis of the transfer function, the RC:–RC decomposition technique is used. To the best of the author's knowledge, this is the first topology to be used in the realization of an n‐th order transfer function employing a single OTRA.