A Charge Plasma Based Label Free Biomolecule Detector Using SiGe-Heterojunction Double Gate Tunnel FET

Silicon - To overcome the random dopant fluctuations (RDFs) and high thermal budget problems faced by normally doped Tunnel Field Effect Transistor (TFET) devices, charge plasma SiGe-heterojunction...     

Performance Analysis of Tunnel FET Based Ring Oscillator Using Sentaurus TCAD

Silicon - A detailed Sentaurus TCAD simulation based study for Silicon Double Gate Tunnel Field Effect Transistor (Si-DG TFET) based Ring Oscillator (RO) is presented in this work. Two different...     

Charge Plasma Based Vertical Nanowire Tunnel Field Effect Transistor: Design and Sensitivity Analysis for Biosensing Application

Silicon - The device Dopingless Vertical Nanowire Tunnel Field Effect Transistor is simulated as a biosensor in this paper. The technique used is Charge Plasma for general doping in this device....     

Performance Analysis of Charge Plasma Based Five Layered Black Phosphorus-Silicon Heterostructure Tunnel Field Effect Transistor

Silicon - In this paper, five layered Black Phosphorus (BP) – Silicon (Si) based Tunnel Field Effect Transistor (TFET) is used to overcome the thermionic limits faced by Metal Oxide...     

A Raised Source/Drain Dopingless Tunnel FET with Stacked Source: Design and Analysis

Silicon - In this paper, we propose a novel n-type raised source/drain dopingless tunnel field-effect transistor along with stacked source configuration. Using calibrated TCAD 2-D device...     

Metal Drain Double-Gate Tunnel Field Effect Transistor with Underlap: Design and Simulation

Silicon - In this paper, we propose and simulate a novel double gate tunnel field effect transistor (DG-TFET) employing a metallic drain and a gate-drain underlap. The use of a metallic drain and...     

Ge/GaAs Based Negative Capacitance Tunnel FET Biosensor: Proposal and Sensitivity Analysis

Silicon - A highly sensitive, accurate, fast and power efficient biosensor is the need of the hour. Undoubtedly, dielectrically modulated (DM) tunnel FET (TFET) assures better sensitivity as...     

Simulation and Performance Evaluation of Charge Plasma Based Dual Pocket Biosensor using SiGe-Heterojunction TFET Design

Silicon - Conventional biosensor designs are often vulnerable to issues like random dopant fluctuations (RDFs) and high thermal budgets due to their design and the device they are based on. The...     

Performance Enhancement and Signal Distortion Analysis of Virtually Doped Nanotube Tunnel FET with Embedded Ferroelectric Gate Oxide

Silicon - This paper demonstrates the effect of ferroelectric gate oxide on the electrostatic doped nanotube tunnel field-effect transistor (FE-ED-NTTFET). The proposed device is a dopingless...     

Design Considerations and Optimization of Electrostatic Doped Ferroelectric Nanotube Tunnel FET: Analog and Noise Analysis

Silicon - This paper proposed the electrostatically doped Ferroelectric Nanotube Tunnel FET (FE-NT-TFET). The proposed device is electrostatically doped, so the applied source voltage is...     

Optimization of a Hetero-Structure Vertical Tunnel FET for Enhanced Electrical Performance and Effects of Temperature Variation on RF/Linearity Parameters

Silicon - A new hetero-structure vertical tunnel field effect transistor is proposed and investigated using Sentaurus Technology Computer-aided Design simulation. Since the direction of the gate...     

A Study on Dual Dielectric Pocket Heterojunction SOI Tunnel FET Performance and Flicker Noise Analysis in Presence of Interface Traps

Silicon - This communication presents the performance analysis and impact of low frequency flicker noise on a dual dielectric pocket heterojunction silicon on insulator (SOI) tunnel FET (TFET). The...     

Performance Tuning and Reliability Analysis of the Electrostatically Configured Nanotube Tunnel FET with Impact of Interface Trap Charges

Silicon - This paper examines, an electrostatically configured Nano-Tube Tunnel Field-Effect Transistor (ED-NTTFET). During the fabrication process, different charges such as fixed charge, oxide...     

Performance Improvement and Analysis of PtSi Schottky Barrier p-MOSFET Based on Charge Plasma Concept for Low Power Applications

This work reports a platinum silicide (PtSi) Schottky Barrier (SB) p-MOSFET (SB p-MOSFET) using charge plasma concept for low power applications. Here, we use two different materials to form source of the device. The source consists of two parts as primary source and extension. To consist source, PtSi and for extension, platinum metal is used. The proposed device is named as charge plasma (CP) SB p-MOSFET (CP SB p-MOSFET). The use of platinum extension induces the hole plasma near the source end. As a result, increased band bending reduces the SB width. This enhances the DC performance of the device. In addition, we have compared the DC and analog/RF performance of both the proposed device and the conventional SB p-MOSFET. It is observed that the proposed device exhibits improvement in on-state current (I_on), on- to off current ratio (I_ON/I_OFF), transconductance (g_m), cut-off frequency (f_t), product of gain and bandwidth (f_a) and transconductance generation factor (g_m/I_ds). We also optimized the performance of the device by modulating the work function and length of metal employed for extension. Moreover, the proposed device eliminated the doping, lowers the thermal budget requirement and unaffected from fluctuations due to randomly distributed dopant.

     

Drain Dielectric Pocket Engineering: its Impact on the Electrical Performance of a Hetero-Structure Tunnel FET

Silicon - In this paper, a simulated Si0.6Ge0.4/Si hetero-structure double gate tunneling FET with drain dielectric pocket (DDP-SiGe-TFET) is reported for the first time. The high-k (HfO2)...     

Enhanced Analog Performance and High-Frequency Applications of Dielectric Engineered High-K Schottky Nanowire FET

Silicon - In this paper, Gallium Nitride (GaN) based Dielectric Engineered High-K GaN Schottky Nanowire Field Effect Transistor (DE-HK-GaN-SNWFET) is examined for enhancing analog performance for...     

Design and Investigation of SiGe Heterojunction Based Charge Plasma Vertical TFET for Biosensing Application

Silicon - This paper explores the Vertical tunnel FET with the introduced layer of SiGe within the channel/source junction using TCAD. As Tunnel FETs smothered the 60 mV/decade confinement...     

Triple Metal Surrounding Gate Junctionless Tunnel FET Based 6T SRAM Design for Low Leakage Memory System

Silicon - The promising capability of Triple Material Surrounding Gate Junctionless Tunnel FET (TMSG – JL – TFET) based 6 T SRAM structure is demonstrated by employing...