SiC表面氢化研究

该文提出6H-SiC ( 0001)/SiO2间过渡层的概念和过渡层结构,通过分析过渡层与HF溶液的反应机理,建立湿化学处理中的SiC表面氢化模型。模型以氢钝化SiC表面悬挂键,降低SiC表面的界面态密度,消除了费米能级钉扎,获得理想的SiC表面。将此模型用于SiC/金属接触的SiC表面处理,在100℃以下制备了理想因子n=1.2~1.25的肖特基结和比接触电阻＝510-3 cm2~710-3 cm2的SiC欧姆接触,其优点在于不仅避免了欧姆接触800~1200℃的高温合金,而且改善了肖特基接触的电学特性。SiC表面模型与实验结果吻合较好。     

可调节势垒高度的Al／Si_（1—x）Gex肖特基接触

本文首次报道了Ａｌ／ｐ－Ｓｉ１－ｘＧｅｘ肖特基（Ｓｃｈｏｔｔｋｙ）接触的制备与电学性质．Ｓｉ１－ｘＧｅｘ／Ｓｉ应变外延层采用快速加热、超低压化学气相淀积方法生长．实验表明，改变Ｇｅ组分ｘ的大小可以调节肖特基势垒高度．随着Ｇｅ组分的增大，肖特基势垒高度降低，其降低值与Ｓｉ１－ｘＧｅｘ应变层带隙的降低值相一致，界面上费米能级钉扎于导带下约０．４３ｅＶ处．文中还研究了ＳｉＧｅ合金层的应变弛豫以及Ｓｉ顶层对肖特基接触特性的影响．     

Al／n—GaAs肖特基接触正向脉冲退化对GaAsIC的影响

本文描述了Ａｌ／ｎ－ＧａＡｓ肖特基接触的正向脉冲退化效应，探讨了当肖特基二极管承受正向电流冲击时，势垒高度ΦＢ升高，直接影响Ａｌ栅ＭＥＳＦＥＴｓ的特性，导致Ａｌ／ｎ－ＧａＡｓ ＩＣ失效的机理。     

铂－镍硅化物／硅接触肖特基势垒的形成方法

本工作研究了低温固相反应形成铂－镍硅化物／硅接触肖特基势垒的方法。介绍了用磁控溅射方法淀积金属薄膜和溅射工艺过程应注意的问题及其对肖特基势垒特性的影响。讨论了Ｈ＿２气氛中退火以形成优良肖特基势垒接触的方法与实验结果。     

铂—镍硅化物／硅接触肖特基势垒的形成方法

本工作研究了低温固相反应形成铂－镍硅化物／硅接触肖特基势垒的方法。介绍了用磁控溅射方法淀积金属薄膜和溅射工艺过程应注意的问题及其对肖特基势垒特性的影响。讨论了Ｈ２气氛中退火以形成优良肖特基势垒接触的方法与实验结果。     

SiC肖特基势垒二极管的研制

本文报道了采用电子束热蒸发的方法用铂（Ｐｔ）做肖特基接触在ｎ型６Ｈ-ＳｉＣ体材料上制作肖特基二极管的工艺过程和器件特性．对实验结果进行了比较分析,Ｉ-Ｖ特性测量说明Ｐｔ／６ＨＳｉＣ肖特基二极管有较好的整流特性,热电子发射是其主要的输运机理,理想因子为１.２３,肖特基势垒高度为１.０３ｅＶ,开启电压约为０.５Ｖ．     

PtSi／Si整流接触的研究

本文对是ＰｔＳｉ／Ｓｉ整流特性的接触进行了详细研究，并试制成功ＰｔＳｉ／ｐ－Ｓｉ和ＰｔＳｉ／ｎ－Ｓｉ两种用途不同的肖特基势垒二极管。     

不同退火温度下Mo/4H-SiC肖特基接触界面特性分析

为研究退火温度对肖特基接触界面特性的影响,在不同温度下测试了不同退火温度处理的Mo/4H-SiC肖特基接触的I-V及C-V特性.根据金属-绝缘层-半导体(MIS)结构二极管模型理论,认为在金属与半导体间存在薄介质层,通过估算介质层电容值,得到了肖特基接触界面态密度(N88)的能级分布情况,N8s约为1012 eV-1·cm-2量级.退火温度升高,N8s的能级分布靠近导带底;测试温度升高,Ns8增加且其能级分布远离导带底.利用X射线光电子能谱(XPS)分析表征肖特基接触界面态化学组分,分析结果证实接触界面存在SiO.SiO组分随退火温度的升高而减少,在退火温度为500℃及以上时检测到Mo-C成分,说明Mo与4H-SiC发生反应.     

不同退火温度对4H SiC 金半接触的影响

采用高真空电子束蒸发法制作了基于4H SiC外延材料的肖特基二极管,其中欧姆接触材料为Ti/Ni,肖特基接触材料为Ni。常温下,电流-电压(I-V)测试表明Ni/4H SiC肖特基二极管具有良好的整流特性,热电子发射是其主要输运机理。对比分析不同快速退火温度下器件的I-V特性,实验结果表明875 ℃退火温度下欧姆接触特性最好,400 ℃退火温度下器件肖特基接触I-V特性最好,理想因子为1.447,肖特基势垒高度为1.029 eV。     

金属保护层改善NiSi/Si肖特基势垒均匀性的研究

用溅射-退火反应的方法制作NiSi／Si肖特基二极管，采用Ti和Co两种金属保护层结构，以提高硅化物的形成质量。对肖特基二极管反向I-V特性的测量结果表明：相对于没有保护层的样品，有保护层样品的反向电流明显减小，而且Ti保护层结构比Co保护层结构的作用更明显；没有保护层的管子和有保护层的管子具有不同的边缘特性。实验数据能够很好地用非均匀肖特基势垒输运模型拟合。提取出的参数表明，保护层结构在不同程度上有效地提高了肖特基势全的均匀性，从而减小了肖特基二极管的反向电流；边缘特性的差异性也是由于肖特基势垒均匀性的改变而导致的。金属保护层能提高肖特基势全的均匀性是因为保护层抑制了工艺过程中的氧污染。     

Interface state density in Au-nGaAs Schottky diodes

A method for determining the surface state density in Schottky diodes taking into account both I–V and C–V data while considering the presence of a deep donor level is presented. The model assumes that the barrier height is controlled by the energy distribution of surface states in equilibrium with the metal and the applied potential and does not include, explicitly, an interfacial layer. The model was applied to extract interface state densities of Au-nGaAs guarded Schottky diodes fabricated from bulk and VPE (100) GaAs with carrier conentrations between 3 × 10¹⁵ and 8 × 10¹⁶ cm^?3. These diodes exhibited ideality (n) factors of approximately 1.02 and room temperature saturation current densities ～10^?8 A/cm². This model is in substantial agreement with forward bias measurements over the 77–360°K temperature range investigated, in that a temperature-independent energy distribution of interface states was obtained. In reverse bias the interface state model is most valid with the higher carrier concentration material and at high temperature and low bias voltage. Typical interface state densities from 0.07 eV above the zero bias Fermi level to 0.01 eV below the Fermi level were 2 × 10¹³ cm^?2 eV^?1. The validity of the model under reverse bias is restricted by a non-thermionic reverse current, thought to be enhance field emission from traps.     

Photovoltaic Effect at the Schottky Interface with Organic Single Crystal Rubrene

Rubrene single crystals can serve as a model material platform for studying the intrinsic photophysical processes in organic semiconductors and advance our understanding of material functionality in organic photovoltaic applications. The high degrees of structural order and material purity of organic single crystals enable a level of study that is unattainable in materials of current practical importance. Here, the photovoltaic effect at the Schottky interface of rubrene single crystal–aluminum electrode is demonstrated in a lateral ITO–rubrene–Al device geometry. The mechanism of the effect formation is explained based on the reconstructed energy band diagram of the ITO–rubrene–Al heterostructure. In particular, the open circuit voltage (V_OC) of the devices shows a strong dependency on the interfacial band bending and corresponding built‐in potential at the rubrene–Al Schottky interface. Initially, the photovoltage is found to be equal to the built‐in potential at the Schottky interface defined by the work function difference between the bulk of rubrene and the Al electrode, that is, following the Schottky–Mott model. A good agreement is found between the systematically varied built‐in potential and the resulting photovoltage magnitude upon insertion of an ultrathin LiF interlayer between the rubrene and Al electrode.     

6H-SiC Schottky二极管的正向特性

提出了一种考虑Schottky结势垒不均匀性和界面层作用的Si C Schottky二极管( SBD)正向特性模型,势垒的不均匀性来自于Si C外延层上的各种缺陷,而界面层上的压降会使正向Schottky结的有效势垒增高.该模型能够对不同温度下Si C Schottky结正向特性很好地进行模拟,模拟结果和测量数据相符.它更适用于考虑器件温度变化的场合,从机理上说明了理想因子、有效势垒和温度的关系.     

Modeling the gate bias dependence of contact resistance in staggered polycrystalline organic thin film transistors

We have modeled the dependence on the gate voltage of the bulk contact resistance and interface contact resistance in staggered polycrystalline organic thin film transistors. In the specific, we have investigated how traps, at the grain boundaries of an organic semiconductor thin film layer placed between the metal electrode and the active layer, can contribute to the bulk contact resistance. In order to the take into account this contribution, within the frame of the grain boundary trapping model (GBTM), a model of the energy barrier E_B, which emerges between the accumulation layer at the organic semiconductor/insulator interface and injecting contact, has been proposed. Moreover, the lowering of the energy barrier at the contacts interface region has been included by considering the influence of the electric field generated by the accumulation layer on the injection of carriers at the source and on the collection of charges from the accumulation layer to the drain contact. This work outlines both a Schottky barrier lowering, determined by the accumulation layer opposite the source electrode, as well as a Poole-Frenkel mechanism determined by the electric field of the accumulation layer active at the drain contact region. Finally it is provided and tested an analytical equation of our model for the contact resistance, summarizing the Poole-Frenkel and Schottky barrier lowering contribution with the grain boundary trapping model.     

界面态对p/p~+外延片高频C—V法测定杂质纵向浓度分布的影响

硅外延层上自然氧化层中的界面态使汞-硅接触肖特基二极管反向偏置C—V特性偏离理想情况,给外延层杂质纵向浓度分布测定带来较大误差。当正向偏置电压等于自建电势0.6V时的归一化电容值明显偏离按外延层杂质浓度和自然氧化层厚度计算出来的平带电容值,就可判明有界面态存在。只要将样品在化学纯的氢氟酸中漂洗7分钟,即可使界面态减少到不可察觉的程度,然后再进行C—V测量,可保证测定结果的正确性。     

Numerical modeling of hot electrons in n-GaAs Schottky-barrierdiodes

The drift-diffusion model, with the inclusion of the energy balance equations, is used to model DC properties of n-GaAs Schottky diodes at high forward bias voltages. The boundary condition for the energy balance equation at the Schottky contact is based on the assumption that the energy flow across the interface is equal to the energy carried by the electrons. The effects of thermionic-field emission and image force lowering are modeled with a field-dependent barrier height. The incorporation of these two effects resulted in very good agreement between simulated and measured I-V characteristics for diodes with different doping concentrations of the epitaxial layer     

降低肖特基势垒高度的途径探讨

通过深入地分析影响金属－半导体肖特基势垒的各种因素,探讨了几种降低肖特基势垒高度的途径,其中,特别是通过汽相激光诱导化学掺杂技术在金属－半导体界面上制作一足够薄的高掺杂层,可以使肖特基势垒高度得到显著降低。这种技术的应用,对在ＰｔＳｉ／Ｓｉ界面上制作超浅结和半导体器件中制作良好的欧姆接触提供了广阔的应用前景。     

An investigation of electrical and structural properties of Ni-germanosilicided Schottky diode

Ni-germanosilicided Schottky barrier diode has been fabricated by annealing the deposited Ni film on strained-Si and characterized electrically in the temperature range of 125 K–300 K. The chemical phases and morphology of the germanosilicided films were studied by using scanning electron microscopy (SEM), cross-sectional transmission electron microscopy (TEM) and energy dispersive spectroscopy (EDS). The Schottky barrier height (_b), ideality factor (n) and interface state density (D_it) have been determined from the current–voltage (I–V) and capacitance–voltage (C–V) characteristics. The current–voltage characteristics have also been simulated using SEMICAD device simulator to model the Schottky junction. An interfacial layer and a series resistance were included in the diode model to achieve a better agreement with the experimental data. It has been found that the barrier height values extracted from the I–V and C–V characteristics are different, indicating the existence of an in-homogeneous Schottky interface. Results are also compared with bulk-Si Schottky diode processed in the same run. The variation of electrical properties between the strained- and bulk-Si Schottky diodes has been attributed to the presence of out-diffused Ge at the interface.     

Highly Stable Plasmon Induced Hot Hole Transfer into Silicon via a SrTiO3 Passivation Interface

Extracting plasmon‐induced hot carriers over a metal–semiconductor Schottky barrier enables photodetection below the semiconductor bandgap energy. However, interfacial carrier recombination hinders the efficiency and stability of this process, severely limiting its implementation in telecommunication. This study proposes and demonstrates the use of epitaxially grown lattice‐matched SrTiO₃ for interfacial passivation of silicon‐based plasmonic Schottky devices. The devices are activated by an electrical soft‐breakdown of the interfacial SrTiO₃ layer, resulting in reproducible rectified Schottky characteristics. The transition to a low resistance state of the SrTiO₃ layer boosts the extraction efficiency of hot holes upon resonant plasmonic excitation, giving rise to a two orders of magnitude higher photocurrent compared to devices with a native oxide layer. Photoresponse, tunability, and barrier height studies under reverse biases as high as 100 V present superior stability with the incorporation of the SrTiO₃ layer. The investigation paves the way toward plasmon‐induced photodetection for practical applications including those under challenging operating conditions.     

Cu-GaAs(110)界面的同步辐射光电子谱研究

本文用同步辐射光电子谱研究了在室温n型GaAs(110)解理面上蒸发淀积的Cu-GaAs(110)界面和肖特基势垒的形成.Ga3d和As3d光电子谱随Cu的厚度的变化表明:在小于0.5单原子层(ML)Cu时只观察到能带的刚性弯曲,并无明显的界面反应;在大于1MLCu时出现明显的界面反应,形成处于界面的金属Ga和处于Cu表面的As;Cu有岛状生长的迹象.由谱分解的结果确定了在3—60A Cu范围内界面费米能级的位置在导带底以下约0.9eV处.肖特基势垒在0.5MLCu时已大部分(～80％)形成,在3MLCu时就完全形成.讨论了Cu-GaAs(110)界面和肖特基势垒形成的机制.