纳米级磷酸铁锂动力电池网带炉的设计

简要介绍纳米级磷酸铁锂网带烧结炉的核心点和关键点，说明了该炉的密封形式，置换室及胶质水气的排放与控制，通过使用验证了该设备的有效性及可行性。     

多级拼波调压节能技术在钟罩炉上的应用

钟罩式气氛烧结炉是一种炉体为升降式的烧结炉。由于钟罩炉功率较大,因此耗电量大。节能降耗对于钟罩炉的使用具有很好的实际意义。介绍了多级拼波调压技术在钟罩炉温控系统的应用,取得了较好的节能效果。     

当前直接覆铜技术的研究进展

叙述了近期国内外关于直接覆铜(DBC)技术的发展动态,指出DBC技术在电力电子模块、LED器件以及半导体制冷等领域的广泛应用,特别是AlN基片的DBC工艺研究应该引起有关科技人员的关注。     

基于物联网的高温烧结炉监控系统研究

高温烧结炉被广泛应用于材料、化工、制药等诸多领域,在设置小型烧结炉的温控曲线时,步骤烦琐且无法获知实际的运行曲线。为了确保烧结炉工作过程的安全与可靠,往往在工作现场还需要有人值守。为了降低人力成本,方便设置并监控烧结炉的运行,将物联网技术引入高温烧结炉,实现对多个运行设备的远程监控,用户通过手机就能实现远程操控,便捷可靠,大大提高了工作的效率。     

IPM中覆铜陶瓷基板的热传导性能研究北大核心CSCD

覆铜陶瓷(DBC)基板在功率模块的封装中应用广泛,其热传导性能对于功率模块的可靠性至关重要。基于智能功率模块(IPM)中覆铜陶瓷基板的图形化结构,制作不同材料及厚度的DBC基板样品并进行了热传导性能测试。通过仿真研究,进一步讨论DBC基板各层材料及厚度等因素的影响规律。实验与仿真结论一致,DBC基板的热传导性能随铜层厚度增加先增强后降低,随陶瓷层厚度增加而降低。在瞬态研究中发现,相同功率加载的初始10 s内,不同材料结构的DBC基板样品最高温度差高于55℃。因此,优化DBC基板的陶瓷层材料和尺寸设计对于提升功率模块的热可靠性有着重要的意义。     

新型陶瓷/金属化合物基板——直接敷铜板

直接敷铜(DBC)板是用于电子学封装的一种陶瓷/金属化合物基板。这种DBC板适用于光电子学封装的采集排列制作,并可提供无源对准、好的热导率、CTE匹配及良好的可靠性。本文介绍了采用DBC板的光电子学封概念布线、制作和应用。     

钟罩式高温烧结炉

研制出一台满足集成电路微组装工艺所需的高温烧结炉，介绍该烧结炉的结构组成和设计原理。     

预氧化对DBC基板的影响及敷接机理研究

随着绝缘栅双极型晶体管等功率器件的发展,对陶瓷敷铜基板(DBC)的需求越来越大。分别介绍了DBC基板的种类、结构,预氧化工艺对DBC基板的影响和敷接机理。用扫描电镜、X射线衍射等分析手段确定铜箔表面氧化后的物相成份,用X射线扫描确定敷接后界面空洞,并分析产生空洞的原因。用SEM观察界面的形貌并进行断面分析,用XRD和X-RAY分析界面产物的物相成份,从而确定DBC基板的敷接机理。     

DBC陶瓷基板表面覆铜的熔断电流模型研究

为了优化设计直接覆铜(Direct Bonded Copper，DBC)陶瓷基板的表面覆铜层尺寸，并评估覆铜层的极限电流能力，利用有限元仿真分析方法，研究了不同尺寸的DBC陶瓷基板表面覆铜达到熔点时的电流变化，建立了 DBC陶瓷基板表面覆铜的熔断电流模型，通过实际测试得到了3组不同DBC陶瓷基板表面覆铜的熔断电流，并与理论模型的计算值相比较，结果表明，理论模型与实测结果之间的误差在2％之内，模型求解的准确性和实用性得到了验证。     

新型晶硅电池快速烧结炉的研制

介绍了新型晶硅电池快速烧结炉的研制,提出了适应高阻工艺的快速烧结炉在炉体结构特点、温度控制方式、快速降温冷却等几个方面的改进设计,来提高晶硅电池的转换效率,降低生产成本。根据此设计生产的新型晶硅电池快速烧结炉,应用于产业化晶硅电池的高阻工艺流程中,满足工艺要求,取得了较好的经济效益。     

Application of ink jet technology on photovoltaic metallization

Computer-controlled ink-jet assisted metallization of the grid pattern of solar cells with metallo-organic decomposition (MOD) silver inks offers a maskless alternative method to conventional photolithographic thin-film technology and screen-printing technology. This method can provide low-cost, fine-resolution reduction in process complexity by direct ink-jet patterning, avoidance of degradation of p-n junctions by firing at low temperature (350°C), and uniform line film on rough-surface solar cells (unpolished solar cells for low-cost purposes). The metallization process involves jet-printed metallo-organic inks, belt furnace firing, and thermal spiking. With titanium thin-film underlayer as an adhesion promoter and multilayer ink jet printing, solar cells of 8.08% average efficiency without AR coating can be obtained. This efficiency value is approximately equal to that of thin-film metallized solar cells of the same lot     

连续式炉

引导读者考虑把烧结工艺从间歇式炉转换成连续式炉,然后介绍了连续式炉的许多特点。目前在烧结工艺中采用连续式炉的读者可以了解部分新型温度和气氛控制功能,其它读者则可以概括了解构成连续式炉的各个部分。     

Improved string ribbon silicon solar cell performance by rapid thermal firing of screen-printed contacts

Al-enhanced SiN/sub x/-induced hydrogenation is implemented to improve the minority carrier lifetime in string ribbon Si. Rapid cooling after the hydrogenation anneal is found to increase the spatially averaged relative lifetime enhancement by over 160% for string ribbon Si samples with a spatially averaged as-grown lifetime of 2.9 /spl mu/s. Partial coverage of back surface by Al eliminates wafer bowing in 100 /spl mu/m thick substrates, but reduces the spatially averaged lifetime enhancement to below 100% because vacancy generation at the back surface is decreased. Rapid thermal Firing (RTF) of screen-printed contacts, with high heating and cooling rates, is found to improve string ribbon solar cell efficiency by an average of 1.2% absolute over lamp heated belt furnace contact firing. Light beam-induced current (LBIC) mapping and light biased or differential internal quantum efficiency (IQE) analysis show that the enhancement in cell performance is primarily due to an improved effective diffusion length and diffusion length uniformity, which are both a result of the improved retention of hydrogen at defects achieved during rapid cooling after contact firing. Screen-printed string ribbon cells with independently confirmed efficiencies as high as 14.7% are achieved through an understanding and implementation of hydrogen passivation of defects.     

卧式金属化炉应用

7．8m卧式金属化炉用于陶瓷金属化制品的连续烧成。本文着重分析了该炉气路系统的进气点位置及其作用,通过调整各进气点气体流量及氢气、氮气配比,使窑炉所烧产品达到釉面光亮、金属化层无氧化、瓷体无花斑、无污染、颜色一致、封接强度高的目的。     

高温网带烧结窑

介绍了耐火材料砌筑的网带窑的设计思路、结构情况及应用范围。     

A Novel Three-Dimensional Packaging Method for Al-Metalized SiC Power Devices

A novel three-dimensional packaging method for Al-metalized SiC power devices has been developed by means of Au stud bumping technology and a subsequent vacuum reflow soldering process with Au-20Sn solder paste. Al-metalized electrodes of a SiC power chip can be robustly assembled to a direct bonded copper (DBC) substrate with this method. The bump shear strength of a Au stud bump on an Al electrode of a SiC chip increased with bonding temperature. The die shear strength of a SiC chip on the DBC substrate increased with the number of Au stud bumps which were preformed on the Al electrode. The bonded SiC-SBD chips on a DBC substrate were aged at 250 ${^circ}{rm C}$ in a vacuum furnace and the morphologies, die shear strength and electrical properties were investigated after a certain aging time. After 1000 h aging at 250 ${^circ}{rm C}$, the electrical resistance of the bonded SiC-SBD chips only increased about 0.4%, the residual die shear strength was much higher than that of the IEC749 (or JEITA) standard value, and little morphological change was observed by a micro-focus X-ray TV system. Very little diffusion between Au stud bumps and Au-20Sn solder was observed by scanning electron microscope (SEM) equipped with an energy dispersed X-ray analyzer (EDX). Intermetallic compounds (IMC) evolved at the interface of chip/solder and chip/Au stud bumps after 1000 h aging at 250 ${^circ}{rm C}$. With this method, power devices with Al bond pads can be three-dimensionally packaged.      

Development of screen-printed silicon solar cells with high fill factors on 100 /spl Omega//sq emitters

High-quality DuPont screen-printed Ag contacts were achieved on high sheet-resistance emitters (100 /spl Omega//sq) by rapid alloying of PV168 Ag paste. Excellent specific contact resistance (/spl sim/1 m/spl Omega/-cm/sup 2/) in conjunction with high fill factor (FF) (0.775) were obtained on 100 /spl Omega//sq emitters by a 900/spl deg/C spike firing of the PV168 paste in a belt furnace. The combination of the alloying characteristics of the PV168 Ag paste and optimized single-step rapid low-thermal budget firing resulted in a cost-effective manufacturable process for high-efficiency Si solar cells. In addition, the co-fired 100 /spl Omega//sq cell showed a noticeable improvement of /spl sim/0.5% in absolute efficiency over a conventional co-fired 45 /spl Omega//sq emitter cell. Lighter doping in the 100 /spl Omega//sq emitter cell resulted in better blue-response compared to the conventional cell, contributing to /spl sim/1.3 mA/cm/sup 2/ improvement in short-circuit current. Improved surface passivation on 100 /spl Omega//sq emitter cell resulted in additional 0.6 mA/cm/sup 2/ increase in J/sub sc/, 15-mV higher V/sub oc/, and a 0.6% increase in absolute cell efficiency. Front grid design optimization resulted in a FF of 0.780, and a further improvement in cell efficiency to reach 17.4%.     

An improved differential box-counting method to estimate fractal dimensions of gray-level images

The differential box-counting (DBC) method is one of the frequently used techniques to estimate the fractal dimension (FD) of a 2D gray-level image. This paper presents an improved DBC method based on the original one for improvement of the accuracy. By adopting the modifying box-counting mechanism, shifting box blocks in (x, y) plane and selecting appropriate grid box sizes, it can solve the two kinds of problems which the DBC has: over-counting boxes along z direction and under-counting boxes just at the border of two neighboring box blocks where there is a sharp gray-level abruption exits. The experiments using two sets of synthetic images and one set of real natural texture images demonstrate that the improved DBC method can solve the two kinds of problems perfectly, simultaneously, and can outperform other DBC methods in the accuracy.     

High‐efficiency (19%) screen‐printed textured cells on low‐resistivity float‐zone silicon with high sheet‐resistance emitters

High‐efficiency 4 cm² screen‐printed (SP) textured cells were fabricated on 100 Ω/sq emitters using a rapid single‐step belt furnace firing process. The high contact quality resulted in a low series resistance of 0·79 Ωcm², high shunt resistance of 48 836 Ωcm², a low junction leakage current of 18·5 nA/cm² (n₂ = 2) yielding a high fill factor (FF) of 0·784 on 100 Ω/sq emitter. A low resistivity (0·6 Ωcm) FZ Si was used for the base to enhance the contribution of the high sheet‐resistance emitter without appreciably sacrificing the bulk lifetime. This resulted in a 19% efficient (confirmed at NREL) SP 4 cm² cell on textured FZ silicon with SP contacts and single‐layer antireflection coating. This is apparently higher in performance than any other previously reported cell using standard screen‐printing approaches (i.e., single‐step firing and grid metallization). Detailed cell characterization and device modeling were performed to extract all the important device parameters of this 19% SP Si cell and provide guidelines for achieving 20% SP Si cells. Copyright © 2005 John Wiley & Sons, Ltd.